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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S < %s | FileCheck %s --check-prefix=CHECK3 4define i32 @select_icmp_switch(i32 %n, i32 %case, ptr %a, ptr %b) {5; CHECK-LABEL: define i32 @select_icmp_switch(6; CHECK-SAME: i32 [[N:%.*]], i32 [[CASE:%.*]], ptr [[A:%.*]], ptr [[B:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*]]:8; CHECK-NEXT: [[CMP_SGT:%.*]] = icmp sgt i32 [[N]], 09; CHECK-NEXT: br i1 [[CMP_SGT]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]]10; CHECK: [[FOR_BODY_PREHEADER]]:11; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i6412; CHECK-NEXT: br label %[[FOR_BODY:.*]]13; CHECK: [[FOR_BODY]]:14; CHECK-NEXT: [[INDVARS:%.*]] = phi i64 [ 0, %[[FOR_BODY_PREHEADER]] ], [ [[INDVARS_NEXT:%.*]], %[[FOR_INC:.*]] ]15; CHECK-NEXT: [[RDX_PHI:%.*]] = phi i32 [ 0, %[[FOR_BODY_PREHEADER]] ], [ [[RDX_PHI_NEXT:%.*]], %[[FOR_INC]] ]16; CHECK-NEXT: switch i32 [[CASE]], label %[[SW_BB0:.*]] [17; CHECK-NEXT: i32 0, label %[[SW_BB0]]18; CHECK-NEXT: i32 1, label %[[SW_BB1:.*]]19; CHECK-NEXT: ]20; CHECK: [[SW_BB0]]:21; CHECK-NEXT: [[A_ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDVARS]]22; CHECK-NEXT: [[A_VALUE:%.*]] = load i8, ptr [[A_ARRAYIDX]], align 123; CHECK-NEXT: [[CMP_A:%.*]] = icmp eq i8 [[A_VALUE]], -124; CHECK-NEXT: [[TRUNC_BB0:%.*]] = trunc i64 [[INDVARS]] to i3225; CHECK-NEXT: [[SELECT_BB0:%.*]] = select i1 [[CMP_A]], i32 [[RDX_PHI]], i32 [[TRUNC_BB0]]26; CHECK-NEXT: br label %[[FOR_INC]]27; CHECK: [[SW_BB1]]:28; CHECK-NEXT: [[B_ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDVARS]]29; CHECK-NEXT: [[B_VALUE:%.*]] = load i8, ptr [[B_ARRAYIDX]], align 130; CHECK-NEXT: [[CMP_B:%.*]] = icmp eq i8 [[B_VALUE]], -131; CHECK-NEXT: [[TRUNC_BB1:%.*]] = trunc i64 [[INDVARS]] to i3232; CHECK-NEXT: [[SELECT_BB1:%.*]] = select i1 [[CMP_B]], i32 [[RDX_PHI]], i32 [[TRUNC_BB1]]33; CHECK-NEXT: br label %[[FOR_INC]]34; CHECK: [[FOR_INC]]:35; CHECK-NEXT: [[RDX_PHI_NEXT]] = phi i32 [ [[SELECT_BB0]], %[[SW_BB0]] ], [ [[SELECT_BB1]], %[[SW_BB1]] ]36; CHECK-NEXT: [[INDVARS_NEXT]] = add nuw nsw i64 [[INDVARS]], 137; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_NEXT]], [[WIDE_TRIP_COUNT]]38; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_END_LOOPEXIT:.*]], label %[[FOR_BODY]]39; CHECK: [[FOR_END_LOOPEXIT]]:40; CHECK-NEXT: [[RDX_PHI_NEXT_LCSSA:%.*]] = phi i32 [ [[RDX_PHI_NEXT]], %[[FOR_INC]] ]41; CHECK-NEXT: br label %[[FOR_END]]42; CHECK: [[FOR_END]]:43; CHECK-NEXT: [[SELECT_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[RDX_PHI_NEXT_LCSSA]], %[[FOR_END_LOOPEXIT]] ]44; CHECK-NEXT: ret i32 [[SELECT_LCSSA]]45;46entry:47 %cmp.sgt = icmp sgt i32 %n, 048 br i1 %cmp.sgt, label %for.body.preheader, label %for.end49 50for.body.preheader:51 %wide.trip.count = zext i32 %n to i6452 br label %for.body53 54for.body:55 %indvars = phi i64 [ 0, %for.body.preheader ], [ %indvars.next, %for.inc ]56 %rdx.phi = phi i32 [ 0, %for.body.preheader ], [ %rdx.phi.next, %for.inc ]57 switch i32 %case, label %sw.bb0 [58 i32 0, label %sw.bb059 i32 1, label %sw.bb160 ]61 62sw.bb0:63 %a.arrayidx = getelementptr inbounds i8, ptr %a, i64 %indvars64 %a.value = load i8, ptr %a.arrayidx, align 165 %cmp.a = icmp eq i8 %a.value, -166 %trunc.bb0 = trunc i64 %indvars to i3267 %select.bb0 = select i1 %cmp.a, i32 %rdx.phi, i32 %trunc.bb068 br label %for.inc69 70sw.bb1:71 %b.arrayidx = getelementptr inbounds i8, ptr %b, i64 %indvars72 %b.value = load i8, ptr %b.arrayidx, align 173 %cmp.b = icmp eq i8 %b.value, -174 %trunc.bb1 = trunc i64 %indvars to i3275 %select.bb1 = select i1 %cmp.b, i32 %rdx.phi, i32 %trunc.bb176 br label %for.inc77 78for.inc:79 %rdx.phi.next = phi i32 [ %select.bb0, %sw.bb0 ], [ %select.bb1, %sw.bb1 ]80 %indvars.next = add nuw nsw i64 %indvars, 181 %exitcond.not = icmp eq i64 %indvars.next, %wide.trip.count82 br i1 %exitcond.not, label %for.end, label %for.body83 84for.end:85 %select.lcssa = phi i32 [ %rdx.phi.next, %for.inc ], [ 0, %entry ]86 ret i32 %select.lcssa87}88