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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S %s | FileCheck %s3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"5 6define void @test(i32 %tc, ptr %p) {7; CHECK-LABEL: @test(8; CHECK-NEXT: br label [[FOR_BODY_LR_PH_I_I_I:%.*]]9; CHECK: for.body.lr.ph.i.i.i:10; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TC:%.*]], -111; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i6412; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 113; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 414; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]15; CHECK: vector.ph:16; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 417; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]18; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]19; CHECK: vector.body:20; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]21; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 422; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]23; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]24; CHECK: middle.block:25; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]26; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END_I_I_I:%.*]], label [[SCALAR_PH]]27; CHECK: scalar.ph:28; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_LR_PH_I_I_I]] ]29; CHECK-NEXT: br label [[FOR_BODY_I_I_I:%.*]]30; CHECK: for.body.i.i.i:31; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC_I_I_I:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]32; CHECK-NEXT: br label [[FOR_INC_I_I_I]]33; CHECK: for.inc.i.i.i:34; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 135; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i3236; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[TC]]37; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY_I_I_I]], label [[FOR_END_I_I_I]], !llvm.loop [[LOOP3:![0-9]+]]38; CHECK: for.end.i.i.i:39; CHECK-NEXT: [[LCSSA:%.*]] = phi ptr [ [[P:%.*]], [[FOR_INC_I_I_I]] ], [ [[P]], [[MIDDLE_BLOCK]] ]40; CHECK-NEXT: unreachable41;42 br label %for.body.lr.ph.i.i.i43 44for.body.lr.ph.i.i.i:45 br label %for.body.i.i.i46 47for.body.i.i.i:48 %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc.i.i.i ], [ 0, %for.body.lr.ph.i.i.i ]49 br label %for.inc.i.i.i50 51for.inc.i.i.i:52 %indvars.iv.next = add i64 %indvars.iv, 153 %lftr.wideiv = trunc i64 %indvars.iv.next to i3254 %exitcond = icmp ne i32 %lftr.wideiv, %tc55 br i1 %exitcond, label %for.body.i.i.i, label %for.end.i.i.i56 57for.end.i.i.i:58 %lcssa = phi ptr [ %p, %for.inc.i.i.i ]59 unreachable60}61 62; PR1613963define void @test2(ptr %x) {64; CHECK-LABEL: @test2(65; CHECK-NEXT: entry:66; CHECK-NEXT: indirectbr ptr [[X:%.*]], [label [[L0:%.*]], label [[L1:%.*]]]67; CHECK: L0:68; CHECK-NEXT: br label [[L0]]69; CHECK: L1:70; CHECK-NEXT: ret void71;72entry:73 indirectbr ptr %x, [ label %L0, label %L1 ]74 75L0:76 br label %L077 78L1:79 ret void80}81 82; This loop has different uniform instructions before and after LCSSA.83define void @test3(ptr %p) {84; CHECK-LABEL: @test3(85; CHECK-NEXT: entry:86; CHECK-NEXT: [[ADD41:%.*]] = add i32 3, 387; CHECK-NEXT: [[IDXPROM4736:%.*]] = zext i32 [[ADD41]] to i6488; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]89; CHECK: vector.ph:90; CHECK-NEXT: br label [[VECTOR_BODY1:%.*]]91; CHECK: vector.body:92; CHECK-NEXT: [[POS_337:%.*]] = add i32 [[ADD41]], 093; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[ADD41]], 194; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[ADD41]], 295; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[ADD41]], 396; CHECK-NEXT: [[INC46:%.*]] = add i32 [[POS_337]], 197; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP1]], 198; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP2]], 199; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP3]], 1100; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[INC46]], i32 0101; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP5]], i32 1102; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP6]], i32 2103; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP7]], i32 3104; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]105; CHECK: pred.store.if:106; CHECK-NEXT: [[IDXPROM4738:%.*]] = add i64 [[IDXPROM4736]], 0107; CHECK-NEXT: [[ARRAYIDX48:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P:%.*]], i64 0, i64 [[IDXPROM4738]]108; CHECK-NEXT: store i8 0, ptr [[ARRAYIDX48]], align 1109; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]]110; CHECK: pred.store.continue:111; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3:%.*]]112; CHECK: pred.store.if2:113; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[IDXPROM4736]], 1114; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P]], i64 0, i64 [[TMP14]]115; CHECK-NEXT: store i8 0, ptr [[TMP15]], align 1116; CHECK-NEXT: br label [[PRED_STORE_CONTINUE3]]117; CHECK: pred.store.continue3:118; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]]119; CHECK: pred.store.if4:120; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[IDXPROM4736]], 2121; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P]], i64 0, i64 [[TMP16]]122; CHECK-NEXT: store i8 0, ptr [[TMP17]], align 1123; CHECK-NEXT: br label [[PRED_STORE_CONTINUE5]]124; CHECK: pred.store.continue5:125; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7:%.*]]126; CHECK: pred.store.if6:127; CHECK-NEXT: [[TMP18:%.*]] = add i64 [[IDXPROM4736]], 3128; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P]], i64 0, i64 [[TMP18]]129; CHECK-NEXT: store i8 0, ptr [[TMP19]], align 1130; CHECK-NEXT: br label [[PRED_STORE_CONTINUE7]]131; CHECK: pred.store.continue7:132; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]]133; CHECK: middle.block:134; CHECK-NEXT: [[FIRST_INACTIVE_LANE:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> <i1 false, i1 false, i1 true, i1 true>, i1 false)135; CHECK-NEXT: [[LAST_ACTIVE_LANE:%.*]] = sub i64 [[FIRST_INACTIVE_LANE]], 1136; CHECK-NEXT: [[INC46_LCSSA:%.*]] = extractelement <4 x i32> [[TMP11]], i64 [[LAST_ACTIVE_LANE]]137; CHECK-NEXT: br label [[WHILE_END:%.*]]138; CHECK: while.end:139; CHECK-NEXT: [[ADD58:%.*]] = add i32 [[INC46_LCSSA]], 4140; CHECK-NEXT: ret void141;142entry:143 %add41 = add i32 3, 3144 %idxprom4736 = zext i32 %add41 to i64145 br label %while.body146 147while.body:148 %idxprom4738 = phi i64 [ %idxprom47, %while.body ], [ %idxprom4736, %entry ]149 %pos.337 = phi i32 [ %inc46, %while.body ], [ %add41, %entry ]150 %inc46 = add i32 %pos.337, 1151 %arrayidx48 = getelementptr inbounds [1024 x i8], ptr %p, i64 0, i64 %idxprom4738152 store i8 0, ptr %arrayidx48, align 1153 %and43 = and i32 %inc46, 3154 %cmp44 = icmp eq i32 %and43, 0155 %idxprom47 = zext i32 %inc46 to i64156 br i1 %cmp44, label %while.end, label %while.body157 158while.end:159 %add58 = add i32 %inc46, 4160 ret void161}162 163; Make sure LV doesn't crash on IR where some LCSSA uses are unreachable.164define i32 @pr57508(ptr %src) {165; CHECK-LABEL: @pr57508(166; CHECK-NEXT: entry:167; CHECK-NEXT: br label [[VECTOR_PH:%.*]]168; CHECK: vector.ph:169; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]170; CHECK: vector.body:171; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]172; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4173; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[INDEX_NEXT]], 2000174; CHECK-NEXT: br i1 [[TMP0]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]175; CHECK: middle.block:176; CHECK-NEXT: br label [[SCALAR_PH:%.*]]177; CHECK: scalar.ph:178; CHECK-NEXT: br label [[LOOP:%.*]]179; CHECK: loop:180; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 2000, [[SCALAR_PH]] ]181; CHECK-NEXT: [[LOCAL:%.*]] = phi i32 [ [[LOCAL_NEXT:%.*]], [[LOOP]] ], [ 2000, [[SCALAR_PH]] ]182; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1183; CHECK-NEXT: [[LOCAL_NEXT]] = add i32 [[LOCAL]], 1184; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 2000185; CHECK-NEXT: br i1 [[EC]], label [[LOOP_EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]186; CHECK: loop.exit:187; CHECK-NEXT: unreachable188; CHECK: bb:189; CHECK-NEXT: [[LOCAL_USE:%.*]] = add i32 poison, 1190; CHECK-NEXT: ret i32 [[LOCAL_USE]]191;192entry:193 br label %loop194 195loop:196 %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]197 %local = phi i32 [ %local.next, %loop ], [ 0, %entry ]198 %iv.next = add nuw nsw i64 %iv, 1199 %local.next = add i32 %local, 1200 %ec = icmp eq i64 %iv, 2000201 br i1 %ec, label %loop.exit, label %loop202 203loop.exit:204 unreachable205 206bb:207 %local.use = add i32 %local, 1208 ret i32 %local.use209}210