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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 62; RUN: opt -p loop-vectorize -force-vector-width=4 -S %s | FileCheck --check-prefix=VF4IC1 %s3; RUN: opt -p loop-vectorize -force-vector-width=2 -force-vector-interleave=2 -S %s | FileCheck --check-prefix=VF2IC2 %s4 5define void @narrow_select_to_single_scalar(i1 %invar.cond, ptr noalias %A, ptr noalias %B, ptr noalias %C) {6; VF4IC1-LABEL: define void @narrow_select_to_single_scalar(7; VF4IC1-SAME: i1 [[INVAR_COND:%.*]], ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) {8; VF4IC1-NEXT: [[ENTRY:.*:]]9; VF4IC1-NEXT: br label %[[VECTOR_PH:.*]]10; VF4IC1: [[VECTOR_PH]]:11; VF4IC1-NEXT: [[TMP0:%.*]] = select i1 [[INVAR_COND]], i16 0, i16 112; VF4IC1-NEXT: [[TMP1:%.*]] = getelementptr i16, ptr [[C]], i16 [[TMP0]]13; VF4IC1-NEXT: br label %[[VECTOR_BODY:.*]]14; VF4IC1: [[VECTOR_BODY]]:15; VF4IC1-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]16; VF4IC1-NEXT: [[OFFSET_IDX:%.*]] = trunc i32 [[INDEX]] to i1617; VF4IC1-NEXT: [[TMP2:%.*]] = add i16 [[OFFSET_IDX]], 018; VF4IC1-NEXT: [[TMP3:%.*]] = add i16 [[OFFSET_IDX]], 119; VF4IC1-NEXT: [[TMP4:%.*]] = add i16 [[OFFSET_IDX]], 220; VF4IC1-NEXT: [[TMP5:%.*]] = add i16 [[OFFSET_IDX]], 321; VF4IC1-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[A]], i16 [[TMP5]]22; VF4IC1-NEXT: [[TMP7:%.*]] = load i16, ptr [[TMP6]], align 123; VF4IC1-NEXT: store i16 [[TMP7]], ptr [[B]], align 124; VF4IC1-NEXT: store i16 0, ptr [[TMP1]], align 125; VF4IC1-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 426; VF4IC1-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], 102427; VF4IC1-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]28; VF4IC1: [[MIDDLE_BLOCK]]:29; VF4IC1-NEXT: br label %[[EXIT:.*]]30; VF4IC1: [[EXIT]]:31; VF4IC1-NEXT: ret void32;33; VF2IC2-LABEL: define void @narrow_select_to_single_scalar(34; VF2IC2-SAME: i1 [[INVAR_COND:%.*]], ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) {35; VF2IC2-NEXT: [[ENTRY:.*:]]36; VF2IC2-NEXT: br label %[[VECTOR_PH:.*]]37; VF2IC2: [[VECTOR_PH]]:38; VF2IC2-NEXT: [[TMP0:%.*]] = select i1 [[INVAR_COND]], i16 0, i16 139; VF2IC2-NEXT: [[TMP1:%.*]] = getelementptr i16, ptr [[C]], i16 [[TMP0]]40; VF2IC2-NEXT: br label %[[VECTOR_BODY:.*]]41; VF2IC2: [[VECTOR_BODY]]:42; VF2IC2-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]43; VF2IC2-NEXT: [[OFFSET_IDX:%.*]] = trunc i32 [[INDEX]] to i1644; VF2IC2-NEXT: [[TMP2:%.*]] = add i16 [[OFFSET_IDX]], 245; VF2IC2-NEXT: [[TMP3:%.*]] = add i16 [[OFFSET_IDX]], 346; VF2IC2-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i16 [[TMP3]]47; VF2IC2-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP4]], align 148; VF2IC2-NEXT: store i16 [[TMP5]], ptr [[B]], align 149; VF2IC2-NEXT: store i16 0, ptr [[TMP1]], align 150; VF2IC2-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 451; VF2IC2-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], 102452; VF2IC2-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]53; VF2IC2: [[MIDDLE_BLOCK]]:54; VF2IC2-NEXT: br label %[[EXIT:.*]]55; VF2IC2: [[EXIT]]:56; VF2IC2-NEXT: ret void57;58entry:59 br label %loop.header60 61loop.header:62 %iv = phi i16 [ 0, %entry ], [ %iv.next, %loop.header ]63 %gep.A = getelementptr i8, ptr %A, i16 %iv64 %l.0 = load i16, ptr %gep.A, align 165 store i16 %l.0, ptr %B, align 166 %invar.sel = select i1 %invar.cond, i16 0, i16 167 %gep.C = getelementptr i16, ptr %C, i16 %invar.sel68 store i16 0, ptr %gep.C, align 169 %iv.next = add i16 %iv, 170 %ec = icmp ne i16 %iv.next, 102471 br i1 %ec, label %loop.header, label %exit72 73exit:74 ret void75}76 77; Check each unrolled store stores the last lane of the corresponding part.78; Test case for https://github.com/llvm/llvm-project/issues/162498.79define void @narrow_to_single_scalar_store_address_not_uniform_across_all_parts(ptr %dst) {80; VF4IC1-LABEL: define void @narrow_to_single_scalar_store_address_not_uniform_across_all_parts(81; VF4IC1-SAME: ptr [[DST:%.*]]) {82; VF4IC1-NEXT: [[ENTRY:.*:]]83; VF4IC1-NEXT: br label %[[VECTOR_PH:.*]]84; VF4IC1: [[VECTOR_PH]]:85; VF4IC1-NEXT: br label %[[VECTOR_BODY:.*]]86; VF4IC1: [[VECTOR_BODY]]:87; VF4IC1-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]88; VF4IC1-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]89; VF4IC1-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 090; VF4IC1-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 191; VF4IC1-NEXT: [[TMP2:%.*]] = add i32 [[INDEX]], 292; VF4IC1-NEXT: [[TMP3:%.*]] = add i32 [[INDEX]], 393; VF4IC1-NEXT: [[TMP4:%.*]] = lshr <4 x i32> [[VEC_IND]], splat (i32 1)94; VF4IC1-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[TMP4]], i32 095; VF4IC1-NEXT: [[TMP7:%.*]] = extractelement <4 x i32> [[TMP4]], i32 196; VF4IC1-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP4]], i32 297; VF4IC1-NEXT: [[TMP11:%.*]] = extractelement <4 x i32> [[TMP4]], i32 398; VF4IC1-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[DST]], i32 [[TMP5]]99; VF4IC1-NEXT: [[TMP8:%.*]] = getelementptr i32, ptr [[DST]], i32 [[TMP7]]100; VF4IC1-NEXT: [[TMP10:%.*]] = getelementptr i32, ptr [[DST]], i32 [[TMP9]]101; VF4IC1-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[DST]], i32 [[TMP11]]102; VF4IC1-NEXT: store i32 [[TMP0]], ptr [[TMP6]], align 4103; VF4IC1-NEXT: store i32 [[TMP1]], ptr [[TMP8]], align 4104; VF4IC1-NEXT: store i32 [[TMP2]], ptr [[TMP10]], align 4105; VF4IC1-NEXT: store i32 [[TMP3]], ptr [[TMP12]], align 4106; VF4IC1-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4107; VF4IC1-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)108; VF4IC1-NEXT: [[TMP13:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100109; VF4IC1-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]110; VF4IC1: [[MIDDLE_BLOCK]]:111; VF4IC1-NEXT: br label %[[EXIT:.*]]112; VF4IC1: [[EXIT]]:113; VF4IC1-NEXT: ret void114;115; VF2IC2-LABEL: define void @narrow_to_single_scalar_store_address_not_uniform_across_all_parts(116; VF2IC2-SAME: ptr [[DST:%.*]]) {117; VF2IC2-NEXT: [[ENTRY:.*:]]118; VF2IC2-NEXT: br label %[[VECTOR_PH:.*]]119; VF2IC2: [[VECTOR_PH]]:120; VF2IC2-NEXT: br label %[[VECTOR_BODY:.*]]121; VF2IC2: [[VECTOR_BODY]]:122; VF2IC2-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]123; VF2IC2-NEXT: [[TMP7:%.*]] = add i32 [[INDEX]], 0124; VF2IC2-NEXT: [[TMP8:%.*]] = add i32 [[INDEX]], 1125; VF2IC2-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 2126; VF2IC2-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 3127; VF2IC2-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP7]], 1128; VF2IC2-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP0]], 1129; VF2IC2-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[DST]], i32 [[TMP2]]130; VF2IC2-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[DST]], i32 [[TMP3]]131; VF2IC2-NEXT: store i32 [[TMP8]], ptr [[TMP4]], align 4132; VF2IC2-NEXT: store i32 [[TMP1]], ptr [[TMP5]], align 4133; VF2IC2-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4134; VF2IC2-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], 100135; VF2IC2-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]136; VF2IC2: [[MIDDLE_BLOCK]]:137; VF2IC2-NEXT: br label %[[EXIT:.*]]138; VF2IC2: [[EXIT]]:139; VF2IC2-NEXT: ret void140;141entry:142 br label %loop143 144loop:145 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]146 %iv.shift = lshr i32 %iv, 1147 %gep.dst = getelementptr i32, ptr %dst, i32 %iv.shift148 store i32 %iv, ptr %gep.dst, align 4149 %iv.next = add i32 %iv, 1150 %ec = icmp eq i32 %iv.next, 100151 br i1 %ec, label %exit, label %loop152 153exit:154 ret void155}156 157define void @narrow_widen_store_user(i32 %x, ptr noalias %A, ptr noalias %B) {158; VF4IC1-LABEL: define void @narrow_widen_store_user(159; VF4IC1-SAME: i32 [[X:%.*]], ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {160; VF4IC1-NEXT: [[ENTRY:.*:]]161; VF4IC1-NEXT: br label %[[VECTOR_PH:.*]]162; VF4IC1: [[VECTOR_PH]]:163; VF4IC1-NEXT: [[TMP0:%.*]] = add i32 [[X]], 1164; VF4IC1-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i64 0165; VF4IC1-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT1]], <4 x i32> poison, <4 x i32> zeroinitializer166; VF4IC1-NEXT: [[TMP5:%.*]] = mul <4 x i32> [[TMP1]], splat (i32 3)167; VF4IC1-NEXT: br label %[[VECTOR_BODY:.*]]168; VF4IC1: [[VECTOR_BODY]]:169; VF4IC1-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]170; VF4IC1-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[A]], i32 [[INDEX]]171; VF4IC1-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[B]], i32 [[INDEX]]172; VF4IC1-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP2]], align 4173; VF4IC1-NEXT: store <4 x i32> [[TMP5]], ptr [[TMP3]], align 4174; VF4IC1-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4175; VF4IC1-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024176; VF4IC1-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]177; VF4IC1: [[MIDDLE_BLOCK]]:178; VF4IC1-NEXT: br label %[[EXIT:.*]]179; VF4IC1: [[EXIT]]:180; VF4IC1-NEXT: ret void181;182; VF2IC2-LABEL: define void @narrow_widen_store_user(183; VF2IC2-SAME: i32 [[X:%.*]], ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {184; VF2IC2-NEXT: [[ENTRY:.*:]]185; VF2IC2-NEXT: br label %[[VECTOR_PH:.*]]186; VF2IC2: [[VECTOR_PH]]:187; VF2IC2-NEXT: [[TMP0:%.*]] = add i32 [[X]], 1188; VF2IC2-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0]], i64 0189; VF2IC2-NEXT: [[TMP1:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT1]], <2 x i32> poison, <2 x i32> zeroinitializer190; VF2IC2-NEXT: [[TMP7:%.*]] = mul <2 x i32> [[TMP1]], splat (i32 3)191; VF2IC2-NEXT: br label %[[VECTOR_BODY:.*]]192; VF2IC2: [[VECTOR_BODY]]:193; VF2IC2-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]194; VF2IC2-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[A]], i32 [[INDEX]]195; VF2IC2-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[B]], i32 [[INDEX]]196; VF2IC2-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[TMP2]], i64 2197; VF2IC2-NEXT: store <2 x i32> [[TMP1]], ptr [[TMP2]], align 4198; VF2IC2-NEXT: store <2 x i32> [[TMP1]], ptr [[TMP4]], align 4199; VF2IC2-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP3]], i64 2200; VF2IC2-NEXT: store <2 x i32> [[TMP7]], ptr [[TMP3]], align 4201; VF2IC2-NEXT: store <2 x i32> [[TMP7]], ptr [[TMP5]], align 4202; VF2IC2-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4203; VF2IC2-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024204; VF2IC2-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]205; VF2IC2: [[MIDDLE_BLOCK]]:206; VF2IC2-NEXT: br label %[[EXIT:.*]]207; VF2IC2: [[EXIT]]:208; VF2IC2-NEXT: ret void209;210entry:211 br label %loop212 213loop:214 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]215 %gep.A = getelementptr i32, ptr %A, i32 %iv216 %gep.B = getelementptr i32, ptr %B, i32 %iv217 %wide.add = add i32 %x, 1218 %wide.mul = mul i32 %wide.add, 3219 store i32 %wide.add, ptr %gep.A220 store i32 %wide.mul, ptr %gep.B221 %iv.next = add i32 %iv, 1222 %ec = icmp ne i32 %iv.next, 1024223 br i1 %ec, label %loop, label %exit224 225exit:226 ret void227}228