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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 52; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s3 4define void @pr125278(ptr %dst, i64 %n) {5; CHECK-LABEL: define void @pr125278(6; CHECK-SAME: ptr [[DST:%.*]], i64 [[N:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: [[TRUE_EXT:%.*]] = zext i1 true to i329; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[N]], i64 1)10; CHECK-NEXT: br label %[[COND:.*]]11; CHECK: [[COND_LOOPEXIT:.*]]:12; CHECK-NEXT: br label %[[COND]]13; CHECK: [[COND]]:14; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[UMAX]], 415; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]16; CHECK: [[VECTOR_PH]]:17; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[UMAX]], 418; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[UMAX]], [[N_MOD_VF]]19; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]20; CHECK: [[VECTOR_BODY]]:21; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]22; CHECK-NEXT: store i8 1, ptr [[DST]], align 123; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 424; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]25; CHECK-NEXT: br i1 [[TMP0]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]26; CHECK: [[MIDDLE_BLOCK]]:27; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[UMAX]], [[N_VEC]]28; CHECK-NEXT: br i1 [[CMP_N]], label %[[COND_LOOPEXIT]], label %[[SCALAR_PH]]29; CHECK: [[SCALAR_PH]]:30; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[COND]] ]31; CHECK-NEXT: br label %[[LOOP:.*]]32; CHECK: [[LOOP]]:33; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]34; CHECK-NEXT: [[FALSE_EXT:%.*]] = zext i1 false to i3235; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[FALSE_EXT]], [[TRUE_EXT]]36; CHECK-NEXT: [[XOR_TRUNC:%.*]] = trunc i32 [[XOR]] to i837; CHECK-NEXT: store i8 [[XOR_TRUNC]], ptr [[DST]], align 138; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 139; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_NEXT]], [[N]]40; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[COND_LOOPEXIT]], !llvm.loop [[LOOP3:![0-9]+]]41;42entry:43 %true.ext = zext i1 true to i3244 br label %cond45 46cond:47 br label %loop48 49loop:50 %iv = phi i64 [ 0, %cond ], [ %iv.next, %loop ]51 %false.ext = zext i1 false to i3252 %xor = xor i32 %false.ext, %true.ext53 %xor.trunc = trunc i32 %xor to i854 store i8 %xor.trunc, ptr %dst, align 155 %iv.next = add i64 %iv, 156 %cmp = icmp ult i64 %iv.next, %n57 br i1 %cmp, label %loop, label %cond58}59