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1; REQUIRES: asserts2; RUN: opt -S -passes=loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -enable-interleaved-mem-accesses -debug-only=loop-vectorize,vectorutils -disable-output < %s 2>&1 | FileCheck %s3 4target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"5 6; Ensure that we don't create interleave groups for predicated7; strided accesses.8 9; CHECK: LV: Checking a loop in 'masked_strided'10; CHECK: LV: Analyzing interleaved accesses...11; CHECK-NOT: LV: Creating an interleave group12 13define dso_local void @masked_strided(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr {14entry:15 %conv = zext i8 %guard to i3216 br label %for.body17 18for.body:19 %ix.017 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]20 %cmp1 = icmp ugt i32 %ix.017, %conv21 br i1 %cmp1, label %if.then, label %for.inc22 23if.then:24 %mul = shl nuw nsw i32 %ix.017, 125 %arrayidx = getelementptr inbounds i8, ptr %p, i32 %mul26 %0 = load i8, ptr %arrayidx, align 127 %arrayidx4 = getelementptr inbounds i8, ptr %q, i32 %mul28 store i8 %0, ptr %arrayidx4, align 129 %sub = sub i8 0, %030 %add = or disjoint i32 %mul, 131 %arrayidx8 = getelementptr inbounds i8, ptr %q, i32 %add32 store i8 %sub, ptr %arrayidx8, align 133 br label %for.inc34 35for.inc:36 %inc = add nuw nsw i32 %ix.017, 137 %exitcond = icmp eq i32 %inc, 102438 br i1 %exitcond, label %for.end, label %for.body39 40for.end:41 ret void42}43