159 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-distribute,loop-vectorize -enable-loop-distribute -force-vector-width=4 -force-vector-interleave=1 -S \3; RUN: %s | FileCheck %s4 5; This test is to assure LoopAccessInfo invalidation after LoopVectorize6; modifies the IR.7define void @reduced(ptr %0, ptr %1, i64 %iv, ptr %2, i64 %iv76, i64 %iv93) {8; CHECK-LABEL: @reduced(9; CHECK-NEXT: entry:10; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[IV:%.*]], 111; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 412; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]13; CHECK: vector.ph:14; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 415; CHECK-NEXT: [[IND_END:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]16; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]17; CHECK: vector.body:18; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]19; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 420; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[IND_END]]21; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]22; CHECK: middle.block:23; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[IND_END]]24; CHECK-NEXT: [[IND_ESCAPE:%.*]] = sub i64 [[IND_END]], 125; CHECK-NEXT: br i1 [[CMP_N]], label [[LOOP_2_PREHEADER:%.*]], label [[SCALAR_PH]]26; CHECK: scalar.ph:27; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]28; CHECK-NEXT: br label [[LOOP_1:%.*]]29; CHECK: loop.1:30; CHECK-NEXT: [[IV761:%.*]] = phi i64 [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ], [ [[IV_NEXT77:%.*]], [[LOOP_1]] ]31; CHECK-NEXT: [[IV4:%.*]] = phi i64 [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_1]] ]32; CHECK-NEXT: [[IV_NEXT77]] = add i64 [[IV761]], 133; CHECK-NEXT: [[ARRAYIDX_I_I50:%.*]] = getelementptr i32, ptr [[TMP0:%.*]], i64 [[IV76:%.*]]34; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV4]], 135; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV4]], [[IV]]36; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[LOOP_2_PREHEADER]], label [[LOOP_1]], !llvm.loop [[LOOP3:![0-9]+]]37; CHECK: loop.2.preheader:38; CHECK-NEXT: [[IV761_LCSSA:%.*]] = phi i64 [ [[IV761]], [[LOOP_1]] ], [ [[IND_ESCAPE]], [[MIDDLE_BLOCK]] ]39; CHECK-NEXT: [[MIN_ITERS_CHECK6:%.*]] = icmp ult i64 [[TMP3]], 440; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK6]], label [[SCALAR_PH5:%.*]], label [[VECTOR_MEMCHECK:%.*]]41; CHECK: vector.memcheck:42; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[TMP1:%.*]], i64 443; CHECK-NEXT: [[TMP9:%.*]] = shl i64 [[IV761_LCSSA]], 244; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP9]]45; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[TMP9]], 446; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP10]]47; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[TMP1]], [[SCEVGEP3]]48; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[SCEVGEP2]], [[SCEVGEP]]49; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]50; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH5]], label [[VECTOR_PH6:%.*]]51; CHECK: vector.ph5:52; CHECK-NEXT: [[N_MOD_VF8:%.*]] = urem i64 [[TMP3]], 453; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF8]]54; CHECK-NEXT: br label [[VECTOR_BODY10:%.*]]55; CHECK: vector.body8:56; CHECK-NEXT: [[INDEX12:%.*]] = phi i64 [ 0, [[VECTOR_PH6]] ], [ [[INDEX_NEXT13:%.*]], [[VECTOR_BODY10]] ]57; CHECK-NEXT: store i32 0, ptr [[TMP1]], align 4, !alias.scope [[META4:![0-9]+]], !noalias [[META7:![0-9]+]]58; CHECK-NEXT: [[INDEX_NEXT13]] = add nuw i64 [[INDEX12]], 459; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT13]], [[N_VEC]]60; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK12:%.*]], label [[VECTOR_BODY10]], !llvm.loop [[LOOP9:![0-9]+]]61; CHECK: middle.block11:62; CHECK-NEXT: [[CMP_N10:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]63; CHECK-NEXT: br i1 [[CMP_N10]], label [[LOOP_3_LR_PH:%.*]], label [[SCALAR_PH5]]64; CHECK: scalar.ph3:65; CHECK-NEXT: [[BC_RESUME_VAL13:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK12]] ], [ 0, [[LOOP_2_PREHEADER]] ], [ 0, [[VECTOR_MEMCHECK]] ]66; CHECK-NEXT: br label [[LOOP_2:%.*]]67; CHECK: loop.3.lr.ph:68; CHECK-NEXT: [[IDXPROM_I_I61:%.*]] = and i64 [[IV761_LCSSA]], 169; CHECK-NEXT: [[ARRAYIDX_I_I62:%.*]] = getelementptr i32, ptr [[TMP0]], i64 [[IDXPROM_I_I61]]70; CHECK-NEXT: [[MIN_ITERS_CHECK22:%.*]] = icmp ult i64 [[TMP3]], 471; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK22]], label [[SCALAR_PH21:%.*]], label [[VECTOR_MEMCHECK15:%.*]]72; CHECK: vector.memcheck14:73; CHECK-NEXT: [[SCEVGEP15:%.*]] = getelementptr i8, ptr [[TMP1]], i64 474; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[IDXPROM_I_I61]], 275; CHECK-NEXT: [[TMP13:%.*]] = add nuw nsw i64 [[TMP12]], 476; CHECK-NEXT: [[SCEVGEP16:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP13]]77; CHECK-NEXT: [[BOUND017:%.*]] = icmp ult ptr [[TMP1]], [[SCEVGEP16]]78; CHECK-NEXT: [[BOUND118:%.*]] = icmp ult ptr [[ARRAYIDX_I_I62]], [[SCEVGEP15]]79; CHECK-NEXT: [[FOUND_CONFLICT19:%.*]] = and i1 [[BOUND017]], [[BOUND118]]80; CHECK-NEXT: br i1 [[FOUND_CONFLICT19]], label [[SCALAR_PH21]], label [[VECTOR_PH24:%.*]]81; CHECK: vector.ph22:82; CHECK-NEXT: [[N_MOD_VF24:%.*]] = urem i64 [[TMP3]], 483; CHECK-NEXT: [[N_VEC25:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF24]]84; CHECK-NEXT: br label [[VECTOR_BODY27:%.*]]85; CHECK: vector.body25:86; CHECK-NEXT: [[INDEX29:%.*]] = phi i64 [ 0, [[VECTOR_PH24]] ], [ [[INDEX_NEXT29:%.*]], [[VECTOR_BODY27]] ]87; CHECK-NEXT: store i32 0, ptr [[TMP1]], align 4, !alias.scope [[META10:![0-9]+]], !noalias [[META13:![0-9]+]]88; CHECK-NEXT: [[INDEX_NEXT29]] = add nuw i64 [[INDEX29]], 489; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT29]], [[N_VEC25]]90; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK29:%.*]], label [[VECTOR_BODY27]], !llvm.loop [[LOOP15:![0-9]+]]91; CHECK: middle.block28:92; CHECK-NEXT: [[CMP_N27:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC25]]93; CHECK-NEXT: br i1 [[CMP_N27]], label [[LOOP_CLEANUP:%.*]], label [[SCALAR_PH21]]94; CHECK: scalar.ph20:95; CHECK-NEXT: [[BC_RESUME_VAL26:%.*]] = phi i64 [ [[N_VEC25]], [[MIDDLE_BLOCK29]] ], [ 0, [[LOOP_3_LR_PH]] ], [ 0, [[VECTOR_MEMCHECK15]] ]96; CHECK-NEXT: br label [[LOOP_3:%.*]]97; CHECK: loop.2:98; CHECK-NEXT: [[IV846:%.*]] = phi i64 [ [[IV_NEXT85:%.*]], [[LOOP_2]] ], [ [[BC_RESUME_VAL13]], [[SCALAR_PH5]] ]99; CHECK-NEXT: [[IV_NEXT87:%.*]] = add i64 0, 0100; CHECK-NEXT: [[ARRAYIDX_I_I56:%.*]] = getelementptr i32, ptr [[TMP0]], i64 [[IV761_LCSSA]]101; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX_I_I56]], align 4102; CHECK-NEXT: store i32 0, ptr [[TMP1]], align 4103; CHECK-NEXT: [[IV_NEXT85]] = add i64 [[IV846]], 1104; CHECK-NEXT: [[EXITCOND92_NOT:%.*]] = icmp eq i64 [[IV846]], [[IV]]105; CHECK-NEXT: br i1 [[EXITCOND92_NOT]], label [[LOOP_3_LR_PH]], label [[LOOP_2]], !llvm.loop [[LOOP16:![0-9]+]]106; CHECK: loop.3:107; CHECK-NEXT: [[IV932:%.*]] = phi i64 [ [[BC_RESUME_VAL26]], [[SCALAR_PH21]] ], [ [[IV_NEXT94:%.*]], [[LOOP_3]] ]108; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[ARRAYIDX_I_I62]], align 4109; CHECK-NEXT: [[ARRAYIDX_I_I653:%.*]] = getelementptr i32, ptr [[TMP2:%.*]], i64 [[IV93:%.*]]110; CHECK-NEXT: store i32 0, ptr [[TMP1]], align 4111; CHECK-NEXT: [[IV_NEXT94]] = add i64 [[IV932]], 1112; CHECK-NEXT: [[EXITCOND97_NOT:%.*]] = icmp eq i64 [[IV932]], [[IV]]113; CHECK-NEXT: br i1 [[EXITCOND97_NOT]], label [[LOOP_CLEANUP]], label [[LOOP_3]], !llvm.loop [[LOOP17:![0-9]+]]114; CHECK: loop.cleanup:115; CHECK-NEXT: ret void116;117entry:118 br label %loop.1119 120loop.1: ; preds = %loop.1, %entry121 %iv761 = phi i64 [ 0, %entry ], [ %iv.next77, %loop.1 ]122 %iv4 = phi i64 [ 0, %entry ], [ %iv.next, %loop.1 ]123 %iv.next77 = add i64 %iv761, 1124 %arrayidx.i.i50 = getelementptr i32, ptr %0, i64 %iv76125 %iv.next = add i64 %iv4, 1126 %exitcond.not = icmp eq i64 %iv4, %iv127 br i1 %exitcond.not, label %loop.2.preheader, label %loop.1128 129loop.2.preheader: ; preds = %loop.1130 br label %loop.2131 132loop.3.lr.ph: ; preds = %loop.2133 %idxprom.i.i61 = and i64 %iv761, 1134 %arrayidx.i.i62 = getelementptr i32, ptr %0, i64 %idxprom.i.i61135 br label %loop.3136 137loop.2: ; preds = %loop.2, %loop.2.preheader138 %iv846 = phi i64 [ %iv.next85, %loop.2 ], [ 0, %loop.2.preheader ]139 %iv.next87 = add i64 0, 0140 %arrayidx.i.i56 = getelementptr i32, ptr %0, i64 %iv761141 %3 = load i32, ptr %arrayidx.i.i56, align 4142 store i32 0, ptr %1, align 4143 %iv.next85 = add i64 %iv846, 1144 %exitcond92.not = icmp eq i64 %iv846, %iv145 br i1 %exitcond92.not, label %loop.3.lr.ph, label %loop.2146 147loop.3: ; preds = %loop.3, %loop.3.lr.ph148 %iv932 = phi i64 [ 0, %loop.3.lr.ph ], [ %iv.next94, %loop.3 ]149 %4 = load i32, ptr %arrayidx.i.i62, align 4150 %arrayidx.i.i653 = getelementptr i32, ptr %2, i64 %iv93151 store i32 0, ptr %1, align 4152 %iv.next94 = add i64 %iv932, 1153 %exitcond97.not = icmp eq i64 %iv932, %iv154 br i1 %exitcond97.not, label %loop.cleanup, label %loop.3155 156loop.cleanup: ; preds = %loop.3157 ret void158}159