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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 32; RUN: opt -passes="print<scalar-evolution>,loop-vectorize" --verify-scev -S < %s -force-vector-width=4 2>/dev/null | FileCheck %s3 4; Make sure users of SCEVUnknowns from the scalar loop are invalidated.5 6define void @pr66616(ptr %ptr) {7; CHECK-LABEL: define void @pr66616(8; CHECK-SAME: ptr [[PTR:%.*]]) {9; CHECK-NEXT: entry:10; CHECK-NEXT: br label [[VECTOR_PH:%.*]]11; CHECK: vector.ph:12; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]13; CHECK: vector.body:14; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]15; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR]], align 416; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], 117; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 418; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], 25619; CHECK-NEXT: br i1 [[TMP2]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]20; CHECK: middle.block:21; CHECK-NEXT: br label [[LOOP_1:%.*]]22; CHECK: preheader:23; CHECK-NEXT: [[TMP4:%.*]] = sub i32 -1, [[TMP0]]24; CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i6425; CHECK-NEXT: [[TMP6:%.*]] = add nuw nsw i64 [[TMP5]], 126; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP6]], 427; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH1:%.*]], label [[VECTOR_PH2:%.*]]28; CHECK: vector.ph1:29; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP6]], 430; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP6]], [[N_MOD_VF]]31; CHECK-NEXT: [[DOTCAST:%.*]] = trunc i64 [[N_VEC]] to i3232; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP3]], [[DOTCAST]]33; CHECK-NEXT: [[IND_END5:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[N_VEC]]34; CHECK-NEXT: br label [[VECTOR_BODY3:%.*]]35; CHECK: vector.body2:36; CHECK-NEXT: [[INDEX8:%.*]] = phi i64 [ 0, [[VECTOR_PH2]] ], [ [[INDEX_NEXT9:%.*]], [[VECTOR_BODY3]] ]37; CHECK-NEXT: [[INDEX_NEXT9]] = add nuw i64 [[INDEX8]], 438; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT9]], [[N_VEC]]39; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK5:%.*]], label [[VECTOR_BODY3]], !llvm.loop [[LOOP3:![0-9]+]]40; CHECK: middle.block5:41; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP6]], [[N_VEC]]42; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH1]]43; CHECK: scalar.ph:44; CHECK-NEXT: [[BC_RESUME_VAL4:%.*]] = phi i32 [ [[TMP8]], [[MIDDLE_BLOCK5]] ], [ [[TMP3]], [[LOOP_1]] ]45; CHECK-NEXT: [[BC_RESUME_VAL6:%.*]] = phi ptr [ [[IND_END5]], [[MIDDLE_BLOCK5]] ], [ [[PTR]], [[LOOP_1]] ]46; CHECK-NEXT: br label [[LOOP_2:%.*]]47; CHECK: loop.2:48; CHECK-NEXT: [[IV_2:%.*]] = phi i32 [ [[IV_2_I:%.*]], [[LOOP_2]] ], [ [[BC_RESUME_VAL4]], [[SCALAR_PH1]] ]49; CHECK-NEXT: [[IV_3:%.*]] = phi ptr [ [[IV_3_I:%.*]], [[LOOP_2]] ], [ [[BC_RESUME_VAL6]], [[SCALAR_PH1]] ]50; CHECK-NEXT: [[IV_2_I]] = add i32 [[IV_2]], 151; CHECK-NEXT: [[IV_3_I]] = getelementptr i8, ptr [[IV_3]], i64 152; CHECK-NEXT: [[COND2:%.*]] = icmp eq i32 [[IV_2]], 053; CHECK-NEXT: br i1 [[COND2]], label [[EXIT]], label [[LOOP_2]], !llvm.loop [[LOOP4:![0-9]+]]54; CHECK: exit:55; CHECK-NEXT: ret void56;57entry:58 br label %loop.159 60loop.1:61 %iv.1 = phi i8 [ 0, %entry ], [ %inc, %loop.1 ]62 %load = load i32, ptr %ptr, align 463 %add3 = add i32 %load, 164 %inc = add i8 %iv.1, 165 %cond1 = icmp eq i8 %inc, 066 br i1 %cond1, label %preheader, label %loop.167 68preheader:69 br label %loop.270 71loop.2:72 %iv.2 = phi i32 [ %iv.2.i, %loop.2 ], [ %add3, %preheader ]73 %iv.3 = phi ptr [ %iv.3.i, %loop.2 ], [ %ptr, %preheader ]74 %iv.2.i = add i32 %iv.2, 175 %iv.3.i = getelementptr i8, ptr %iv.3, i64 176 %cond2 = icmp eq i32 %iv.2, 077 br i1 %cond2, label %exit, label %loop.278 79exit:80 ret void81}82