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1; RUN: opt < %s -passes=debugify,loop-vectorize -force-vector-width=4 -prefer-inloop-reductions -S | FileCheck %s -check-prefix DEBUGLOC2 3; Testing the debug locations of the generated vector intstructions are same as4; their scalar counterpart.5 6define i32 @reduction_sum(ptr %A, ptr %B) {7; DEBUGLOC-LABEL: define i32 @reduction_sum(8; DEBUGLOC: vector.body:9; DEBUGLOC: = load <4 x i32>, ptr %{{.+}}, align 4, !dbg ![[LOADLOC:[0-9]+]]10; DEBUGLOC: = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %{{.+}}), !dbg ![[REDLOC:[0-9]+]]11; DEBUGLOC: loop:12; DEBUGLOC: %[[LOAD:.+]] = load i32, ptr %{{.+}}, align 4, !dbg ![[LOADLOC]]13; DEBUGLOC: = add i32 %{{.+}}, %[[LOAD]], !dbg ![[REDLOC]]14;15entry:16 br label %loop17 18loop:19 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]20 %red = phi i32 [ 0, %entry ], [ %red.next, %loop ]21 %gep = getelementptr inbounds i32, ptr %A, i64 %iv22 %load = load i32, ptr %gep, align 423 %red.next = add i32 %red, %load24 %iv.next = add i64 %iv, 125 %exitcond = icmp eq i64 %iv.next, 25726 br i1 %exitcond, label %exit, label %loop27 28exit:29 %red.lcssa = phi i32 [ %red.next, %loop ]30 ret i32 %red.lcssa31}32 33; DEBUGLOC: ![[LOADLOC]] = !DILocation(line: 534; DEBUGLOC: ![[REDLOC]] = !DILocation(line: 635