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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -force-vector-width=4 -force-vector-interleave=1 -passes=loop-vectorize -S | FileCheck %s3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"5 6define i8 @PR34687(i1 %c, i32 %x, i32 %n, i32 %divisor) {7; CHECK-LABEL: @PR34687(8; CHECK-NEXT: entry:9; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 410; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]11; CHECK: vector.ph:12; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 413; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]14; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[X:%.*]], i64 015; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT1]], <4 x i32> poison, <4 x i32> zeroinitializer16; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[C:%.*]], <4 x i32> [[BROADCAST_SPLAT2]], <4 x i32> splat (i32 1)17; CHECK-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x i32> poison, i32 [[X1:%.*]], i64 018; CHECK-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT3]], <4 x i32> poison, <4 x i32> zeroinitializer19; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]20; CHECK: vector.body:21; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]22; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]23; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ]24; CHECK-NEXT: [[TMP6:%.*]] = sdiv <4 x i32> [[VEC_IND]], [[TMP0]]25; CHECK-NEXT: [[PREDPHI1:%.*]] = select i1 [[C]], <4 x i32> [[TMP6]], <4 x i32> zeroinitializer26; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i32> [[VEC_PHI]], splat (i32 255)27; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i32> [[TMP1]], [[BROADCAST_SPLAT4]]28; CHECK-NEXT: [[TMP3:%.*]] = trunc <4 x i32> [[TMP2]] to <4 x i8>29; CHECK-NEXT: [[TMP4]] = zext <4 x i8> [[TMP3]] to <4 x i32>30; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 431; CHECK-NEXT: [[VEC_IND_NEXT]] = add nsw <4 x i32> [[VEC_IND]], splat (i32 4)32; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]33; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]34; CHECK: middle.block:35; CHECK-NEXT: [[TMP7:%.*]] = call i8 @llvm.vector.reduce.add.v4i8(<4 x i8> [[TMP3]])36; CHECK-NEXT: [[TMP8:%.*]] = zext i8 [[TMP7]] to i3237; CHECK-NEXT: [[PREDPHI:%.*]] = extractelement <4 x i32> [[PREDPHI1]], i32 338; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]39; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]40; CHECK: scalar.ph:41; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]42; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP8]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]43; CHECK-NEXT: br label [[FOR_BODY:%.*]]44; CHECK: for.body:45; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[IF_END:%.*]] ]46; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[R_NEXT:%.*]], [[IF_END]] ]47; CHECK-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[IF_END]]48; CHECK: if.then:49; CHECK-NEXT: [[T0:%.*]] = sdiv i32 [[I]], [[X]]50; CHECK-NEXT: br label [[IF_END]]51; CHECK: if.end:52; CHECK-NEXT: [[DIV_PHI:%.*]] = phi i32 [ 0, [[FOR_BODY]] ], [ [[T0]], [[IF_THEN]] ]53; CHECK-NEXT: [[T1:%.*]] = and i32 [[R]], 25554; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 155; CHECK-NEXT: [[R_NEXT]] = add nuw nsw i32 [[T1]], [[X1]]56; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]]57; CHECK-NEXT: br i1 [[COND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]58; CHECK: for.end:59; CHECK-NEXT: [[DIV_USE:%.*]] = phi i32 [ [[DIV_PHI]], [[IF_END]] ], [ [[PREDPHI]], [[MIDDLE_BLOCK]] ]60; CHECK-NEXT: [[T2:%.*]] = phi i32 [ [[R_NEXT]], [[IF_END]] ], [ [[TMP8]], [[MIDDLE_BLOCK]] ]61; CHECK-NEXT: [[T3:%.*]] = trunc i32 [[T2]] to i862; CHECK-NEXT: ret i8 [[T3]]63;64entry:65 br label %for.body66 67for.body:68 %i = phi i32 [ 0, %entry ], [ %i.next, %if.end ]69 %r = phi i32 [ 0, %entry ], [ %r.next, %if.end ]70 br i1 %c, label %if.then, label %if.end71 72if.then:73 %t0 = sdiv i32 %i, %divisor74 br label %if.end75 76if.end:77 %div_phi = phi i32 [ 0, %for.body ], [ %t0, %if.then ]78 %t1 = and i32 %r, 25579 %i.next = add nsw i32 %i, 180 %r.next = add nuw nsw i32 %t1, %x81 %cond = icmp eq i32 %i.next, %n82 br i1 %cond, label %for.end, label %for.body83 84for.end:85 %div_use = phi i32 [ %div_phi, %if.end ]86 %t2 = phi i32 [ %r.next, %if.end ]87 %t3 = trunc i32 %t2 to i888 ret i8 %t389}90 91define i8 @PR34687_no_undef(i1 %c, i32 %x, i32 %n) {92; CHECK-LABEL: @PR34687_no_undef(93; CHECK-NEXT: entry:94; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 495; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]96; CHECK: vector.ph:97; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 498; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]99; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[X:%.*]], i64 0100; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT1]], <4 x i32> poison, <4 x i32> zeroinitializer101; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[C:%.*]], <4 x i32> [[BROADCAST_SPLAT2]], <4 x i32> splat (i32 1)102; CHECK-NEXT: [[TMP1:%.*]] = sdiv <4 x i32> splat (i32 99), [[TMP0]]103; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 [[C]], <4 x i32> [[TMP1]], <4 x i32> zeroinitializer104; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]105; CHECK: vector.body:106; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]107; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ]108; CHECK-NEXT: [[TMP3:%.*]] = and <4 x i32> [[VEC_PHI]], splat (i32 255)109; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i32> [[TMP3]], [[PREDPHI]]110; CHECK-NEXT: [[TMP5:%.*]] = trunc <4 x i32> [[TMP4]] to <4 x i8>111; CHECK-NEXT: [[TMP6]] = zext <4 x i8> [[TMP5]] to <4 x i32>112; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4113; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]114; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]115; CHECK: middle.block:116; CHECK-NEXT: [[TMP9:%.*]] = call i8 @llvm.vector.reduce.add.v4i8(<4 x i8> [[TMP5]])117; CHECK-NEXT: [[TMP10:%.*]] = zext i8 [[TMP9]] to i32118; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]119; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]120; CHECK: scalar.ph:121; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]122; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP10]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]123; CHECK-NEXT: br label [[FOR_BODY:%.*]]124; CHECK: for.body:125; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[IF_END:%.*]] ]126; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[R_NEXT:%.*]], [[IF_END]] ]127; CHECK-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[IF_END]]128; CHECK: if.then:129; CHECK-NEXT: [[T0:%.*]] = sdiv i32 99, [[X]]130; CHECK-NEXT: br label [[IF_END]]131; CHECK: if.end:132; CHECK-NEXT: [[P:%.*]] = phi i32 [ 0, [[FOR_BODY]] ], [ [[T0]], [[IF_THEN]] ]133; CHECK-NEXT: [[T1:%.*]] = and i32 [[R]], 255134; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1135; CHECK-NEXT: [[R_NEXT]] = add nuw nsw i32 [[T1]], [[P]]136; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]]137; CHECK-NEXT: br i1 [[COND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]138; CHECK: for.end:139; CHECK-NEXT: [[T2:%.*]] = phi i32 [ [[R_NEXT]], [[IF_END]] ], [ [[TMP10]], [[MIDDLE_BLOCK]] ]140; CHECK-NEXT: [[T3:%.*]] = trunc i32 [[T2]] to i8141; CHECK-NEXT: ret i8 [[T3]]142;143entry:144 br label %for.body145 146for.body:147 %i = phi i32 [ 0, %entry ], [ %i.next, %if.end ]148 %r = phi i32 [ 0, %entry ], [ %r.next, %if.end ]149 br i1 %c, label %if.then, label %if.end150 151if.then:152 %t0 = sdiv i32 99, %x153 br label %if.end154 155if.end:156 %p = phi i32 [ 0, %for.body ], [ %t0, %if.then ]157 %t1 = and i32 %r, 255158 %i.next = add nsw i32 %i, 1159 %r.next = add nuw nsw i32 %t1, %p160 %cond = icmp eq i32 %i.next, %n161 br i1 %cond, label %for.end, label %for.body162 163for.end:164 %t2 = phi i32 [ %r.next, %if.end ]165 %t3 = trunc i32 %t2 to i8166 ret i8 %t3167}168 169define i32 @PR35734(i32 %x, i32 %y) {170; CHECK-LABEL: @PR35734(171; CHECK-NEXT: entry:172; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 78)173; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SMAX]], 1174; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[X]]175; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP1]], 4176; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]177; CHECK: vector.ph:178; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP1]], 4179; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP1]], [[N_MOD_VF]]180; CHECK-NEXT: [[IND_END:%.*]] = add i32 [[X]], [[N_VEC]]181; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[Y:%.*]], i32 0182; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]183; CHECK: vector.body:184; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]185; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ [[TMP2]], [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ]186; CHECK-NEXT: [[TMP3:%.*]] = and <4 x i32> [[VEC_PHI]], splat (i32 1)187; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i32> [[TMP3]], splat (i32 -1)188; CHECK-NEXT: [[TMP5:%.*]] = trunc <4 x i32> [[TMP4]] to <4 x i1>189; CHECK-NEXT: [[TMP6]] = sext <4 x i1> [[TMP5]] to <4 x i32>190; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4191; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]192; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]193; CHECK: middle.block:194; CHECK-NEXT: [[TMP9:%.*]] = call i1 @llvm.vector.reduce.add.v4i1(<4 x i1> [[TMP5]])195; CHECK-NEXT: [[TMP10:%.*]] = sext i1 [[TMP9]] to i32196; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP1]], [[N_VEC]]197; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]198; CHECK: scalar.ph:199; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[X]], [[ENTRY:%.*]] ]200; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP10]], [[MIDDLE_BLOCK]] ], [ [[Y]], [[ENTRY]] ]201; CHECK-NEXT: br label [[FOR_BODY:%.*]]202; CHECK: for.body:203; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[FOR_BODY]] ]204; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[R_NEXT:%.*]], [[FOR_BODY]] ]205; CHECK-NEXT: [[T0:%.*]] = and i32 [[R]], 1206; CHECK-NEXT: [[R_NEXT]] = add i32 [[T0]], -1207; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1208; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[I]], 77209; CHECK-NEXT: br i1 [[COND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]210; CHECK: for.end:211; CHECK-NEXT: [[T1:%.*]] = phi i32 [ [[R_NEXT]], [[FOR_BODY]] ], [ [[TMP10]], [[MIDDLE_BLOCK]] ]212; CHECK-NEXT: ret i32 [[T1]]213;214entry:215 br label %for.body216 217for.body:218 %i = phi i32 [ %x, %entry ], [ %i.next, %for.body ]219 %r = phi i32 [ %y, %entry ], [ %r.next, %for.body ]220 %t0 = and i32 %r, 1221 %r.next = add i32 %t0, -1222 %i.next = add nsw i32 %i, 1223 %cond = icmp sgt i32 %i, 77224 br i1 %cond, label %for.end, label %for.body225 226for.end:227 %t1 = phi i32 [ %r.next, %for.body ]228 ret i32 %t1229}230 231define i32 @pr51794_signed_negative(i16 %iv.start, i32 %xor.start) {232; CHECK-LABEL: @pr51794_signed_negative(233; CHECK-NEXT: entry:234; CHECK-NEXT: br label [[LOOP:%.*]]235; CHECK: loop:236; CHECK-NEXT: [[XOR_RED:%.*]] = phi i32 [ [[XOR_START:%.*]], [[ENTRY:%.*]] ], [ [[XOR:%.*]], [[LOOP]] ]237; CHECK-NEXT: [[IV:%.*]] = phi i16 [ [[IV_START:%.*]], [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]238; CHECK-NEXT: [[IV_NEXT]] = add i16 [[IV]], -1239; CHECK-NEXT: [[AND:%.*]] = and i32 [[XOR_RED]], 1240; CHECK-NEXT: [[XOR]] = xor i32 [[AND]], -1241; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i16 [[IV_NEXT]], 0242; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[EXIT:%.*]], label [[LOOP]]243; CHECK: exit:244; CHECK-NEXT: [[XOR_LCSSA:%.*]] = phi i32 [ [[XOR]], [[LOOP]] ]245; CHECK-NEXT: ret i32 [[XOR_LCSSA]]246;247entry:248 br label %loop249 250loop:251 %xor.red = phi i32 [ %xor.start, %entry ], [ %xor, %loop ]252 %iv = phi i16 [ %iv.start, %entry ], [ %iv.next, %loop ]253 %iv.next = add i16 %iv, -1254 %and = and i32 %xor.red, 1255 %xor = xor i32 %and, -1256 %tobool.not = icmp eq i16 %iv.next, 0257 br i1 %tobool.not, label %exit, label %loop258 259exit:260 %xor.lcssa = phi i32 [ %xor, %loop ]261 ret i32 %xor.lcssa262}263 264define i32 @pr52485_signed_negative(i32 %xor.start) {265; CHECK-LABEL: @pr52485_signed_negative(266; CHECK-NEXT: entry:267; CHECK-NEXT: br label [[LOOP:%.*]]268; CHECK: loop:269; CHECK-NEXT: [[IV:%.*]] = phi i32 [ -23, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]270; CHECK-NEXT: [[XOR_RED:%.*]] = phi i32 [ [[XOR_START:%.*]], [[ENTRY]] ], [ [[XOR:%.*]], [[LOOP]] ]271; CHECK-NEXT: [[AND:%.*]] = and i32 [[XOR_RED]], 255272; CHECK-NEXT: [[XOR]] = xor i32 [[AND]], -9273; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 2274; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[IV_NEXT]], -15275; CHECK-NEXT: br i1 [[CMP_NOT]], label [[EXIT:%.*]], label [[LOOP]]276; CHECK: exit:277; CHECK-NEXT: [[XOR_LCSSA:%.*]] = phi i32 [ [[XOR]], [[LOOP]] ]278; CHECK-NEXT: ret i32 [[XOR_LCSSA]]279;280entry:281 br label %loop282 283loop:284 %iv = phi i32 [ -23, %entry ], [ %iv.next, %loop ]285 %xor.red = phi i32 [ %xor.start, %entry ], [ %xor, %loop ]286 %and = and i32 %xor.red, 255287 %xor = xor i32 %and, -9288 %iv.next = add nuw nsw i32 %iv, 2289 %cmp.not = icmp eq i32 %iv.next, -15290 br i1 %cmp.not, label %exit, label %loop291 292exit:293 %xor.lcssa = phi i32 [ %xor, %loop ]294 ret i32 %xor.lcssa295}296