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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s3 4; Tests where the indices of some accesses are clamped to a small range.5 6; FIXME: At the moment, the runtime checks require that the indices do not wrap7; and runtime checks are emitted to ensure that. The clamped indices do8; wrap, so the vector loops are dead at the moment. But it is still9; possible to compute the bounds of the accesses and generate proper10; runtime checks.11 12; The relevant bounds for %gep.A are [%A, %A+4).13define void @load_clamped_index(ptr %A, ptr %B, i32 %N) {14; CHECK-LABEL: @load_clamped_index(15; CHECK-NEXT: entry:16; CHECK-NEXT: [[A2:%.*]] = ptrtoint ptr [[A:%.*]] to i6417; CHECK-NEXT: [[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i6418; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 419; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]20; CHECK: vector.scevcheck:21; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -122; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 323; CHECK-NEXT: br i1 [[TMP1]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]24; CHECK: vector.memcheck:25; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]]26; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], 1627; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]28; CHECK: vector.ph:29; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 430; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]31; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]32; CHECK: vector.body:33; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]34; CHECK-NEXT: [[TMP4:%.*]] = urem i32 [[INDEX]], 435; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP4]]36; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP5]], align 437; CHECK-NEXT: [[TMP7:%.*]] = add <4 x i32> [[WIDE_LOAD]], splat (i32 10)38; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[INDEX]]39; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[TMP8]], align 440; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 441; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]42; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]43; CHECK: middle.block:44; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]45; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]46; CHECK: scalar.ph:47; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[VECTOR_MEMCHECK]] ]48; CHECK-NEXT: br label [[LOOP:%.*]]49; CHECK: loop:50; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]51; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV]], 452; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED_INDEX]]53; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[GEP_A]], align 454; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV]], 1055; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]]56; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP_B]], align 457; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 158; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]59; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]60; CHECK: exit:61; CHECK-NEXT: ret void62;63entry:64 br label %loop65 66loop:67 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]68 %clamped.index = urem i32 %iv, 469 %gep.A = getelementptr inbounds i32, ptr %A, i32 %clamped.index70 %lv = load i32, ptr %gep.A71 %add = add i32 %lv, 1072 %gep.B = getelementptr inbounds i32, ptr %B, i32 %iv73 store i32 %add, ptr %gep.B74 %iv.next = add nuw nsw i32 %iv, 175 %cond = icmp eq i32 %iv.next, %N76 br i1 %cond, label %exit, label %loop77 78exit:79 ret void80}81 82; The relevant bounds for %gep.A are [%A, %A+4).83define void @store_clamped_index(ptr %A, ptr %B, i32 %N) {84; CHECK-LABEL: @store_clamped_index(85; CHECK-NEXT: entry:86; CHECK-NEXT: [[B2:%.*]] = ptrtoint ptr [[B:%.*]] to i6487; CHECK-NEXT: [[A1:%.*]] = ptrtoint ptr [[A:%.*]] to i6488; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 489; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]90; CHECK: vector.scevcheck:91; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -192; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 393; CHECK-NEXT: br i1 [[TMP1]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]94; CHECK: vector.memcheck:95; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[A1]], [[B2]]96; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], 1697; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]98; CHECK: vector.ph:99; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 4100; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]101; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]102; CHECK: vector.body:103; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]104; CHECK-NEXT: [[TMP4:%.*]] = urem i32 [[INDEX]], 4105; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[INDEX]]106; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP5]], align 4107; CHECK-NEXT: [[TMP7:%.*]] = add <4 x i32> [[WIDE_LOAD]], splat (i32 10)108; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP4]]109; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[TMP8]], align 4110; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4111; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]112; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]113; CHECK: middle.block:114; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]115; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]116; CHECK: scalar.ph:117; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[VECTOR_MEMCHECK]] ]118; CHECK-NEXT: br label [[LOOP:%.*]]119; CHECK: loop:120; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]121; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV]], 4122; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]]123; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[GEP_B]], align 4124; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV]], 10125; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED_INDEX]]126; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP_A]], align 4127; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1128; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]129; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]130; CHECK: exit:131; CHECK-NEXT: ret void132;133entry:134 br label %loop135 136loop:137 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]138 %clamped.index = urem i32 %iv, 4139 %gep.B = getelementptr inbounds i32, ptr %B, i32 %iv140 %lv = load i32, ptr %gep.B141 %add = add i32 %lv, 10142 %gep.A = getelementptr inbounds i32, ptr %A, i32 %clamped.index143 store i32 %add, ptr %gep.A144 %iv.next = add nuw nsw i32 %iv, 1145 %cond = icmp eq i32 %iv.next, %N146 br i1 %cond, label %exit, label %loop147 148exit:149 ret void150}151 152; The relevant bounds for %gep.A are [%A, %A+4), but the access order is %A+1,153; %A+2, %A+3, %A.154define void @load_clamped_index_offset_1(ptr %A, ptr %B, i32 %N) {155; CHECK-LABEL: @load_clamped_index_offset_1(156; CHECK-NEXT: entry:157; CHECK-NEXT: [[A2:%.*]] = ptrtoint ptr [[A:%.*]] to i64158; CHECK-NEXT: [[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i64159; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1160; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP0]], 4161; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]162; CHECK: vector.scevcheck:163; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[N]], -2164; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i2165; CHECK-NEXT: [[TMP3:%.*]] = add i2 1, [[TMP2]]166; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i2 [[TMP3]], 1167; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i32 [[TMP1]], 3168; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]]169; CHECK-NEXT: br i1 [[TMP6]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]170; CHECK: vector.memcheck:171; CHECK-NEXT: [[TMP7:%.*]] = sub i64 [[B1]], [[A2]]172; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP7]], 16173; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]174; CHECK: vector.ph:175; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 4176; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[N_MOD_VF]]177; CHECK-NEXT: [[IND_END:%.*]] = add i32 1, [[N_VEC]]178; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]179; CHECK: vector.body:180; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]181; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i32 1, [[INDEX]]182; CHECK-NEXT: [[TMP11:%.*]] = urem i32 [[OFFSET_IDX]], 4183; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP11]]184; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP12]], align 4185; CHECK-NEXT: [[TMP14:%.*]] = add <4 x i32> [[WIDE_LOAD]], splat (i32 10)186; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[OFFSET_IDX]]187; CHECK-NEXT: store <4 x i32> [[TMP14]], ptr [[TMP15]], align 4188; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4189; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]190; CHECK-NEXT: br i1 [[TMP17]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]191; CHECK: middle.block:192; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP0]], [[N_VEC]]193; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]194; CHECK: scalar.ph:195; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 1, [[ENTRY:%.*]] ], [ 1, [[VECTOR_SCEVCHECK]] ], [ 1, [[VECTOR_MEMCHECK]] ]196; CHECK-NEXT: br label [[LOOP:%.*]]197; CHECK: loop:198; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]199; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV]], 4200; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED_INDEX]]201; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4202; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV]], 10203; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]]204; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP_B]], align 4205; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1206; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]207; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP7:![0-9]+]]208; CHECK: exit:209; CHECK-NEXT: ret void210;211entry:212 br label %loop213 214loop:215 %iv = phi i32 [ 1, %entry ], [ %iv.next, %loop ]216 %clamped.index = urem i32 %iv, 4217 %gep.A = getelementptr inbounds i32, ptr %A, i32 %clamped.index218 %lv = load i32, ptr %gep.A219 %add = add i32 %lv, 10220 %gep.B = getelementptr inbounds i32, ptr %B, i32 %iv221 store i32 %add, ptr %gep.B222 %iv.next = add nuw nsw i32 %iv, 1223 %cond = icmp eq i32 %iv.next, %N224 br i1 %cond, label %exit, label %loop225 226exit:227 ret void228}229 230; The relevant bounds for %gep.A are [%A, %A+5).231define void @load_clamped_index_urem_5(ptr %A, ptr %B, i32 %N) {232; CHECK-LABEL: @load_clamped_index_urem_5(233; CHECK-NEXT: entry:234; CHECK-NEXT: br label [[LOOP:%.*]]235; CHECK: loop:236; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]237; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV]], 5238; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[CLAMPED_INDEX]]239; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4240; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV]], 10241; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[IV]]242; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP_B]], align 4243; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1244; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]245; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[LOOP]]246; CHECK: exit:247; CHECK-NEXT: ret void248;249entry:250 br label %loop251 252loop:253 %iv = phi i32 [ 1, %entry ], [ %iv.next, %loop ]254 %clamped.index = urem i32 %iv, 5255 %gep.A = getelementptr inbounds i32, ptr %A, i32 %clamped.index256 %lv = load i32, ptr %gep.A257 %add = add i32 %lv, 10258 %gep.B = getelementptr inbounds i32, ptr %B, i32 %iv259 store i32 %add, ptr %gep.B260 %iv.next = add nuw nsw i32 %iv, 1261 %cond = icmp eq i32 %iv.next, %N262 br i1 %cond, label %exit, label %loop263 264exit:265 ret void266}267define void @clamped_index_dependence_non_clamped(ptr %A, ptr %B, i32 %N) {268; CHECK-LABEL: @clamped_index_dependence_non_clamped(269; CHECK-NEXT: entry:270; CHECK-NEXT: br label [[LOOP:%.*]]271; CHECK: loop:272; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]273; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[IV]]274; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[GEP_B]], align 4275; CHECK-NEXT: [[GEP_A_1:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[IV]]276; CHECK-NEXT: [[LV_A:%.*]] = load i32, ptr [[GEP_A_1]], align 4277; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV]], [[LV_A]]278; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1279; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV_NEXT]], 4280; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED_INDEX]]281; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP_A]], align 4282; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]283; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[LOOP]]284; CHECK: exit:285; CHECK-NEXT: ret void286;287entry:288 br label %loop289 290loop:291 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]292 %gep.B = getelementptr inbounds i32, ptr %B, i32 %iv293 %lv = load i32, ptr %gep.B294 %gep.A.1 = getelementptr inbounds i32, ptr %A, i32 %iv295 %lv.A = load i32, ptr %gep.A.1296 %add = add i32 %lv, %lv.A297 298 %iv.next = add nuw nsw i32 %iv, 1299 %clamped.index = urem i32 %iv.next, 4300 %gep.A = getelementptr inbounds i32, ptr %A, i32 %clamped.index301 store i32 %add, ptr %gep.A302 %cond = icmp eq i32 %iv.next, %N303 br i1 %cond, label %exit, label %loop304 305exit:306 ret void307}308 309define void @clamped_index_dependence_clamped_index(ptr %A, ptr %B, i32 %N) {310; CHECK-LABEL: @clamped_index_dependence_clamped_index(311; CHECK-NEXT: entry:312; CHECK-NEXT: br label [[LOOP:%.*]]313; CHECK: loop:314; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]315; CHECK-NEXT: [[CLAMPED_INDEX_1:%.*]] = urem i32 [[IV]], 4316; CHECK-NEXT: [[GEP_A_1:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[CLAMPED_INDEX_1]]317; CHECK-NEXT: [[LV_A:%.*]] = load i32, ptr [[GEP_A_1]], align 4318; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV_A]], 10319; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1320; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV_NEXT]], 4321; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED_INDEX]]322; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP_A]], align 4323; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]324; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[LOOP]]325; CHECK: exit:326; CHECK-NEXT: ret void327;328entry:329 br label %loop330 331loop:332 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]333 %clamped.index.1 = urem i32 %iv, 4334 %gep.A.1 = getelementptr inbounds i32, ptr %A, i32 %clamped.index.1335 %lv.A = load i32, ptr %gep.A.1336 %add = add i32 %lv.A, 10337 338 %iv.next = add nuw nsw i32 %iv, 1339 %clamped.index = urem i32 %iv.next, 4340 %gep.A = getelementptr inbounds i32, ptr %A, i32 %clamped.index341 store i32 %add, ptr %gep.A342 %cond = icmp eq i32 %iv.next, %N343 br i1 %cond, label %exit, label %loop344 345exit:346 ret void347}348 349define void @clamped_index_equal_dependence(ptr %A, ptr %B, i32 %N) {350; CHECK-LABEL: @clamped_index_equal_dependence(351; CHECK-NEXT: entry:352; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 4353; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]354; CHECK: vector.scevcheck:355; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1356; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 3357; CHECK-NEXT: br i1 [[TMP1]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]358; CHECK: vector.ph:359; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 4360; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]361; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]362; CHECK: vector.body:363; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]364; CHECK-NEXT: [[TMP3:%.*]] = urem i32 [[INDEX]], 4365; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP3]]366; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP4]], align 4367; CHECK-NEXT: [[TMP6:%.*]] = add <4 x i32> [[WIDE_LOAD]], splat (i32 10)368; CHECK-NEXT: store <4 x i32> [[TMP6]], ptr [[TMP4]], align 4369; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4370; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]371; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]372; CHECK: middle.block:373; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]374; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]375; CHECK: scalar.ph:376; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_SCEVCHECK]] ]377; CHECK-NEXT: br label [[LOOP:%.*]]378; CHECK: loop:379; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]380; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV]], 4381; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED_INDEX]]382; CHECK-NEXT: [[LV_A:%.*]] = load i32, ptr [[GEP_A]], align 4383; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV_A]], 10384; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1385; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP_A]], align 4386; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]387; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP9:![0-9]+]]388; CHECK: exit:389; CHECK-NEXT: ret void390;391entry:392 br label %loop393 394loop:395 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]396 %clamped.index = urem i32 %iv, 4397 %gep.A = getelementptr inbounds i32, ptr %A, i32 %clamped.index398 %lv.A = load i32, ptr %gep.A399 %add = add i32 %lv.A, 10400 401 %iv.next = add nuw nsw i32 %iv, 1402 store i32 %add, ptr %gep.A403 %cond = icmp eq i32 %iv.next, %N404 br i1 %cond, label %exit, label %loop405 406exit:407 ret void408}409