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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "^scalar.ph" --version 52; RUN: opt < %s -scalable-vectorization=on -force-target-supports-scalable-vectors=true -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=2  -S | FileCheck %s3 4define void @test1(ptr noalias nocapture %a, ptr noalias nocapture readonly %b) {5; CHECK-LABEL: define void @test1(6; CHECK-SAME: ptr noalias captures(none) [[A:%.*]], ptr noalias readonly captures(none) [[B:%.*]]) {7; CHECK-NEXT:  [[ENTRY:.*:]]8; CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()9; CHECK-NEXT:    [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 210; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1600, [[TMP1]]11; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]12; CHECK:       [[VECTOR_PH]]:13; CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.vscale.i64()14; CHECK-NEXT:    [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 415; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 1600, [[TMP3]]16; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 1600, [[N_MOD_VF]]17; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]18; CHECK:       [[VECTOR_BODY]]:19; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]20; CHECK-NEXT:    [[TMP6:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]]21; CHECK-NEXT:    [[TMP7:%.*]] = call i64 @llvm.vscale.i64()22; CHECK-NEXT:    [[TMP8:%.*]] = shl nuw i64 [[TMP7]], 123; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds float, ptr [[TMP6]], i64 [[TMP8]]24; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <vscale x 2 x float>, ptr [[TMP6]], align 425; CHECK-NEXT:    [[TMP10:%.*]] = extractelement <vscale x 2 x float> [[WIDE_LOAD]], i32 026; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <vscale x 2 x float>, ptr [[TMP9]], align 427; CHECK-NEXT:    [[TMP12:%.*]] = extractelement <vscale x 2 x float> [[WIDE_LOAD1]], i32 028; CHECK-NEXT:    [[FCMP1:%.*]] = fcmp ogt float [[TMP10]], 1.000000e+0229; CHECK-NEXT:    [[FCMP2:%.*]] = fcmp ogt float [[TMP12]], 1.000000e+0230; CHECK-NEXT:    tail call void @llvm.assume(i1 [[FCMP1]])31; CHECK-NEXT:    tail call void @llvm.assume(i1 [[FCMP2]])32; CHECK-NEXT:    [[TMP14:%.*]] = fadd <vscale x 2 x float> [[WIDE_LOAD]], splat (float 1.000000e+00)33; CHECK-NEXT:    [[TMP15:%.*]] = fadd <vscale x 2 x float> [[WIDE_LOAD1]], splat (float 1.000000e+00)34; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]]35; CHECK-NEXT:    [[TMP17:%.*]] = call i64 @llvm.vscale.i64()36; CHECK-NEXT:    [[TMP18:%.*]] = shl nuw i64 [[TMP17]], 137; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i64 [[TMP18]]38; CHECK-NEXT:    store <vscale x 2 x float> [[TMP14]], ptr [[TMP16]], align 439; CHECK-NEXT:    store <vscale x 2 x float> [[TMP15]], ptr [[TMP19]], align 440; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]41; CHECK-NEXT:    [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]42; CHECK-NEXT:    br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]43; CHECK:       [[MIDDLE_BLOCK]]:44; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 1600, [[N_VEC]]45; CHECK-NEXT:    br i1 [[CMP_N]], [[FOR_END:label %.*]], label %[[SCALAR_PH]]46; CHECK:       [[SCALAR_PH]]:47;48entry:49  br label %for.body50 51for.body:                                         ; preds = %for.body, %entry52  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]53  %arrayidx = getelementptr inbounds float, ptr %b, i64 %indvars.iv54  %0 = load float, ptr %arrayidx, align 455  %cmp1 = fcmp ogt float %0, 1.000000e+0256  tail call void @llvm.assume(i1 %cmp1)57  %add = fadd float %0, 1.000000e+0058  %arrayidx5 = getelementptr inbounds float, ptr %a, i64 %indvars.iv59  store float %add, ptr %arrayidx5, align 460  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 161  %exitcond = icmp eq i64 %indvars.iv, 159962  br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !063 64for.end:                                          ; preds = %for.body65  ret void66}67 68declare void @llvm.assume(i1) #069 70attributes #0 = { nounwind willreturn }71 72%struct.data = type { ptr, ptr }73 74define void @test2(ptr %a, ptr noalias %b) {75; CHECK-LABEL: define void @test2(76; CHECK-SAME: ptr [[A:%.*]], ptr noalias [[B:%.*]]) {77; CHECK-NEXT:  [[ENTRY:.*:]]78; CHECK-NEXT:    [[PTRINT1:%.*]] = ptrtoint ptr [[A]] to i6479; CHECK-NEXT:    [[MASKCOND:%.*]] = icmp eq i64 [[PTRINT1]], 080; CHECK-NEXT:    [[PTRINT2:%.*]] = ptrtoint ptr [[B]] to i6481; CHECK-NEXT:    [[MASKCOND4:%.*]] = icmp eq i64 [[PTRINT2]], 082; CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()83; CHECK-NEXT:    [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 284; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1600, [[TMP1]]85; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]86; CHECK:       [[VECTOR_PH]]:87; CHECK-NEXT:    [[TMP6:%.*]] = call i64 @llvm.vscale.i64()88; CHECK-NEXT:    [[TMP7:%.*]] = mul nuw i64 [[TMP6]], 489; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 1600, [[TMP7]]90; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 1600, [[N_MOD_VF]]91; CHECK-NEXT:    tail call void @llvm.assume(i1 [[MASKCOND]])92; CHECK-NEXT:    tail call void @llvm.assume(i1 [[MASKCOND4]])93; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]94; CHECK:       [[VECTOR_BODY]]:95; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]96; CHECK-NEXT:    [[TMP10:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]]97; CHECK-NEXT:    [[TMP11:%.*]] = call i64 @llvm.vscale.i64()98; CHECK-NEXT:    [[TMP12:%.*]] = shl nuw i64 [[TMP11]], 199; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds float, ptr [[TMP10]], i64 [[TMP12]]100; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <vscale x 2 x float>, ptr [[TMP10]], align 4101; CHECK-NEXT:    [[WIDE_LOAD3:%.*]] = load <vscale x 2 x float>, ptr [[TMP13]], align 4102; CHECK-NEXT:    [[TMP14:%.*]] = fadd <vscale x 2 x float> [[WIDE_LOAD]], splat (float 1.000000e+00)103; CHECK-NEXT:    [[TMP15:%.*]] = fadd <vscale x 2 x float> [[WIDE_LOAD3]], splat (float 1.000000e+00)104; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]]105; CHECK-NEXT:    [[TMP17:%.*]] = call i64 @llvm.vscale.i64()106; CHECK-NEXT:    [[TMP18:%.*]] = shl nuw i64 [[TMP17]], 1107; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i64 [[TMP18]]108; CHECK-NEXT:    store <vscale x 2 x float> [[TMP14]], ptr [[TMP16]], align 4109; CHECK-NEXT:    store <vscale x 2 x float> [[TMP15]], ptr [[TMP19]], align 4110; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP7]]111; CHECK-NEXT:    [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]112; CHECK-NEXT:    br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]113; CHECK:       [[MIDDLE_BLOCK]]:114; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 1600, [[N_VEC]]115; CHECK-NEXT:    br i1 [[CMP_N]], [[FOR_END:label %.*]], label %[[SCALAR_PH]]116; CHECK:       [[SCALAR_PH]]:117;118entry:119  %ptrint1 = ptrtoint ptr %a to i64120  %maskcond = icmp eq i64 %ptrint1, 0121  %ptrint2 = ptrtoint ptr %b to i64122  %maskcond4 = icmp eq i64 %ptrint2, 0123  br label %for.body124 125 126for.body:                                         ; preds = %for.body, %entry127  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]128  tail call void @llvm.assume(i1 %maskcond)129  %arrayidx = getelementptr inbounds float, ptr %a, i64 %indvars.iv130  %0 = load float, ptr %arrayidx, align 4131  %add = fadd float %0, 1.000000e+00132  tail call void @llvm.assume(i1 %maskcond4)133  %arrayidx5 = getelementptr inbounds float, ptr %b, i64 %indvars.iv134  store float %add, ptr %arrayidx5, align 4135  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1136  %exitcond = icmp eq i64 %indvars.iv, 1599137  br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0138 139for.end:                                          ; preds = %for.body140  ret void141}142 143; Test case for PR43620. Make sure we can vectorize with predication in presence144; of assume calls. For now, check that we drop all assumes in predicated blocks145; in the vector body.146define void @predicated_assume(ptr noalias nocapture readonly %a, ptr noalias nocapture %b, i64 %n) {147; Check that the vector.body does not contain any assumes.148; CHECK-LABEL: define void @predicated_assume(149; CHECK-SAME: ptr noalias readonly captures(none) [[A:%.*]], ptr noalias captures(none) [[B:%.*]], i64 [[N:%.*]]) {150; CHECK-NEXT:  [[ENTRY:.*:]]151; CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()152; CHECK-NEXT:    [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 2153; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP1]]154; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]155; CHECK:       [[VECTOR_PH]]:156; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.vscale.i64()157; CHECK-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 2158; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP5]], i64 0159; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer160; CHECK-NEXT:    [[TMP6:%.*]] = mul i64 [[TMP5]], 2161; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP6]]162; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]163; CHECK-NEXT:    [[TMP7:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()164; CHECK-NEXT:    [[TMP8:%.*]] = mul nuw nsw <vscale x 2 x i64> [[TMP7]], splat (i64 1)165; CHECK-NEXT:    [[INDUCTION:%.*]] = add nuw nsw <vscale x 2 x i64> zeroinitializer, [[TMP8]]166; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]167; CHECK:       [[VECTOR_BODY]]:168; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]169; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]170; CHECK-NEXT:    [[STEP_ADD:%.*]] = add <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]171; CHECK-NEXT:    [[TMP9:%.*]] = icmp ult <vscale x 2 x i64> [[VEC_IND]], splat (i64 495616)172; CHECK-NEXT:    [[TMP10:%.*]] = icmp ult <vscale x 2 x i64> [[STEP_ADD]], splat (i64 495616)173; CHECK-NEXT:    [[PREDPHI:%.*]] = select <vscale x 2 x i1> [[TMP9]], <vscale x 2 x float> splat (float 2.300000e+01), <vscale x 2 x float> splat (float 4.200000e+01)174; CHECK-NEXT:    [[PREDPHI1:%.*]] = select <vscale x 2 x i1> [[TMP10]], <vscale x 2 x float> splat (float 2.300000e+01), <vscale x 2 x float> splat (float 4.200000e+01)175; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]]176; CHECK-NEXT:    [[TMP12:%.*]] = call i64 @llvm.vscale.i64()177; CHECK-NEXT:    [[TMP13:%.*]] = shl nuw i64 [[TMP12]], 1178; CHECK-NEXT:    [[TMP14:%.*]] = getelementptr inbounds float, ptr [[TMP11]], i64 [[TMP13]]179; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <vscale x 2 x float>, ptr [[TMP11]], align 4180; CHECK-NEXT:    [[WIDE_LOAD2:%.*]] = load <vscale x 2 x float>, ptr [[TMP14]], align 4181; CHECK-NEXT:    [[TMP15:%.*]] = fmul <vscale x 2 x float> [[PREDPHI]], [[WIDE_LOAD]]182; CHECK-NEXT:    [[TMP16:%.*]] = fmul <vscale x 2 x float> [[PREDPHI1]], [[WIDE_LOAD2]]183; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]]184; CHECK-NEXT:    [[TMP18:%.*]] = call i64 @llvm.vscale.i64()185; CHECK-NEXT:    [[TMP19:%.*]] = shl nuw i64 [[TMP18]], 1186; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds float, ptr [[TMP17]], i64 [[TMP19]]187; CHECK-NEXT:    store <vscale x 2 x float> [[TMP15]], ptr [[TMP17]], align 4188; CHECK-NEXT:    store <vscale x 2 x float> [[TMP16]], ptr [[TMP20]], align 4189; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]]190; CHECK-NEXT:    [[VEC_IND_NEXT]] = add nuw nsw <vscale x 2 x i64> [[STEP_ADD]], [[BROADCAST_SPLAT]]191; CHECK-NEXT:    [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]192; CHECK-NEXT:    br i1 [[TMP21]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]193; CHECK:       [[MIDDLE_BLOCK]]:194; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]195; CHECK-NEXT:    br i1 [[CMP_N]], [[FOR_COND_CLEANUP:label %.*]], label %[[SCALAR_PH]]196; CHECK:       [[SCALAR_PH]]:197;198entry:199  br label %for.body200 201for.body:                                         ; preds = %for.body.preheader, %if.end5202  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %if.end5 ]203  %cmp1 = icmp ult i64 %indvars.iv, 495616204  br i1 %cmp1, label %if.end5, label %if.else205 206if.else:                                          ; preds = %for.body207  %cmp2 = icmp ult i64 %indvars.iv, 991232208  tail call void @llvm.assume(i1 %cmp2)209  br label %if.end5210 211if.end5:                                          ; preds = %for.body, %if.else212  %x.0 = phi float [ 4.200000e+01, %if.else ], [ 2.300000e+01, %for.body ]213  %arrayidx = getelementptr inbounds float, ptr %a, i64 %indvars.iv214  %0 = load float, ptr %arrayidx, align 4215  %mul = fmul float %x.0, %0216  %arrayidx7 = getelementptr inbounds float, ptr %b, i64 %indvars.iv217  store float %mul, ptr %arrayidx7, align 4218  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1219  %cmp = icmp eq i64 %indvars.iv.next, %n220  br i1 %cmp, label %for.cond.cleanup, label %for.body, !llvm.loop !0221 222for.cond.cleanup:                                 ; preds = %if.end5, %entry223  ret void224}225 226!0 = distinct !{!0, !1}227!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}228