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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=loop-vectorize -force-target-supports-scalable-vectors=true -scalable-vectorization=on -S | FileCheck %s3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"5 6define i8 @reduction_add_trunc(ptr noalias nocapture %A) {7; CHECK-LABEL: @reduction_add_trunc(8; CHECK-NEXT: entry:9; CHECK-NEXT: [[TMP30:%.*]] = call i32 @llvm.vscale.i32()10; CHECK-NEXT: [[TMP31:%.*]] = shl nuw i32 [[TMP30]], 411; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 256, [[TMP31]]12; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]13; CHECK: vector.ph:14; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vscale.i32()15; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP2]], 1616; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 256, [[TMP3]]17; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 256, [[N_MOD_VF]]18; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]19; CHECK: vector.body:20; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]21; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 8 x i32> [ insertelement (<vscale x 8 x i32> zeroinitializer, i32 255, i32 0), [[VECTOR_PH]] ], [ [[TMP34:%.*]], [[VECTOR_BODY]] ]22; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <vscale x 8 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP36:%.*]], [[VECTOR_BODY]] ]23; CHECK-NEXT: [[TMP14:%.*]] = and <vscale x 8 x i32> [[VEC_PHI]], splat (i32 255)24; CHECK-NEXT: [[TMP15:%.*]] = and <vscale x 8 x i32> [[VEC_PHI1]], splat (i32 255)25; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr [[A:%.*]], i32 [[INDEX]]26; CHECK-NEXT: [[TMP10:%.*]] = call i64 @llvm.vscale.i64()27; CHECK-NEXT: [[TMP11:%.*]] = shl nuw i64 [[TMP10]], 328; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr [[TMP8]], i64 [[TMP11]]29; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 8 x i8>, ptr [[TMP8]], align 430; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 8 x i8>, ptr [[TMP12]], align 431; CHECK-NEXT: [[TMP26:%.*]] = zext <vscale x 8 x i8> [[WIDE_LOAD]] to <vscale x 8 x i32>32; CHECK-NEXT: [[TMP27:%.*]] = zext <vscale x 8 x i8> [[WIDE_LOAD2]] to <vscale x 8 x i32>33; CHECK-NEXT: [[TMP28:%.*]] = add <vscale x 8 x i32> [[TMP14]], [[TMP26]]34; CHECK-NEXT: [[TMP29:%.*]] = add <vscale x 8 x i32> [[TMP15]], [[TMP27]]35; CHECK-NEXT: [[TMP33:%.*]] = trunc <vscale x 8 x i32> [[TMP28]] to <vscale x 8 x i8>36; CHECK-NEXT: [[TMP35:%.*]] = trunc <vscale x 8 x i32> [[TMP29]] to <vscale x 8 x i8>37; CHECK-NEXT: [[TMP34]] = zext <vscale x 8 x i8> [[TMP33]] to <vscale x 8 x i32>38; CHECK-NEXT: [[TMP36]] = zext <vscale x 8 x i8> [[TMP35]] to <vscale x 8 x i32>39; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], [[TMP3]]40; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]41; CHECK-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]42; CHECK: middle.block:43; CHECK-NEXT: [[BIN_RDX:%.*]] = add <vscale x 8 x i8> [[TMP35]], [[TMP33]]44; CHECK-NEXT: [[TMP39:%.*]] = call i8 @llvm.vector.reduce.add.nxv8i8(<vscale x 8 x i8> [[BIN_RDX]])45; CHECK-NEXT: [[TMP40:%.*]] = zext i8 [[TMP39]] to i3246; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 256, [[N_VEC]]47; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]48; CHECK: scalar.ph:49; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]50; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP40]], [[MIDDLE_BLOCK]] ], [ 255, [[ENTRY]] ]51; CHECK-NEXT: br label [[LOOP:%.*]]52; CHECK: loop:53; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]54; CHECK-NEXT: [[SUM_02P:%.*]] = phi i32 [ [[L9:%.*]], [[LOOP]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]55; CHECK-NEXT: [[SUM_02:%.*]] = and i32 [[SUM_02P]], 25556; CHECK-NEXT: [[L2:%.*]] = getelementptr inbounds i8, ptr [[A]], i32 [[INDVARS_IV]]57; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[L2]], align 458; CHECK-NEXT: [[L3E:%.*]] = zext i8 [[L3]] to i3259; CHECK-NEXT: [[L9]] = add i32 [[SUM_02]], [[L3E]]60; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i32 [[INDVARS_IV]], 161; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 25662; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]63; CHECK: exit:64; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ [[L9]], [[LOOP]] ], [ [[TMP40]], [[MIDDLE_BLOCK]] ]65; CHECK-NEXT: [[RET:%.*]] = trunc i32 [[SUM_0_LCSSA]] to i866; CHECK-NEXT: ret i8 [[RET]]67;68entry:69 br label %loop70 71loop: ; preds = %entry, %loop72 %indvars.iv = phi i32 [ %indvars.iv.next, %loop ], [ 0, %entry ]73 %sum.02p = phi i32 [ %l9, %loop ], [ 255, %entry ]74 %sum.02 = and i32 %sum.02p, 25575 %l2 = getelementptr inbounds i8, ptr %A, i32 %indvars.iv76 %l3 = load i8, ptr %l2, align 477 %l3e = zext i8 %l3 to i3278 %l9 = add i32 %sum.02, %l3e79 %indvars.iv.next = add i32 %indvars.iv, 180 %exitcond = icmp eq i32 %indvars.iv.next, 25681 br i1 %exitcond, label %exit, label %loop, !llvm.loop !082 83exit: ; preds = %loop84 %sum.0.lcssa = phi i32 [ %l9, %loop ]85 %ret = trunc i32 %sum.0.lcssa to i886 ret i8 %ret87}88 89!0 = distinct !{!0, !1, !2, !3, !4}90!1 = !{!"llvm.loop.vectorize.width", i32 8}91!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}92!3 = !{!"llvm.loop.interleave.count", i32 2}93!4 = !{!"llvm.loop.vectorize.enable", i1 true}94