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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; RUN: opt -passes='loop(loop-deletion),loop-vectorize' -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s3 4; Note: loop-deletion is needed to populate SCEV block dispositions.5 6target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"7 8define void @test_pr63368(i1 %c, ptr %A) {9; CHECK-LABEL: define void @test_pr6336810; CHECK-SAME: (i1 [[C:%.*]], ptr [[A:%.*]]) {11; CHECK-NEXT: entry:12; CHECK-NEXT: br label [[VECTOR_PH:%.*]]13; CHECK: vector.ph:14; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]15; CHECK: vector.body:16; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]17; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 418; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 419; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[INDEX_NEXT]], 10020; CHECK-NEXT: br i1 [[TMP1]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]21; CHECK: middle.block:22; CHECK-NEXT: br label [[EXIT_1:%.*]]23; CHECK: exit.1:24; CHECK-NEXT: [[SMAX1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 -1)25; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SMAX1]], 226; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP2]], 427; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]28; CHECK: vector.scevcheck:29; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 -1)30; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SMAX]], 131; CHECK-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i832; CHECK-NEXT: [[TMP5:%.*]] = add i8 1, [[TMP4]]33; CHECK-NEXT: [[TMP6:%.*]] = icmp slt i8 [[TMP5]], 134; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP3]], 25535; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]36; CHECK-NEXT: br i1 [[TMP8]], label [[SCALAR_PH]], label [[VECTOR_PH2:%.*]]37; CHECK: vector.ph2:38; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP2]], 439; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP2]], [[N_MOD_VF]]40; CHECK-NEXT: [[TMP9:%.*]] = trunc i32 [[N_VEC]] to i841; CHECK-NEXT: br label [[VECTOR_BODY3:%.*]]42; CHECK: vector.body3:43; CHECK-NEXT: [[INDEX4:%.*]] = phi i32 [ 0, [[VECTOR_PH2]] ], [ [[INDEX_NEXT5:%.*]], [[VECTOR_BODY3]] ]44; CHECK-NEXT: [[OFFSET_IDX:%.*]] = trunc i32 [[INDEX4]] to i845; CHECK-NEXT: [[TMP10:%.*]] = add i8 [[OFFSET_IDX]], 146; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[A]], i8 [[TMP10]]47; CHECK-NEXT: store <4 x i8> zeroinitializer, ptr [[TMP11]], align 148; CHECK-NEXT: [[INDEX_NEXT5]] = add nuw i32 [[INDEX4]], 449; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[INDEX_NEXT5]], [[N_VEC]]50; CHECK-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK6:%.*]], label [[VECTOR_BODY3]], !llvm.loop [[LOOP3:![0-9]+]]51; CHECK: middle.block6:52; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP2]], [[N_VEC]]53; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT_2:%.*]], label [[SCALAR_PH]]54; CHECK: scalar.ph:55; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i8 [ [[TMP9]], [[MIDDLE_BLOCK6]] ], [ 0, [[EXIT_1]] ], [ 0, [[VECTOR_SCEVCHECK]] ]56; CHECK-NEXT: br label [[LOOP_2:%.*]]57; CHECK: loop.2:58; CHECK-NEXT: [[IV_2:%.*]] = phi i8 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_2_NEXT:%.*]], [[LOOP_2]] ]59; CHECK-NEXT: [[IV_2_NEXT]] = add i8 [[IV_2]], 160; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i8, ptr [[A]], i8 [[IV_2_NEXT]]61; CHECK-NEXT: store i8 0, ptr [[GEP_A]], align 162; CHECK-NEXT: [[IV_2_SEXT:%.*]] = sext i8 [[IV_2]] to i3263; CHECK-NEXT: [[EC_2:%.*]] = icmp sge i32 [[TMP0]], [[IV_2_SEXT]]64; CHECK-NEXT: br i1 [[EC_2]], label [[LOOP_2]], label [[EXIT_2]], !llvm.loop [[LOOP4:![0-9]+]]65; CHECK: exit.2:66; CHECK-NEXT: ret void67;68 69entry:70 br label %loop.1.header71 72loop.1.header:73 %iv.1 = phi i32 [ 0, %entry ], [ %iv.1.next, %loop.1.latch ]74 %l = load i32, ptr %A75 br i1 %c, label %loop.1.latch, label %loop.1.latch76 77loop.1.latch:78 %l.lcssa = phi i32 [ %l, %loop.1.header ], [ %l, %loop.1.header ]79 %iv.1.next = add nuw nsw i32 %iv.1, 180 %ec.1 = icmp eq i32 %iv.1.next, 10081 br i1 %ec.1, label %exit.1, label %loop.1.header82 83exit.1:84 %l.lcssa.lcssa = phi i32 [ %l.lcssa, %loop.1.latch ]85 br label %loop.286 87loop.2:88 %iv.2 = phi i8 [ 0, %exit.1 ], [ %iv.2.next, %loop.2 ]89 %iv.2.next = add i8 %iv.2, 190 %gep.A = getelementptr i8, ptr %A, i8 %iv.2.next91 store i8 0, ptr %gep.A92 %iv.2.sext = sext i8 %iv.2 to i3293 %ec.2 = icmp sge i32 %l.lcssa.lcssa, %iv.2.sext94 br i1 %ec.2, label %loop.2, label %exit.295 96exit.2:97 ret void98}99