258 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph:" --version 52; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -lv-strided-pointer-ivs=true -S %s | FileCheck %s3 4define void @step_direction_unknown(i32 %arg, ptr %dst) {5; CHECK-LABEL: define void @step_direction_unknown(6; CHECK-SAME: i32 [[ARG:%.*]], ptr [[DST:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ARG]], 19; CHECK-NEXT: br label %[[VECTOR_SCEVCHECK:.*]]10; CHECK: [[VECTOR_SCEVCHECK]]:11; CHECK-NEXT: [[TMP0:%.*]] = sub i32 -1, [[ARG]]12; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[ADD]], 013; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 [[ADD]]14; CHECK-NEXT: [[MUL1:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[TMP2]], i32 1023)15; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i32, i1 } [[MUL1]], 016; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i32, i1 } [[MUL1]], 117; CHECK-NEXT: [[TMP3:%.*]] = sub i32 0, [[MUL_RESULT]]18; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i32 [[TMP3]], 019; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP1]], i1 [[TMP4]], i1 false20; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP5]], [[MUL_OVERFLOW]]21; CHECK-NEXT: br i1 [[TMP6]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]22; CHECK: [[VECTOR_PH]]:23; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[ADD]], i64 024; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer25; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]26; CHECK: [[VECTOR_BODY]]:27; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]28; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]29; CHECK-NEXT: [[TMP8:%.*]] = mul <4 x i32> [[BROADCAST_SPLAT]], [[VEC_IND]]30; CHECK-NEXT: [[TMP9:%.*]] = zext <4 x i32> [[TMP8]] to <4 x i64>31; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i64> [[TMP9]], i32 032; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i64> [[TMP9]], i32 133; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[TMP9]], i32 234; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x i64> [[TMP9]], i32 335; CHECK-NEXT: [[TMP14:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP10]]36; CHECK-NEXT: [[TMP15:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP11]]37; CHECK-NEXT: [[TMP16:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP12]]38; CHECK-NEXT: [[TMP17:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP13]]39; CHECK-NEXT: store double 0.000000e+00, ptr [[TMP14]], align 840; CHECK-NEXT: store double 0.000000e+00, ptr [[TMP15]], align 841; CHECK-NEXT: store double 0.000000e+00, ptr [[TMP16]], align 842; CHECK-NEXT: store double 0.000000e+00, ptr [[TMP17]], align 843; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 444; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)45; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], 102446; CHECK-NEXT: br i1 [[TMP18]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]47; CHECK: [[MIDDLE_BLOCK]]:48; CHECK-NEXT: br [[EXIT:label %.*]]49; CHECK: [[SCALAR_PH]]:50;51entry:52 %add = add i32 %arg, 153 br label %loop54 55loop:56 %phi = phi i64 [ 0, %entry ], [ %add2, %loop ]57 %trunc = trunc i64 %phi to i3258 %mul = mul i32 %add, %trunc59 %zext = zext i32 %mul to i6460 %getelementptr = getelementptr double, ptr %dst, i64 %zext61 store double 0.000000e+00, ptr %getelementptr, align 862 %add2 = add i64 %phi, 163 %icmp = icmp eq i64 %add2, 102464 br i1 %icmp, label %exit, label %loop65 66exit:67 ret void68}69 70define void @integer_induction_wraps_scev_predicate_known(i32 %x, ptr %call, ptr %start) {71; CHECK-LABEL: define void @integer_induction_wraps_scev_predicate_known(72; CHECK-SAME: i32 [[X:%.*]], ptr [[CALL:%.*]], ptr [[START:%.*]]) {73; CHECK-NEXT: [[ENTRY:.*:]]74; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[X]], 175; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[MUL]] to i6476; CHECK-NEXT: br label %[[VECTOR_PH:.*]]77; CHECK: [[VECTOR_PH]]:78; CHECK-NEXT: [[TMP1:%.*]] = mul i64 992, [[TMP0]]79; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[START]], i64 [[TMP1]]80; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]81; CHECK: [[VECTOR_BODY]]:82; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]83; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[START]], %[[VECTOR_PH]] ], [ [[PTR_IND:%.*]], %[[VECTOR_BODY]] ]84; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP0]], i64 085; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer86; CHECK-NEXT: [[TMP3:%.*]] = mul <4 x i64> <i64 0, i64 1, i64 2, i64 3>, [[BROADCAST_SPLAT]]87; CHECK-NEXT: [[VECTOR_GEP:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> [[TMP3]]88; CHECK-NEXT: [[DOTCAST:%.*]] = trunc i64 [[INDEX]] to i3289; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i32 30, [[DOTCAST]]90; CHECK-NEXT: [[TMP4:%.*]] = getelementptr ptr, ptr [[CALL]], i32 [[OFFSET_IDX]]91; CHECK-NEXT: store <4 x ptr> [[VECTOR_GEP]], ptr [[TMP4]], align 492; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 493; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP0]], 494; CHECK-NEXT: [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i64 [[TMP5]]95; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 99296; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]97; CHECK: [[MIDDLE_BLOCK]]:98; CHECK-NEXT: br label %[[SCALAR_PH:.*]]99; CHECK: [[SCALAR_PH]]:100;101entry:102 %mul = shl i32 %x, 1103 br label %for.cond104 105for.cond: ; preds = %for.body, %entry106 %iv = phi i32 [ 30, %entry ], [ %inc, %for.cond ]107 %p.0 = phi ptr [ %start, %entry ], [ %add.ptr, %for.cond ]108 %add.ptr = getelementptr i8, ptr %p.0, i32 %mul109 %arrayidx = getelementptr ptr, ptr %call, i32 %iv110 store ptr %p.0, ptr %arrayidx, align 4111 %inc = add i32 %iv, 1112 %tobool.not = icmp eq i32 %iv, 1024113 br i1 %tobool.not, label %for.end, label %for.cond114 115for.end: ; preds = %for.cond116 ret void117}118 119@h = global i64 0120 121define void @implied_wrap_predicate(ptr %A, ptr %B, ptr %C) {122; CHECK-LABEL: define void @implied_wrap_predicate(123; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {124; CHECK-NEXT: [[ENTRY:.*:]]125; CHECK-NEXT: [[A3:%.*]] = ptrtoint ptr [[A]] to i64126; CHECK-NEXT: [[C2:%.*]] = ptrtoint ptr [[C]] to i64127; CHECK-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64128; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[A3]], 16129; CHECK-NEXT: [[UMAX4:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP0]], i64 add (i64 ptrtoint (ptr @h to i64), i64 1))130; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[UMAX4]], -9131; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[TMP1]], [[A3]]132; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 3133; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1134; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 4135; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]136; CHECK: [[VECTOR_SCEVCHECK]]:137; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[A1]], 16138; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP5]], i64 add (i64 ptrtoint (ptr @h to i64), i64 1))139; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[UMAX]], -9140; CHECK-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], [[A1]]141; CHECK-NEXT: [[TMP8:%.*]] = lshr i64 [[TMP7]], 3142; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP8]] to i16143; CHECK-NEXT: [[TMP10:%.*]] = add i16 2, [[TMP9]]144; CHECK-NEXT: [[TMP11:%.*]] = icmp ult i16 [[TMP10]], 2145; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt i64 [[TMP8]], 65535146; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP11]], [[TMP12]]147; CHECK-NEXT: br i1 [[TMP13]], label %[[SCALAR_PH]], label %[[VECTOR_MEMCHECK:.*]]148; CHECK: [[VECTOR_MEMCHECK]]:149; CHECK-NEXT: [[TMP14:%.*]] = sub i64 [[C2]], [[A3]]150; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP14]], 32151; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]152; CHECK: [[VECTOR_PH]]:153; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP4]], 4154; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]]155; CHECK-NEXT: [[DOTCAST:%.*]] = trunc i64 [[N_VEC]] to i16156; CHECK-NEXT: [[TMP15:%.*]] = add i16 1, [[DOTCAST]]157; CHECK-NEXT: [[TMP16:%.*]] = add i64 1, [[N_VEC]]158; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]159; CHECK: [[VECTOR_BODY]]:160; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]161; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]162; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i64, ptr [[A]], i64 [[OFFSET_IDX]]163; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP17]], align 4164; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i64, ptr [[C]], i64 [[OFFSET_IDX]]165; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP18]], align 4166; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4167; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]168; CHECK-NEXT: br i1 [[TMP19]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]169; CHECK: [[MIDDLE_BLOCK]]:170; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]]171; CHECK-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]172; CHECK: [[SCALAR_PH]]:173;174entry:175 br label %loop176 177loop:178 %iv = phi i16 [ 1, %entry ], [ %iv.next, %loop ]179 %iv.ext = phi i64 [ 1, %entry ], [ %iv.ext.next, %loop ]180 %gep.A = getelementptr i64, ptr %A, i64 %iv.ext181 store i64 0, ptr %gep.A182 %gep.C = getelementptr i64, ptr %C, i64 %iv.ext183 store i64 0, ptr %gep.C184 %iv.next = add i16 %iv, 1185 %iv.ext.next = zext i16 %iv.next to i64186 %gep = getelementptr i64, ptr %A, i64 %iv.ext.next187 %cmp = icmp ugt ptr %gep, @h188 br i1 %cmp, label %exit, label %loop189 190exit:191 ret void192}193 194declare i1 @cond()195 196; Test case for https://github.com/llvm/llvm-project/issues/131281.197; %add2 is known to not wrap via BTC.198define void @no_signed_wrap_iv_via_btc(ptr %dst, i32 %N) mustprogress {199; CHECK-LABEL: define void @no_signed_wrap_iv_via_btc(200; CHECK-SAME: ptr [[DST:%.*]], i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {201; CHECK-NEXT: [[ENTRY:.*:]]202; CHECK-NEXT: [[SUB:%.*]] = add i32 [[N]], -100203; CHECK-NEXT: [[SUB4:%.*]] = add i32 [[N]], -99204; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], 1205; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[SUB4]], i32 [[TMP0]])206; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[SMAX]], 100207; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP1]], [[N]]208; CHECK-NEXT: br label %[[OUTER:.*]]209; CHECK: [[OUTER_LOOPEXIT:.*]]:210; CHECK-NEXT: br label %[[OUTER]]211; CHECK: [[OUTER]]:212; CHECK-NEXT: [[C:%.*]] = call i1 @cond()213; CHECK-NEXT: br i1 [[C]], label %[[LOOP_PREHEADER:.*]], [[EXIT:label %.*]]214; CHECK: [[LOOP_PREHEADER]]:215; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP2]], 4216; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]217; CHECK: [[VECTOR_PH]]:218; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP2]], 4219; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP2]], [[N_MOD_VF]]220; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]221; CHECK: [[VECTOR_BODY]]:222; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]223; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUB4]], [[INDEX]]224; CHECK-NEXT: [[TMP4:%.*]] = sext i32 [[TMP3]] to i64225; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP4]]226; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr [[TMP5]], align 4227; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4228; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]229; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]230; CHECK: [[MIDDLE_BLOCK]]:231; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP2]], [[N_VEC]]232; CHECK-NEXT: br i1 [[CMP_N]], label %[[OUTER_LOOPEXIT]], label %[[SCALAR_PH]]233; CHECK: [[SCALAR_PH]]:234;235entry:236 %sub = add i32 %N, -100237 %sub4 = add i32 %N, -99238 br label %outer239 240outer:241 %c = call i1 @cond()242 br i1 %c, label %loop, label %exit243 244loop:245 %iv = phi i32 [ 0, %outer ], [ %inc, %loop ]246 %add2 = add i32 %sub4, %iv247 %add.ext = sext i32 %add2 to i64248 %gep.dst = getelementptr i32, ptr %dst, i64 %add.ext249 store i32 0, ptr %gep.dst, align 4250 %inc = add i32 %iv, 1251 %add = add i32 %sub, %inc252 %ec = icmp sgt i32 %add, %N253 br i1 %ec, label %outer, label %loop254 255exit:256 ret void257}258