94 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 52; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=2 -S %s | FileCheck --check-prefix=VF4IC2 %s3; RUN: opt -p loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S %s | FileCheck --check-prefix=VF8IC1 %s4 5; Test case from https://github.com/llvm/llvm-project/issues/153946.6; %shr and thus %early.cond will be poison from %iv == 4 onwards.7; Make sure the mask being poison does not propagate across lanes in the8; OR reduction when computing the early exit condition in the vector loop.9define noundef i32 @f(i32 noundef %g) {10; VF4IC2-LABEL: define noundef i32 @f(11; VF4IC2-SAME: i32 noundef [[G:%.*]]) {12; VF4IC2-NEXT: [[ENTRY:.*:]]13; VF4IC2-NEXT: br label %[[VECTOR_PH:.*]]14; VF4IC2: [[VECTOR_PH]]:15; VF4IC2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[G]], i64 016; VF4IC2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer17; VF4IC2-NEXT: br label %[[VECTOR_BODY:.*]]18; VF4IC2: [[VECTOR_BODY]]:19; VF4IC2-NEXT: [[TMP2:%.*]] = ashr <4 x i32> [[BROADCAST_SPLAT]], <i32 0, i32 8, i32 16, i32 24>20; VF4IC2-NEXT: [[TMP3:%.*]] = ashr <4 x i32> [[BROADCAST_SPLAT]], <i32 32, i32 40, i32 48, i32 56>21; VF4IC2-NEXT: [[TMP4:%.*]] = icmp ne <4 x i32> [[TMP2]], zeroinitializer22; VF4IC2-NEXT: [[TMP5:%.*]] = icmp ne <4 x i32> [[TMP3]], zeroinitializer23; VF4IC2-NEXT: [[TMP17:%.*]] = freeze <4 x i1> [[TMP4]]24; VF4IC2-NEXT: [[TMP18:%.*]] = freeze <4 x i1> [[TMP5]]25; VF4IC2-NEXT: [[TMP6:%.*]] = or <4 x i1> [[TMP17]], [[TMP18]]26; VF4IC2-NEXT: [[TMP7:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP6]])27; VF4IC2-NEXT: br label %[[MIDDLE_SPLIT:.*]]28; VF4IC2: [[MIDDLE_SPLIT]]:29; VF4IC2-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP3]], i32 330; VF4IC2-NEXT: br i1 [[TMP7]], label %[[VECTOR_EARLY_EXIT:.*]], label %[[MIDDLE_BLOCK:.*]]31; VF4IC2: [[MIDDLE_BLOCK]]:32; VF4IC2-NEXT: br label %[[RETURN:.*]]33; VF4IC2: [[VECTOR_EARLY_EXIT]]:34; VF4IC2-NEXT: [[TMP9:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP5]], i1 false)35; VF4IC2-NEXT: [[TMP10:%.*]] = add i64 4, [[TMP9]]36; VF4IC2-NEXT: [[TMP11:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 false)37; VF4IC2-NEXT: [[TMP12:%.*]] = add i64 0, [[TMP11]]38; VF4IC2-NEXT: [[TMP13:%.*]] = icmp ne i64 [[TMP11]], 439; VF4IC2-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i64 [[TMP12]], i64 [[TMP10]]40; VF4IC2-NEXT: [[TMP15:%.*]] = trunc i64 [[TMP14]] to i3241; VF4IC2-NEXT: br label %[[RETURN]]42; VF4IC2: [[RETURN]]:43; VF4IC2-NEXT: [[RES:%.*]] = phi i32 [ [[TMP8]], %[[MIDDLE_BLOCK]] ], [ [[TMP15]], %[[VECTOR_EARLY_EXIT]] ]44; VF4IC2-NEXT: ret i32 [[RES]]45;46; VF8IC1-LABEL: define noundef i32 @f(47; VF8IC1-SAME: i32 noundef [[G:%.*]]) {48; VF8IC1-NEXT: [[ENTRY:.*:]]49; VF8IC1-NEXT: br label %[[VECTOR_PH:.*]]50; VF8IC1: [[VECTOR_PH]]:51; VF8IC1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[G]], i64 052; VF8IC1-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer53; VF8IC1-NEXT: br label %[[VECTOR_BODY:.*]]54; VF8IC1: [[VECTOR_BODY]]:55; VF8IC1-NEXT: [[TMP1:%.*]] = ashr <8 x i32> [[BROADCAST_SPLAT]], <i32 0, i32 8, i32 16, i32 24, i32 32, i32 40, i32 48, i32 56>56; VF8IC1-NEXT: [[TMP2:%.*]] = icmp ne <8 x i32> [[TMP1]], zeroinitializer57; VF8IC1-NEXT: [[TMP8:%.*]] = freeze <8 x i1> [[TMP2]]58; VF8IC1-NEXT: [[TMP3:%.*]] = call i1 @llvm.vector.reduce.or.v8i1(<8 x i1> [[TMP8]])59; VF8IC1-NEXT: br label %[[MIDDLE_SPLIT:.*]]60; VF8IC1: [[MIDDLE_SPLIT]]:61; VF8IC1-NEXT: [[TMP4:%.*]] = extractelement <8 x i32> [[TMP1]], i32 762; VF8IC1-NEXT: br i1 [[TMP3]], label %[[VECTOR_EARLY_EXIT:.*]], label %[[MIDDLE_BLOCK:.*]]63; VF8IC1: [[MIDDLE_BLOCK]]:64; VF8IC1-NEXT: br label %[[RETURN:.*]]65; VF8IC1: [[VECTOR_EARLY_EXIT]]:66; VF8IC1-NEXT: [[TMP5:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v8i1(<8 x i1> [[TMP2]], i1 false)67; VF8IC1-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i3268; VF8IC1-NEXT: br label %[[RETURN]]69; VF8IC1: [[RETURN]]:70; VF8IC1-NEXT: [[RES:%.*]] = phi i32 [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[TMP6]], %[[VECTOR_EARLY_EXIT]] ]71; VF8IC1-NEXT: ret i32 [[RES]]72;73entry:74 br label %loop.header75 76loop.header:77 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]78 %mul = shl nuw nsw i32 %iv, 379 %shr = ashr i32 %g, %mul80 %early.cond = icmp eq i32 %shr, 081 br i1 %early.cond, label %loop.latch, label %return82 83loop.latch:84 %iv.next = add nuw nsw i32 %iv, 185 %ec = icmp eq i32 %iv.next, 886 br i1 %ec, label %return, label %loop.header87 88return:89 %res = phi i32 [ %shr, %loop.latch ], [ %iv, %loop.header ]90 ret i32 %res91}92 93 94