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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 52; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s3 4define void @minbw_cast(ptr %dst, i64 %n, i1 %bool1, i1 %bool2) {5; CHECK-LABEL: define void @minbw_cast(6; CHECK-SAME: ptr [[DST:%.*]], i64 [[N:%.*]], i1 [[BOOL1:%.*]], i1 [[BOOL2:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*]]:8; CHECK-NEXT: [[BOOL1_EXT:%.*]] = zext i1 [[BOOL1]] to i329; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[N]], i64 1)10; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[UMAX]], 411; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]12; CHECK: [[VECTOR_PH]]:13; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[UMAX]], 414; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[UMAX]], [[N_MOD_VF]]15; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[BOOL2]], i64 016; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer17; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[BOOL1_EXT]], i64 018; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT1]], <4 x i32> poison, <4 x i32> zeroinitializer19; CHECK-NEXT: [[TMP0:%.*]] = trunc <4 x i32> [[BROADCAST_SPLAT2]] to <4 x i8>20; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i1> [[BROADCAST_SPLAT]] to <4 x i8>21; CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i8> [[TMP0]], [[TMP1]]22; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i8> [[TMP2]], i32 323; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]24; CHECK: [[VECTOR_BODY]]:25; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]26; CHECK-NEXT: store i8 [[TMP3]], ptr [[DST]], align 127; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 428; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]29; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]30; CHECK: [[MIDDLE_BLOCK]]:31; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[UMAX]], [[N_VEC]]32; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]33; CHECK: [[SCALAR_PH]]:34; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]35; CHECK-NEXT: br label %[[LOOP:.*]]36; CHECK: [[LOOP]]:37; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]38; CHECK-NEXT: [[BOOL2_EXT:%.*]] = zext i1 [[BOOL2]] to i3239; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[BOOL1_EXT]], [[BOOL2_EXT]]40; CHECK-NEXT: [[XOR_TRUNC:%.*]] = trunc i32 [[XOR]] to i841; CHECK-NEXT: store i8 [[XOR_TRUNC]], ptr [[DST]], align 142; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 143; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_NEXT]], [[N]]44; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[EXIT]], !llvm.loop [[LOOP3:![0-9]+]]45; CHECK: [[EXIT]]:46; CHECK-NEXT: ret void47;48entry:49 %bool1.ext = zext i1 %bool1 to i3250 br label %loop51 52loop:53 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]54 %bool2.ext = zext i1 %bool2 to i3255 %xor = xor i32 %bool1.ext, %bool2.ext56 %xor.trunc = trunc i32 %xor to i857 store i8 %xor.trunc, ptr %dst, align 158 %iv.next = add i64 %iv, 159 %cmp = icmp ult i64 %iv.next, %n60 br i1 %cmp, label %loop, label %exit61 62exit:63 ret void64}65 66; Test case for https://github.com/llvm/llvm-project/issues/151392.67define void @single_scalar_cast_stored(ptr %src, ptr %dst, i32 %n) {68; CHECK-LABEL: define void @single_scalar_cast_stored(69; CHECK-SAME: ptr [[SRC:%.*]], ptr [[DST:%.*]], i32 [[N:%.*]]) {70; CHECK-NEXT: [[ENTRY:.*]]:71; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 472; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]73; CHECK: [[VECTOR_MEMCHECK]]:74; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 275; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SRC]], i64 276; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP1]]77; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP]]78; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]79; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]80; CHECK: [[VECTOR_PH]]:81; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 482; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]83; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[SRC]], align 2, !alias.scope [[META4:![0-9]+]]84; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i16 [[TMP0]], 085; CHECK-NEXT: [[TMP4:%.*]] = and i16 [[TMP0]], 1586; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP4]]87; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]88; CHECK: [[VECTOR_BODY]]:89; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]90; CHECK-NEXT: store i16 [[TMP5]], ptr [[DST]], align 2, !alias.scope [[META7:![0-9]+]], !noalias [[META4]]91; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 492; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]93; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]94; CHECK: [[MIDDLE_BLOCK]]:95; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]96; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]97; CHECK: [[SCALAR_PH]]:98; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_MEMCHECK]] ]99; CHECK-NEXT: br label %[[LOOP:.*]]100; CHECK: [[LOOP]]:101; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]102; CHECK-NEXT: [[L:%.*]] = load i16, ptr [[SRC]], align 2103; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[L]], 0104; CHECK-NEXT: [[L_EXT:%.*]] = zext i16 [[L]] to i32105; CHECK-NEXT: [[AND:%.*]] = and i32 [[L_EXT]], 15106; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 0, i32 [[AND]]107; CHECK-NEXT: [[SEL_TRUNC:%.*]] = trunc i32 [[SEL]] to i16108; CHECK-NEXT: store i16 [[SEL_TRUNC]], ptr [[DST]], align 2109; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 1110; CHECK-NEXT: [[EC:%.*]] = icmp ne i32 [[IV_NEXT]], [[N]]111; CHECK-NEXT: br i1 [[EC]], label %[[LOOP]], label %[[EXIT]], !llvm.loop [[LOOP10:![0-9]+]]112; CHECK: [[EXIT]]:113; CHECK-NEXT: ret void114;115entry:116 br label %loop117 118loop:119 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]120 %l = load i16, ptr %src, align 2121 %cmp = icmp eq i16 %l, 0122 %l.ext = zext i16 %l to i32123 %and = and i32 %l.ext, 15124 %sel = select i1 %cmp, i32 0, i32 %and125 %sel.trunc = trunc i32 %sel to i16126 store i16 %sel.trunc, ptr %dst, align 2127 %iv.next = add nuw i32 %iv, 1128 %ec = icmp ne i32 %iv.next, %n129 br i1 %ec, label %loop, label %exit130 131exit:132 ret void133}134