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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -S < %s -p loop-vectorize -force-vector-width=4 | FileCheck %s3 4declare void @init_mem(ptr, i64);5 6 7define i64 @same_exit_block_phi_of_consts() {8; CHECK-LABEL: define i64 @same_exit_block_phi_of_consts() {9; CHECK-NEXT: entry:10; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i8], align 111; CHECK-NEXT: [[P2:%.*]] = alloca [1024 x i8], align 112; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024)13; CHECK-NEXT: call void @init_mem(ptr [[P2]], i64 1024)14; CHECK-NEXT: br label [[VECTOR_PH:%.*]]15; CHECK: vector.ph:16; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]17; CHECK: vector.body:18; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT3:%.*]], [[VECTOR_BODY]] ]19; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 3, [[INDEX1]]20; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 [[OFFSET_IDX]]21; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr [[TMP1]], align 122; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr [[P2]], i64 [[OFFSET_IDX]]23; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x i8>, ptr [[TMP3]], align 124; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <4 x i8> [[WIDE_LOAD]], [[WIDE_LOAD2]]25; CHECK-NEXT: [[INDEX_NEXT3]] = add nuw i64 [[INDEX1]], 426; CHECK-NEXT: [[TMP4:%.*]] = freeze <4 x i1> [[TMP6]]27; CHECK-NEXT: [[TMP7:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP4]])28; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT3]], 6429; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP7]], [[TMP8]]30; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_SPLIT:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]31; CHECK: middle.split:32; CHECK-NEXT: br i1 [[TMP7]], label [[VECTOR_EARLY_EXIT:%.*]], label [[MIDDLE_BLOCK:%.*]]33; CHECK: middle.block:34; CHECK-NEXT: br label [[LOOP_END:%.*]]35; CHECK: vector.early.exit:36; CHECK-NEXT: br label [[LOOP_END]]37; CHECK: loop.end:38; CHECK-NEXT: [[RETVAL:%.*]] = phi i64 [ 1, [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_EARLY_EXIT]] ]39; CHECK-NEXT: ret i64 [[RETVAL]]40;41entry:42 %p1 = alloca [1024 x i8]43 %p2 = alloca [1024 x i8]44 call void @init_mem(ptr %p1, i64 1024)45 call void @init_mem(ptr %p2, i64 1024)46 br label %loop47 48loop:49 %index = phi i64 [ %index.next, %loop.inc ], [ 3, %entry ]50 %arrayidx = getelementptr inbounds i8, ptr %p1, i64 %index51 %ld1 = load i8, ptr %arrayidx, align 152 %arrayidx1 = getelementptr inbounds i8, ptr %p2, i64 %index53 %ld2 = load i8, ptr %arrayidx1, align 154 %cmp3 = icmp eq i8 %ld1, %ld255 br i1 %cmp3, label %loop.inc, label %loop.end56 57loop.inc:58 %index.next = add i64 %index, 159 %exitcond = icmp ne i64 %index.next, 6760 br i1 %exitcond, label %loop, label %loop.end61 62loop.end:63 %retval = phi i64 [ 0, %loop ], [ 1, %loop.inc ]64 ret i64 %retval65}66 67 68define i64 @diff_exit_block_phi_of_consts() {69; CHECK-LABEL: define i64 @diff_exit_block_phi_of_consts() {70; CHECK-NEXT: entry:71; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i8], align 172; CHECK-NEXT: [[P2:%.*]] = alloca [1024 x i8], align 173; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024)74; CHECK-NEXT: call void @init_mem(ptr [[P2]], i64 1024)75; CHECK-NEXT: br label [[VECTOR_PH:%.*]]76; CHECK: vector.ph:77; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]78; CHECK: vector.body:79; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT3:%.*]], [[VECTOR_BODY]] ]80; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 3, [[INDEX1]]81; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 [[OFFSET_IDX]]82; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr [[TMP1]], align 183; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr [[P2]], i64 [[OFFSET_IDX]]84; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x i8>, ptr [[TMP3]], align 185; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <4 x i8> [[WIDE_LOAD]], [[WIDE_LOAD2]]86; CHECK-NEXT: [[INDEX_NEXT3]] = add nuw i64 [[INDEX1]], 487; CHECK-NEXT: [[TMP4:%.*]] = freeze <4 x i1> [[TMP6]]88; CHECK-NEXT: [[TMP7:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP4]])89; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT3]], 6490; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP7]], [[TMP8]]91; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_SPLIT:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]92; CHECK: middle.split:93; CHECK-NEXT: br i1 [[TMP7]], label [[VECTOR_EARLY_EXIT:%.*]], label [[MIDDLE_BLOCK:%.*]]94; CHECK: middle.block:95; CHECK-NEXT: br label [[LOOP_END:%.*]]96; CHECK: vector.early.exit:97; CHECK-NEXT: br label [[LOOP:%.*]]98; CHECK: loop.early.exit:99; CHECK-NEXT: ret i64 0100; CHECK: loop.end:101; CHECK-NEXT: ret i64 1102;103entry:104 %p1 = alloca [1024 x i8]105 %p2 = alloca [1024 x i8]106 call void @init_mem(ptr %p1, i64 1024)107 call void @init_mem(ptr %p2, i64 1024)108 br label %loop109 110loop:111 %index = phi i64 [ %index.next, %loop.inc ], [ 3, %entry ]112 %arrayidx = getelementptr inbounds i8, ptr %p1, i64 %index113 %ld1 = load i8, ptr %arrayidx, align 1114 %arrayidx1 = getelementptr inbounds i8, ptr %p2, i64 %index115 %ld2 = load i8, ptr %arrayidx1, align 1116 %cmp3 = icmp eq i8 %ld1, %ld2117 br i1 %cmp3, label %loop.inc, label %loop.early.exit118 119loop.inc:120 %index.next = add i64 %index, 1121 %exitcond = icmp ne i64 %index.next, 67122 br i1 %exitcond, label %loop, label %loop.end123 124loop.early.exit:125 ret i64 0126 127loop.end:128 ret i64 1129}130 131 132; The form of the induction variables requires SCEV predicates.133define i32 @diff_exit_block_needs_scev_check(i32 %end) {134; CHECK-LABEL: define i32 @diff_exit_block_needs_scev_check(135; CHECK-SAME: i32 [[END:%.*]]) {136; CHECK-NEXT: entry:137; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i32], align 4138; CHECK-NEXT: [[P2:%.*]] = alloca [1024 x i32], align 4139; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024)140; CHECK-NEXT: call void @init_mem(ptr [[P2]], i64 1024)141; CHECK-NEXT: [[END_CLAMPED:%.*]] = and i32 [[END]], 1023142; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[END]] to i10143; CHECK-NEXT: [[TMP1:%.*]] = zext i10 [[TMP0]] to i64144; CHECK-NEXT: [[UMAX1:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 1)145; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[UMAX1]], 4146; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]147; CHECK: vector.scevcheck:148; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[END_CLAMPED]], i32 1)149; CHECK-NEXT: [[TMP2:%.*]] = add nsw i32 [[UMAX]], -1150; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8151; CHECK-NEXT: [[TMP4:%.*]] = add i8 1, [[TMP3]]152; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i8 [[TMP4]], 1153; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[TMP2]], 255154; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP5]], [[TMP6]]155; CHECK-NEXT: br i1 [[TMP7]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]156; CHECK: vector.ph:157; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[UMAX1]], 4158; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[UMAX1]], [[N_MOD_VF]]159; CHECK-NEXT: [[TMP8:%.*]] = trunc i64 [[N_VEC]] to i8160; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]161; CHECK: vector.body:162; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]163; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[P1]], i64 [[INDEX]]164; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP10]], align 4165; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[P2]], i64 [[INDEX]]166; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x i32>, ptr [[TMP12]], align 4167; CHECK-NEXT: [[TMP14:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], [[WIDE_LOAD2]]168; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4169; CHECK-NEXT: [[TMP13:%.*]] = freeze <4 x i1> [[TMP14]]170; CHECK-NEXT: [[TMP15:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP13]])171; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]172; CHECK-NEXT: [[TMP17:%.*]] = or i1 [[TMP15]], [[TMP16]]173; CHECK-NEXT: br i1 [[TMP17]], label [[MIDDLE_SPLIT:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]174; CHECK: middle.split:175; CHECK-NEXT: br i1 [[TMP15]], label [[VECTOR_EARLY_EXIT:%.*]], label [[MIDDLE_BLOCK:%.*]]176; CHECK: middle.block:177; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[UMAX1]], [[N_VEC]]178; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]179; CHECK: vector.early.exit:180; CHECK-NEXT: br label [[FOUND:%.*]]181; CHECK: scalar.ph:182; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i8 [ [[TMP8]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_SCEVCHECK]] ]183; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ], [ 0, [[VECTOR_SCEVCHECK]] ]184; CHECK-NEXT: br label [[FOR_BODY:%.*]]185; CHECK: for.body:186; CHECK-NEXT: [[IND:%.*]] = phi i8 [ [[IND_NEXT:%.*]], [[FOR_INC:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]187; CHECK-NEXT: [[GEP_IND:%.*]] = phi i64 [ [[GEP_IND_NEXT:%.*]], [[FOR_INC]] ], [ [[BC_RESUME_VAL3]], [[SCALAR_PH]] ]188; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P1]], i64 [[GEP_IND]]189; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX1]], align 4190; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[P2]], i64 [[GEP_IND]]191; CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4192; CHECK-NEXT: [[CMP_EARLY:%.*]] = icmp eq i32 [[TMP18]], [[TMP19]]193; CHECK-NEXT: br i1 [[CMP_EARLY]], label [[FOUND]], label [[FOR_INC]]194; CHECK: for.inc:195; CHECK-NEXT: [[IND_NEXT]] = add i8 [[IND]], 1196; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[IND_NEXT]] to i32197; CHECK-NEXT: [[GEP_IND_NEXT]] = add i64 [[GEP_IND]], 1198; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[CONV]], [[END_CLAMPED]]199; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[EXIT]], !llvm.loop [[LOOP5:![0-9]+]]200; CHECK: found:201; CHECK-NEXT: ret i32 1202; CHECK: exit:203; CHECK-NEXT: ret i32 0204;205entry:206 %p1 = alloca [1024 x i32]207 %p2 = alloca [1024 x i32]208 call void @init_mem(ptr %p1, i64 1024)209 call void @init_mem(ptr %p2, i64 1024)210 %end.clamped = and i32 %end, 1023211 br label %for.body212 213for.body:214 %ind = phi i8 [ %ind.next, %for.inc ], [ 0, %entry ]215 %gep.ind = phi i64 [ %gep.ind.next, %for.inc ], [ 0, %entry ]216 %arrayidx1 = getelementptr inbounds i32, ptr %p1, i64 %gep.ind217 %0 = load i32, ptr %arrayidx1, align 4218 %arrayidx2 = getelementptr inbounds i32, ptr %p2, i64 %gep.ind219 %1 = load i32, ptr %arrayidx2, align 4220 %cmp.early = icmp eq i32 %0, %1221 br i1 %cmp.early, label %found, label %for.inc222 223for.inc:224 %ind.next = add i8 %ind, 1225 %conv = zext i8 %ind.next to i32226 %gep.ind.next = add i64 %gep.ind, 1227 %cmp = icmp ult i32 %conv, %end.clamped228 br i1 %cmp, label %for.body, label %exit229 230found:231 ret i32 1232 233exit:234 ret i32 0235}236 237 238declare void @abort()239 240; This is a variant of an early exit loop where the condition for leaving241; early is loop invariant.242define i32 @diff_blocks_invariant_early_exit_cond(ptr %s) {243; CHECK-LABEL: define i32 @diff_blocks_invariant_early_exit_cond(244; CHECK-SAME: ptr [[S:%.*]]) {245; CHECK-NEXT: entry:246; CHECK-NEXT: [[SVAL:%.*]] = load i32, ptr [[S]], align 4247; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[SVAL]], 0248; CHECK-NEXT: br label [[VECTOR_PH:%.*]]249; CHECK: vector.ph:250; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[COND]], i64 0251; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer252; CHECK-NEXT: [[TMP0:%.*]] = xor <4 x i1> [[BROADCAST_SPLAT]], splat (i1 true)253; CHECK-NEXT: [[TMP4:%.*]] = freeze <4 x i1> [[TMP0]]254; CHECK-NEXT: [[TMP1:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP4]])255; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]256; CHECK: vector.body:257; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]258; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4259; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], 276260; CHECK-NEXT: [[TMP3:%.*]] = or i1 [[TMP1]], [[TMP2]]261; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_SPLIT:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]262; CHECK: middle.split:263; CHECK-NEXT: br i1 [[TMP1]], label [[VECTOR_EARLY_EXIT:%.*]], label [[MIDDLE_BLOCK:%.*]]264; CHECK: middle.block:265; CHECK-NEXT: br label [[FOR_END:%.*]]266; CHECK: vector.early.exit:267; CHECK-NEXT: br label [[FOR_BODY:%.*]]268; CHECK: early.exit:269; CHECK-NEXT: tail call void @abort()270; CHECK-NEXT: unreachable271; CHECK: for.end:272; CHECK-NEXT: ret i32 0273;274entry:275 %sval = load i32, ptr %s, align 4276 %cond = icmp eq i32 %sval, 0277 br label %for.body278 279for.body:280 %ind = phi i32 [ -10, %entry ], [ %ind.next, %for.inc ]281 br i1 %cond, label %for.inc, label %early.exit282 283for.inc:284 %ind.next = add nsw i32 %ind, 1285 %ec = icmp eq i32 %ind.next, 266286 br i1 %ec, label %for.end, label %for.body287 288early.exit:289 tail call void @abort()290 unreachable291 292for.end:293 ret i32 0294}295 296define void @inner_loop_trip_count_depends_on_outer_iv(ptr align 8 dereferenceable(1792) %this, ptr %dst) {297; CHECK-LABEL: define void @inner_loop_trip_count_depends_on_outer_iv(298; CHECK-SAME: ptr align 8 dereferenceable(1792) [[THIS:%.*]], ptr [[DST:%.*]]) {299; CHECK-NEXT: entry:300; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr i8, ptr [[THIS]], i64 1000301; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]302; CHECK: outer.header:303; CHECK-NEXT: [[OUTER_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[OUTER_IV_NEXT:%.*]], [[OUTER_LATCH:%.*]] ]304; CHECK-NEXT: [[C_1:%.*]] = icmp eq i64 [[OUTER_IV]], 0305; CHECK-NEXT: br i1 [[C_1]], label [[THEN:%.*]], label [[INNER_HEADER_PREHEADER:%.*]]306; CHECK: inner.header.preheader:307; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[OUTER_IV]], 4308; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]309; CHECK: vector.ph:310; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[OUTER_IV]], 4311; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[OUTER_IV]], [[N_MOD_VF]]312; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]313; CHECK: vector.body:314; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]315; CHECK-NEXT: [[TMP0:%.*]] = getelementptr ptr, ptr [[GEP_SRC]], i64 [[INDEX]]316; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x ptr>, ptr [[TMP0]], align 8317; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <4 x ptr> [[WIDE_LOAD]], zeroinitializer318; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4319; CHECK-NEXT: [[TMP2:%.*]] = freeze <4 x i1> [[TMP1]]320; CHECK-NEXT: [[TMP3:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP2]])321; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]322; CHECK-NEXT: [[TMP5:%.*]] = or i1 [[TMP3]], [[TMP4]]323; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_SPLIT:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]324; CHECK: middle.split:325; CHECK-NEXT: br i1 [[TMP3]], label [[VECTOR_EARLY_EXIT:%.*]], label [[MIDDLE_BLOCK:%.*]]326; CHECK: middle.block:327; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[OUTER_IV]], [[N_VEC]]328; CHECK-NEXT: br i1 [[CMP_N]], label [[OUTER_LATCH_LOOPEXIT:%.*]], label [[SCALAR_PH]]329; CHECK: vector.early.exit:330; CHECK-NEXT: br label [[THEN_LOOPEXIT:%.*]]331; CHECK: scalar.ph:332; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[INNER_HEADER_PREHEADER]] ]333; CHECK-NEXT: br label [[INNER_HEADER:%.*]]334; CHECK: inner.header:335; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[INNER_LATCH:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]336; CHECK-NEXT: [[GEP_IV:%.*]] = getelementptr ptr, ptr [[GEP_SRC]], i64 [[IV]]337; CHECK-NEXT: [[L:%.*]] = load ptr, ptr [[GEP_IV]], align 8338; CHECK-NEXT: [[C_2:%.*]] = icmp eq ptr [[L]], null339; CHECK-NEXT: br i1 [[C_2]], label [[THEN_LOOPEXIT]], label [[INNER_LATCH]]340; CHECK: inner.latch:341; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1342; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[OUTER_IV]]343; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[OUTER_LATCH_LOOPEXIT]], label [[INNER_HEADER]], !llvm.loop [[LOOP8:![0-9]+]]344; CHECK: then.loopexit:345; CHECK-NEXT: br label [[THEN]]346; CHECK: then:347; CHECK-NEXT: store i32 0, ptr [[DST]], align 4348; CHECK-NEXT: br label [[OUTER_LATCH]]349; CHECK: outer.latch.loopexit:350; CHECK-NEXT: br label [[OUTER_LATCH]]351; CHECK: outer.latch:352; CHECK-NEXT: [[OUTER_IV_NEXT]] = add i64 [[OUTER_IV]], 1353; CHECK-NEXT: [[OUTER_EC:%.*]] = icmp eq i64 [[OUTER_IV_NEXT]], 100354; CHECK-NEXT: br i1 [[OUTER_EC]], label [[EXIT:%.*]], label [[OUTER_HEADER]]355; CHECK: exit:356; CHECK-NEXT: ret void357;358entry:359 %gep.src = getelementptr i8, ptr %this, i64 1000360 br label %outer.header361 362outer.header:363 %outer.iv = phi i64 [ 0, %entry ], [ %outer.iv.next, %outer.latch ]364 %c.1 = icmp eq i64 %outer.iv, 0365 br i1 %c.1, label %then, label %inner.header366 367inner.header:368 %iv = phi i64 [ %iv.next, %inner.latch ], [ 0, %outer.header ]369 %gep.iv = getelementptr ptr, ptr %gep.src, i64 %iv370 %l = load ptr, ptr %gep.iv, align 8371 %c.2 = icmp eq ptr %l, null372 br i1 %c.2, label %then, label %inner.latch373 374inner.latch:375 %iv.next = add i64 %iv, 1376 %ec = icmp eq i64 %iv.next, %outer.iv377 br i1 %ec, label %outer.latch, label %inner.header378 379then:380 store i32 0, ptr %dst, align 4381 br label %outer.latch382 383outer.latch:384 %outer.iv.next = add i64 %outer.iv, 1385 %outer.ec = icmp eq i64 %outer.iv.next, 100386 br i1 %outer.ec, label %exit, label %outer.header387 388exit:389 ret void390}391 392define i64 @loop_guard_needed_to_prove_dereferenceable(i32 %x, i1 %cmp2) {393; CHECK-LABEL: define i64 @loop_guard_needed_to_prove_dereferenceable(394; CHECK-SAME: i32 [[X:%.*]], i1 [[CMP2:%.*]]) {395; CHECK-NEXT: entry:396; CHECK-NEXT: [[A:%.*]] = alloca [32 x i32], align 4397; CHECK-NEXT: call void @init_mem(ptr [[A]], i64 128)398; CHECK-NEXT: [[C_X:%.*]] = icmp sgt i32 [[X]], 0399; CHECK-NEXT: br i1 [[C_X]], label [[PH:%.*]], label [[EXIT:%.*]]400; CHECK: ph:401; CHECK-NEXT: [[N:%.*]] = tail call i32 @llvm.smin.i32(i32 [[X]], i32 31)402; CHECK-NEXT: [[N_EXT:%.*]] = zext i32 [[N]] to i64403; CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i64 [[N_EXT]], 1404; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4405; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]406; CHECK: vector.ph:407; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4408; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]409; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]410; CHECK: vector.body:411; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]412; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [32 x i32], ptr [[A]], i64 0, i64 [[INDEX]]413; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4414; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], zeroinitializer415; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4416; CHECK-NEXT: [[TMP3:%.*]] = freeze <4 x i1> [[TMP2]]417; CHECK-NEXT: [[TMP4:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP3]])418; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]419; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]]420; CHECK-NEXT: br i1 [[TMP6]], label [[MIDDLE_SPLIT:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]421; CHECK: middle.split:422; CHECK-NEXT: br i1 [[TMP4]], label [[VECTOR_EARLY_EXIT:%.*]], label [[MIDDLE_BLOCK:%.*]]423; CHECK: middle.block:424; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]425; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]]426; CHECK: vector.early.exit:427; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP2]], i1 false)428; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], [[TMP7]]429; CHECK-NEXT: br label [[EXIT_LOOPEXIT]]430; CHECK: scalar.ph:431; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[PH]] ]432; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]433; CHECK: loop.header:434; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]435; CHECK-NEXT: [[ARRAYIDX42:%.*]] = getelementptr [32 x i32], ptr [[A]], i64 0, i64 [[IV]]436; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX42]], align 4437; CHECK-NEXT: [[CMP43:%.*]] = icmp eq i32 [[TMP9]], 0438; CHECK-NEXT: br i1 [[CMP43]], label [[EXIT_LOOPEXIT]], label [[LOOP_LATCH]]439; CHECK: loop.latch:440; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1441; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N_EXT]]442; CHECK-NEXT: br i1 [[EC]], label [[EXIT_LOOPEXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP10:![0-9]+]]443; CHECK: exit.loopexit:444; CHECK-NEXT: [[RES_PH:%.*]] = phi i64 [ [[IV]], [[LOOP_HEADER]] ], [ -1, [[LOOP_LATCH]] ], [ -1, [[MIDDLE_BLOCK]] ], [ [[TMP8]], [[VECTOR_EARLY_EXIT]] ]445; CHECK-NEXT: br label [[EXIT]]446; CHECK: exit:447; CHECK-NEXT: [[RES:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[RES_PH]], [[EXIT_LOOPEXIT]] ]448; CHECK-NEXT: ret i64 [[RES]]449;450entry:451 %A = alloca [32 x i32], align 4452 call void @init_mem(ptr %A, i64 128)453 %c.x = icmp sgt i32 %x, 0454 br i1 %c.x, label %ph, label %exit455 456ph:457 %n = tail call i32 @llvm.smin.i32(i32 %x, i32 31)458 %n.ext = zext i32 %n to i64459 br label %loop.header460 461loop.header:462 %iv = phi i64 [ 0, %ph ], [ %iv.next, %loop.latch ]463 %arrayidx42 = getelementptr [32 x i32], ptr %A, i64 0, i64 %iv464 %0 = load i32, ptr %arrayidx42, align 4465 %cmp43 = icmp eq i32 %0, 0466 br i1 %cmp43, label %exit, label %loop.latch467 468loop.latch:469 %iv.next = add i64 %iv, 1470 %ec = icmp eq i64 %iv, %n.ext471 br i1 %ec, label %exit, label %loop.header472 473exit:474 %res = phi i64 [ 0, %entry ], [ -1, %loop.latch ], [ %iv, %loop.header ]475 ret i64 %res476}477 478declare i32 @llvm.smin.i32(i32, i32)479 480@A = external global [100 x {i32, i8} ]481 482define ptr @btc_and_max_btc_require_predicates(ptr noalias %start, i64 %offset) {483; CHECK-LABEL: define ptr @btc_and_max_btc_require_predicates(484; CHECK-SAME: ptr noalias [[START:%.*]], i64 [[OFFSET:%.*]]) {485; CHECK-NEXT: entry:486; CHECK-NEXT: [[END:%.*]] = getelementptr i32, ptr [[START]], i64 [[OFFSET]]487; CHECK-NEXT: [[PRE_1:%.*]] = icmp ult i64 [[OFFSET]], 100488; CHECK-NEXT: call void @llvm.assume(i1 [[PRE_1]])489; CHECK-NEXT: [[PRE_2:%.*]] = icmp ugt i64 [[OFFSET]], 1490; CHECK-NEXT: call void @llvm.assume(i1 [[PRE_2]])491; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]492; CHECK: loop.header:493; CHECK-NEXT: [[IV_1:%.*]] = phi ptr [ @A, [[ENTRY:%.*]] ], [ [[IV_1_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]494; CHECK-NEXT: [[IV_2:%.*]] = phi ptr [ [[START]], [[ENTRY]] ], [ [[IV_2_NEXT:%.*]], [[LOOP_LATCH]] ]495; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[IV_1]], align 4496; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0497; CHECK-NEXT: br i1 [[C]], label [[LOOP_LATCH]], label [[EXIT:%.*]]498; CHECK: loop.latch:499; CHECK-NEXT: [[IV_2_NEXT]] = getelementptr i8, ptr [[IV_2]], i64 40500; CHECK-NEXT: [[IV_1_NEXT]] = getelementptr i8, ptr [[IV_1]], i64 40501; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[IV_2]], [[END]]502; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP_HEADER]]503; CHECK: exit:504; CHECK-NEXT: [[RES:%.*]] = phi ptr [ [[IV_1]], [[LOOP_HEADER]] ], [ [[IV_2]], [[LOOP_LATCH]] ]505; CHECK-NEXT: ret ptr [[RES]]506;507entry:508 %end = getelementptr i32, ptr %start, i64 %offset509 %pre.1 = icmp ult i64 %offset, 100510 call void @llvm.assume(i1 %pre.1)511 %pre.2 = icmp ugt i64 %offset, 1512 call void @llvm.assume(i1 %pre.2)513 br label %loop.header514 515loop.header:516 %iv.1 = phi ptr [ @A, %entry ], [ %iv.1.next, %loop.latch ]517 %iv.2 = phi ptr [ %start, %entry ], [ %iv.2.next, %loop.latch ]518 %l = load i32, ptr %iv.1, align 4519 %c = icmp eq i32 %l, 0520 br i1 %c, label %loop.latch, label %exit521 522loop.latch:523 %iv.2.next = getelementptr i8, ptr %iv.2, i64 40524 %iv.1.next = getelementptr i8, ptr %iv.1, i64 40525 %ec = icmp eq ptr %iv.2, %end526 br i1 %ec, label %exit, label %loop.header527 528exit:529 %res = phi ptr [ %iv.1, %loop.header ], [ %iv.2, %loop.latch ]530 ret ptr %res531}532 533define i64 @loop_guards_needed_to_prove_deref_multiple(i32 %x, i1 %c, ptr dereferenceable(1024) %src) {534; CHECK-LABEL: define i64 @loop_guards_needed_to_prove_deref_multiple(535; CHECK-SAME: i32 [[X:%.*]], i1 [[C:%.*]], ptr dereferenceable(1024) [[SRC:%.*]]) {536; CHECK-NEXT: entry:537; CHECK-NEXT: [[X_AND:%.*]] = and i32 [[X]], -2538; CHECK-NEXT: [[PRE_0:%.*]] = icmp eq i32 [[X]], 0539; CHECK-NEXT: br i1 [[PRE_0]], label [[THEN:%.*]], label [[EXIT:%.*]]540; CHECK: then:541; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C]], i32 [[X_AND]], i32 0542; CHECK-NEXT: [[PRE_1:%.*]] = icmp ugt i32 [[SEL]], 1024543; CHECK-NEXT: br i1 [[PRE_1]], label [[EXIT]], label [[PH:%.*]]544; CHECK: ph:545; CHECK-NEXT: [[PRE_2:%.*]] = icmp ne i32 [[SEL]], 0546; CHECK-NEXT: call void @llvm.assume(i1 [[PRE_2]])547; CHECK-NEXT: [[N:%.*]] = add i32 [[SEL]], -1548; CHECK-NEXT: [[N_EXT:%.*]] = zext i32 [[N]] to i64549; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SEL]], -2550; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64551; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 2552; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4553; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]554; CHECK: vector.ph:555; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 4556; CHECK-NEXT: [[IV_NEXT:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]557; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]558; CHECK: vector.body:559; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[LOOP_HEADER]] ]560; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[INDEX]]561; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr [[TMP3]], align 1562; CHECK-NEXT: [[TMP4:%.*]] = icmp eq <4 x i8> [[WIDE_LOAD]], zeroinitializer563; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4564; CHECK-NEXT: [[TMP5:%.*]] = freeze <4 x i1> [[TMP4]]565; CHECK-NEXT: [[TMP6:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP5]])566; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[IV_NEXT]]567; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]568; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_SPLIT:%.*]], label [[LOOP_HEADER]], !llvm.loop [[LOOP11:![0-9]+]]569; CHECK: middle.split:570; CHECK-NEXT: br i1 [[TMP6]], label [[VECTOR_EARLY_EXIT:%.*]], label [[LOOP_LATCH:%.*]]571; CHECK: middle.block:572; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[IV_NEXT]]573; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]]574; CHECK: vector.early.exit:575; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 false)576; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], [[TMP9]]577; CHECK-NEXT: br label [[EXIT_LOOPEXIT]]578; CHECK: scalar.ph:579; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT]], [[LOOP_LATCH]] ], [ 0, [[PH]] ]580; CHECK-NEXT: br label [[LOOP_HEADER1:%.*]]581; CHECK: loop.header:582; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[IV_NEXT1:%.*]], [[LOOP_LATCH1:%.*]] ], [ [[IV]], [[SCALAR_PH]] ]583; CHECK-NEXT: [[GEP_SRC_I:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[IV1]]584; CHECK-NEXT: [[L:%.*]] = load i8, ptr [[GEP_SRC_I]], align 1585; CHECK-NEXT: [[C_1:%.*]] = icmp eq i8 [[L]], 0586; CHECK-NEXT: br i1 [[C_1]], label [[EXIT_LOOPEXIT]], label [[LOOP_LATCH1]]587; CHECK: loop.latch:588; CHECK-NEXT: [[IV_NEXT1]] = add i64 [[IV1]], 1589; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV1]], [[N_EXT]]590; CHECK-NEXT: br i1 [[EC]], label [[EXIT_LOOPEXIT]], label [[LOOP_HEADER1]], !llvm.loop [[LOOP12:![0-9]+]]591; CHECK: exit.loopexit:592; CHECK-NEXT: [[RES_PH:%.*]] = phi i64 [ [[IV1]], [[LOOP_HEADER1]] ], [ 0, [[LOOP_LATCH1]] ], [ 0, [[LOOP_LATCH]] ], [ [[TMP10]], [[VECTOR_EARLY_EXIT]] ]593; CHECK-NEXT: br label [[EXIT]]594; CHECK: exit:595; CHECK-NEXT: [[RES:%.*]] = phi i64 [ -1, [[ENTRY:%.*]] ], [ -2, [[THEN]] ], [ [[RES_PH]], [[EXIT_LOOPEXIT]] ]596; CHECK-NEXT: ret i64 [[RES]]597;598entry:599 %x.and = and i32 %x, -2600 %pre.0 = icmp eq i32 %x, 0601 br i1 %pre.0, label %then, label %exit602 603then:604 %sel = select i1 %c, i32 %x.and, i32 0605 %pre.1 = icmp ugt i32 %sel, 1024606 br i1 %pre.1, label %exit, label %ph607 608ph:609 %pre.2 = icmp ne i32 %sel, 0610 call void @llvm.assume(i1 %pre.2)611 %n = add i32 %sel, -1612 %n.ext = zext i32 %n to i64613 br label %loop.header614 615loop.header:616 %iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %ph ]617 %gep.src.i = getelementptr i8, ptr %src, i64 %iv618 %l = load i8, ptr %gep.src.i, align 1619 %c.1 = icmp eq i8 %l, 0620 br i1 %c.1, label %exit, label %loop.latch621 622loop.latch:623 %iv.next = add i64 %iv, 1624 %ec = icmp eq i64 %iv, %n.ext625 br i1 %ec, label %exit, label %loop.header626 627exit:628 %res = phi i64 [ -1, %entry ], [ -2, %then ], [ 0, %loop.latch ], [ %iv, %loop.header ]629 ret i64 %res630}631;.632; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}633; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}634; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}635; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}636; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}637; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]]}638; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}639; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}640; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META2]], [[META1]]}641; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}642; CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META2]], [[META1]]}643; CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}644; CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META2]], [[META1]]}645;.646