219 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck %s3 4; Make sure LV does not crash when creating runtime checks involving values from5; other loops.6define i16 @test(ptr %arg, i64 %N) {7; CHECK-LABEL: @test(8; CHECK-NEXT: entry:9; CHECK-NEXT: br label [[OUTER:%.*]]10; CHECK: outer:11; CHECK-NEXT: [[L_1:%.*]] = load ptr, ptr [[ARG:%.*]], align 812; CHECK-NEXT: [[L_2:%.*]] = load ptr, ptr [[ARG]], align 813; CHECK-NEXT: [[C_1:%.*]] = call i1 @cond()14; CHECK-NEXT: br i1 [[C_1]], label [[OUTER_BACKEDGE:%.*]], label [[INNER_PREHEADER:%.*]]15; CHECK: outer.backedge:16; CHECK-NEXT: br label [[OUTER]]17; CHECK: inner.preheader:18; CHECK-NEXT: br label [[INNER:%.*]]19; CHECK: inner:20; CHECK-NEXT: [[C_2:%.*]] = call i1 @cond()21; CHECK-NEXT: br i1 [[C_2]], label [[OUTER_LATCH:%.*]], label [[INNER_BB:%.*]]22; CHECK: inner.bb:23; CHECK-NEXT: [[C_3:%.*]] = call i1 @cond()24; CHECK-NEXT: br i1 [[C_3]], label [[LOOP_3_PREHEADER:%.*]], label [[INNER_LATCH:%.*]]25; CHECK: loop.3.preheader:26; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], 127; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 228; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]29; CHECK: vector.memcheck:30; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[L_2]], i64 231; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, ptr [[L_1]], i64 232; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[N]], 133; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 434; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[L_1]], i64 [[TMP2]]35; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[L_2]], [[SCEVGEP3]]36; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[SCEVGEP5]], [[SCEVGEP]]37; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]38; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]39; CHECK: vector.ph:40; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 241; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]42; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]43; CHECK: vector.body:44; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]45; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[INDEX]], 146; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i16, ptr [[L_1]], i64 [[TMP4]]47; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i16>, ptr [[TMP5]], align 2, !alias.scope [[META0:![0-9]+]]48; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i16> [[WIDE_LOAD]], i32 149; CHECK-NEXT: store i16 [[TMP8]], ptr [[L_2]], align 2, !alias.scope [[META3:![0-9]+]], !noalias [[META0]]50; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 251; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]52; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]53; CHECK: middle.block:54; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]55; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]]56; CHECK: scalar.ph:57; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_3_PREHEADER]] ], [ 0, [[VECTOR_MEMCHECK]] ]58; CHECK-NEXT: br label [[LOOP_3:%.*]]59; CHECK: inner.latch:60; CHECK-NEXT: [[C_4:%.*]] = call i1 @cond()61; CHECK-NEXT: br i1 [[C_4]], label [[EXIT_LOOPEXIT1:%.*]], label [[INNER]]62; CHECK: outer.latch:63; CHECK-NEXT: br label [[OUTER_BACKEDGE]]64; CHECK: loop.3:65; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_3]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]66; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 167; CHECK-NEXT: [[C_5:%.*]] = icmp ult i64 [[IV]], [[N]]68; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr inbounds i16, ptr [[L_1]], i64 [[IV_NEXT]]69; CHECK-NEXT: [[LOOP_L_1:%.*]] = load i16, ptr [[GEP_1]], align 270; CHECK-NEXT: [[GEP_2:%.*]] = getelementptr inbounds i16, ptr [[L_2]], i64 071; CHECK-NEXT: store i16 [[LOOP_L_1]], ptr [[GEP_2]], align 272; CHECK-NEXT: br i1 [[C_5]], label [[LOOP_3]], label [[EXIT_LOOPEXIT]], !llvm.loop [[LOOP8:![0-9]+]]73; CHECK: exit.loopexit:74; CHECK-NEXT: br label [[EXIT:%.*]]75; CHECK: exit.loopexit1:76; CHECK-NEXT: br label [[EXIT]]77; CHECK: exit:78; CHECK-NEXT: [[L_3:%.*]] = load i16, ptr [[L_1]], align 279; CHECK-NEXT: ret i16 [[L_3]]80;81entry:82 br label %outer83 84outer:85 %l.1 = load ptr, ptr %arg, align 886 %l.2 = load ptr, ptr %arg, align 887 %c.1 = call i1 @cond()88 br i1 %c.1, label %outer, label %inner89 90inner:91 %c.2 = call i1 @cond()92 br i1 %c.2, label %outer.latch, label %inner.bb93 94inner.bb:95 %c.3 = call i1 @cond()96 br i1 %c.3, label %loop.3, label %inner.latch97 98inner.latch:99 %c.4 = call i1 @cond()100 br i1 %c.4, label %exit, label %inner101 102outer.latch:103 br label %outer104 105loop.3:106 %iv = phi i64 [ %iv.next, %loop.3 ], [ 0, %inner.bb ]107 %iv.next = add nsw nuw i64 %iv, 1108 %c.5 = icmp ult i64 %iv, %N109 %gep.1 = getelementptr inbounds i16, ptr %l.1, i64 %iv.next110 %loop.l.1 = load i16, ptr %gep.1, align 2111 %gep.2 = getelementptr inbounds i16, ptr %l.2, i64 0112 store i16 %loop.l.1, ptr %gep.2 , align 2113 br i1 %c.5, label %loop.3, label %exit114 115exit:116 %l.3 = load i16, ptr %l.1, align 2117 ret i16 %l.3118}119 120define void @test2(ptr %dst) {121; CHECK-LABEL: @test2(122; CHECK-NEXT: entry:123; CHECK-NEXT: br label [[LOOP_1_HEADER:%.*]]124; CHECK: loop.1.header:125; CHECK-NEXT: br label [[LOOP_2:%.*]]126; CHECK: loop.2:127; CHECK-NEXT: [[INDVAR:%.*]] = phi i32 [ [[INDVAR_NEXT:%.*]], [[LOOP_2]] ], [ 0, [[LOOP_1_HEADER]] ]128; CHECK-NEXT: [[IV_1:%.*]] = phi i64 [ 1000, [[LOOP_1_HEADER]] ], [ [[IV_1_NEXT:%.*]], [[LOOP_2]] ]129; CHECK-NEXT: [[IV_1_NEXT]] = add i64 [[IV_1]], -1130; CHECK-NEXT: [[C_1:%.*]] = call i1 @cond()131; CHECK-NEXT: [[INDVAR_NEXT]] = add i32 [[INDVAR]], 1132; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_2]], label [[LOOP_3_PH:%.*]]133; CHECK: loop.3.ph:134; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i32 [ [[INDVAR]], [[LOOP_2]] ]135; CHECK-NEXT: [[IV_1_LCSSA:%.*]] = phi i64 [ [[IV_1]], [[LOOP_2]] ]136; CHECK-NEXT: [[TMP0:%.*]] = and i64 [[IV_1_LCSSA]], 4294967295137; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[INDVAR_LCSSA]], -1138; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1000139; CHECK-NEXT: [[SMIN:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP2]], i32 1)140; CHECK-NEXT: [[TMP3:%.*]] = sub i32 [[TMP2]], [[SMIN]]141; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP3]] to i64142; CHECK-NEXT: [[TMP5:%.*]] = add nuw nsw i64 [[TMP4]], 1143; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP5]], 2144; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]145; CHECK: vector.ph:146; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP5]], 2147; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP5]], [[N_MOD_VF]]148; CHECK-NEXT: [[IND_END:%.*]] = sub i64 [[TMP0]], [[N_VEC]]149; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]150; CHECK: vector.body:151; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]152; CHECK-NEXT: [[OFFSET_IDX:%.*]] = sub i64 [[TMP0]], [[INDEX]]153; CHECK-NEXT: [[TMP7:%.*]] = add nsw i64 [[OFFSET_IDX]], -1154; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], 4294967295155; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i64 [[TMP8]]156; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i64 0157; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i64 -1158; CHECK-NEXT: store <2 x i32> zeroinitializer, ptr [[TMP11]], align 4159; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2160; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]161; CHECK-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]162; CHECK: middle.block:163; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP5]], [[N_VEC]]164; CHECK-NEXT: br i1 [[CMP_N]], label [[LOOP_1_LATCH:%.*]], label [[SCALAR_PH]]165; CHECK: scalar.ph:166; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[TMP0]], [[LOOP_3_PH]] ]167; CHECK-NEXT: br label [[LOOP_3:%.*]]168; CHECK: loop.3:169; CHECK-NEXT: [[IV_2:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_2_NEXT:%.*]], [[LOOP_3]] ]170; CHECK-NEXT: [[IV_2_NEXT]] = add nsw i64 [[IV_2]], -1171; CHECK-NEXT: [[AND_IV:%.*]] = and i64 [[IV_2_NEXT]], 4294967295172; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[AND_IV]]173; CHECK-NEXT: store i32 0, ptr [[GEP_DST]], align 4174; CHECK-NEXT: [[IV_2_TRUNC:%.*]] = trunc i64 [[IV_2]] to i32175; CHECK-NEXT: [[EC:%.*]] = icmp sgt i32 [[IV_2_TRUNC]], 1176; CHECK-NEXT: br i1 [[EC]], label [[LOOP_3]], label [[LOOP_1_LATCH]], !llvm.loop [[LOOP10:![0-9]+]]177; CHECK: loop.1.latch:178; CHECK-NEXT: [[C_2:%.*]] = call i1 @cond()179; CHECK-NEXT: br i1 [[C_2]], label [[EXIT:%.*]], label [[LOOP_1_HEADER]]180; CHECK: exit:181; CHECK-NEXT: ret void182;183entry:184 br label %loop.1.header185 186loop.1.header:187 br label %loop.2188 189loop.2:190 %iv.1 = phi i64 [ 1000, %loop.1.header ], [ %iv.1.next, %loop.2 ]191 %iv.1.next = add i64 %iv.1, -1192 %c.1 = call i1 @cond()193 br i1 %c.1, label %loop.2, label %loop.3.ph194 195loop.3.ph:196 %iv.1.lcssa = phi i64 [ %iv.1, %loop.2 ]197 %0 = and i64 %iv.1.lcssa, 4294967295198 br label %loop.3199 200loop.3:201 %iv.2 = phi i64 [ %0, %loop.3.ph ], [ %iv.2.next, %loop.3 ]202 %iv.2.next = add nsw i64 %iv.2, -1203 %and.iv = and i64 %iv.2.next, 4294967295204 %gep.dst = getelementptr inbounds i32, ptr %dst, i64 %and.iv205 store i32 0, ptr %gep.dst, align 4206 %iv.2.trunc = trunc i64 %iv.2 to i32207 %ec = icmp sgt i32 %iv.2.trunc, 1208 br i1 %ec, label %loop.3, label %loop.1.latch209 210loop.1.latch:211 %c.2 = call i1 @cond()212 br i1 %c.2, label %exit, label %loop.1.header213 214exit:215 ret void216}217 218declare i1 @cond()219