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1; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s2 3; This test is to ensure that SCEV checks (which are costly performancewise) are4; not generated when appropriate aliasing checks are sufficient.5 6define void @foo(ptr %pout, ptr %pin, i64 %val0, i64 %val1, i64 %val2) {7; CHECK-LABEL: @foo(8; CHECK-NOT: vector.scevcheck9; CHECK: vector.body10entry:11 %0 = getelementptr double, ptr %pin, i64 %val012 br label %loop1.header13 14loop1.header: ; preds = %loop1.latch, %entry15 %i = phi i64 [ %i.next, %loop1.latch ], [ 0, %entry ]16 %mul0 = mul nsw i64 %i, %val217 %arrayidx0 = getelementptr inbounds double, ptr %0, i64 %mul018 %mul1 = mul nsw i64 %i, %val119 br label %loop2.header20 21loop2.header: ; preds = %loop1.header, %loop2.header22 %j = phi i64 [ 0, %loop1.header ], [ %j.next, %loop2.header ]23 %1 = load double, ptr %arrayidx0, align 824 %arrayidx1 = getelementptr inbounds double, ptr %0, i64 %j25 %2 = load double, ptr %arrayidx1, align 826 %sum = fadd contract double %1, %227 %3 = getelementptr double, ptr %pout, i64 %mul128 %arrayidx2 = getelementptr inbounds double, ptr %3, i64 %j29 store double %sum, ptr %arrayidx2, align 830 %j.next = add nuw nsw i64 %j, 131 %cmp = icmp slt i64 %j.next, %val132 br i1 %cmp, label %loop2.header, label %loop1.latch33 34loop1.latch: ; preds = %loop2.header35 %i.next = add nuw nsw i64 %i, 136 %exitcond = icmp eq i64 %i.next, %val137 br i1 %exitcond, label %exit, label %loop1.header38 39exit: ; preds = %loop1.latch40 ret void41}42 43; Similar test to the above but with the %arrayidx0 moved to the loop2.header44 45define void @bar(ptr %pout, ptr %pin, i64 %val0, i64 %val1, i64 %val2) {46; CHECK-LABEL: @bar(47; CHECK-NOT: vector.scevcheck48; CHECK: vector.body49entry:50 %0 = getelementptr double, ptr %pin, i64 %val051 br label %loop1.header52 53loop1.header: ; preds = %loop1.latch, %entry54 %i = phi i64 [ %i.next, %loop1.latch ], [ 0, %entry ]55 %mul0 = mul nsw i64 %i, %val256 %mul1 = mul nsw i64 %i, %val157 br label %loop2.header58 59loop2.header: ; preds = %loop1.header, %loop2.header60 %j = phi i64 [ 0, %loop1.header ], [ %j.next, %loop2.header ]61 %arrayidx0 = getelementptr inbounds double, ptr %0, i64 %mul062 %1 = load double, ptr %arrayidx0, align 863 %arrayidx1 = getelementptr inbounds double, ptr %0, i64 %j64 %2 = load double, ptr %arrayidx1, align 865 %sum = fadd contract double %1, %266 %3 = getelementptr double, ptr %pout, i64 %mul167 %arrayidx2 = getelementptr inbounds double, ptr %3, i64 %j68 store double %sum, ptr %arrayidx2, align 869 %j.next = add nuw nsw i64 %j, 170 %cmp = icmp slt i64 %j.next, %val171 br i1 %cmp, label %loop2.header, label %loop1.latch72 73loop1.latch: ; preds = %loop2.header74 %i.next = add nuw nsw i64 %i, 175 %exitcond = icmp eq i64 %i.next, %val176 br i1 %exitcond, label %exit, label %loop1.header77 78exit: ; preds = %loop1.latch79 ret void80}81