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1; RUN: opt < %s -passes=loop-vectorize,dce,instcombine -force-vector-interleave=1 -force-vector-width=4 -S | FileCheck %s2 3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"4 5;CHECK-LABEL: @read_mod_write_single_ptr(6;CHECK: load <4 x float>7;CHECK: ret void8define void @read_mod_write_single_ptr(ptr nocapture %a, i32 %n) nounwind uwtable ssp {9 %1 = icmp sgt i32 %n, 010 br i1 %1, label %.lr.ph, label %._crit_edge11 12.lr.ph: ; preds = %0, %.lr.ph13 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]14 %2 = getelementptr inbounds float, ptr %a, i64 %indvars.iv15 %3 = load float, ptr %2, align 416 %4 = fmul float %3, 3.000000e+0017 store float %4, ptr %2, align 418 %indvars.iv.next = add i64 %indvars.iv, 119 %lftr.wideiv = trunc i64 %indvars.iv.next to i3220 %exitcond = icmp eq i32 %lftr.wideiv, %n21 br i1 %exitcond, label %._crit_edge, label %.lr.ph22 23._crit_edge: ; preds = %.lr.ph, %024 ret void25}26 27; Ensure that volatile stores are not vectorized.28; CHECK-LABEL: @read_mod_write_single_ptr_volatile_store(29; CHECK-NOT: store <4 x float>30; CHECK: ret void31define void @read_mod_write_single_ptr_volatile_store(ptr nocapture %a, i32 %n) nounwind uwtable ssp {32 %1 = icmp sgt i32 %n, 033 br i1 %1, label %.lr.ph, label %._crit_edge34 35.lr.ph: ; preds = %0, %.lr.ph36 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]37 %2 = getelementptr inbounds float, ptr %a, i64 %indvars.iv38 %3 = load float, ptr %2, align 439 %4 = fmul float %3, 3.000000e+0040 store volatile float %4, ptr %2, align 441 %indvars.iv.next = add i64 %indvars.iv, 142 %lftr.wideiv = trunc i64 %indvars.iv.next to i3243 %exitcond = icmp eq i32 %lftr.wideiv, %n44 br i1 %exitcond, label %._crit_edge, label %.lr.ph45 46._crit_edge: ; preds = %.lr.ph, %047 ret void48}49