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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S -passes=newgvn < %s | FileCheck %s3 4define i32 @unsafe(i1 %arg, i32 %arg1) {5; CHECK-LABEL: define i32 @unsafe(6; CHECK-SAME: i1 [[ARG:%.*]], i32 [[ARG1:%.*]]) {7; CHECK-NEXT: [[BB:.*:]]8; CHECK-NEXT: br label %[[BB4:.*]]9; CHECK: [[BB4]]:10; CHECK-NEXT: br i1 [[ARG]], label %[[BB6:.*]], label %[[BB5:.*]]11; CHECK: [[BB5]]:12; CHECK-NEXT: br label %[[BB6]]13; CHECK: [[BB6]]:14; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[ARG1]], %[[BB5]] ], [ 0, %[[BB4]] ]15; CHECK-NEXT: [[SREM:%.*]] = srem i32 [[ARG1]], [[PHI]]16; CHECK-NEXT: store i32 [[SREM]], ptr null, align 417; CHECK-NEXT: br i1 [[ARG]], label %[[BB8:.*]], label %[[BB7:.*]]18; CHECK: [[BB7]]:19; CHECK-NEXT: br i1 true, label %[[BB8]], label %[[BB5]]20; CHECK: [[BB8]]:21; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i32 [ [[ARG1]], %[[BB6]] ], [ 0, %[[BB7]] ]22; CHECK-NEXT: [[PHI9:%.*]] = phi i32 [ 0, %[[BB7]] ], [ 1, %[[BB6]] ]23; CHECK-NEXT: store i32 [[PHIOFOPS]], ptr null, align 424; CHECK-NEXT: br label %[[BB4]]25;26bb:27 br label %bb428 29bb4: ; preds = %bb8, %bb30 br i1 %arg, label %bb6, label %bb531 32bb5: ; preds = %bb7, %bb433 br label %bb634 35bb6: ; preds = %bb5, %bb436 %phi = phi i32 [ %arg1, %bb5 ], [ 0, %bb4 ]37 %or = or i32 %phi, %arg138 %srem = srem i32 %or, %phi39 store i32 %srem, ptr null, align 440 br i1 %arg, label %bb8, label %bb741 42bb7: ; preds = %bb643 br i1 true, label %bb8, label %bb544 45bb8: ; preds = %bb7, %bb646 %phi9 = phi i32 [ 0, %bb7 ], [ 1, %bb6 ]47 %mul = mul i32 %phi9, %or48 store i32 %mul, ptr null, align 449 br label %bb450}51 52define i32 @unsafe_load(i1 %arg) {53; CHECK-LABEL: define i32 @unsafe_load(54; CHECK-SAME: i1 [[ARG:%.*]]) {55; CHECK-NEXT: [[BB:.*:]]56; CHECK-NEXT: br label %[[BB1:.*]]57; CHECK: [[BB1]]:58; CHECK-NEXT: br i1 [[ARG]], label %[[BB3:.*]], label %[[BB2:.*]]59; CHECK: [[BB2]]:60; CHECK-NEXT: br label %[[BB3]]61; CHECK: [[BB3]]:62; CHECK-NEXT: [[PHI4:%.*]] = phi i32 [ 1, %[[BB2]] ], [ 0, %[[BB1]] ]63; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr null, align 464; CHECK-NEXT: [[SREM:%.*]] = srem i32 [[LOAD]], [[PHI4]]65; CHECK-NEXT: store i32 [[SREM]], ptr null, align 466; CHECK-NEXT: br i1 [[ARG]], label %[[BB6:.*]], label %[[BB5:.*]]67; CHECK: [[BB5]]:68; CHECK-NEXT: br i1 true, label %[[BB6]], label %[[BB2]]69; CHECK: [[BB6]]:70; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i32 [ [[LOAD]], %[[BB3]] ], [ 0, %[[BB5]] ]71; CHECK-NEXT: [[PHI7:%.*]] = phi i32 [ 0, %[[BB5]] ], [ 1, %[[BB3]] ]72; CHECK-NEXT: store i32 [[PHIOFOPS]], ptr null, align 473; CHECK-NEXT: br label %[[BB1]]74;75bb:76 br label %bb177 78bb1: ; preds = %bb6, %bb79 br i1 %arg, label %bb3, label %bb280 81bb2: ; preds = %bb5, %bb182 %phi = phi i32 [ 1, %bb1 ], [ 0, %bb5 ]83 br label %bb384 85bb3: ; preds = %bb2, %bb186 %phi4 = phi i32 [ %phi, %bb2 ], [ 0, %bb1 ]87 %load = load i32, ptr null, align 488 %srem = srem i32 %load, %phi489 store i32 %srem, ptr null, align 490 br i1 %arg, label %bb6, label %bb591 92bb5: ; preds = %bb393 br i1 true, label %bb6, label %bb294 95bb6: ; preds = %bb5, %bb396 %phi7 = phi i32 [ 0, %bb5 ], [ 1, %bb3 ]97 %mul = mul i32 %phi7, %load98 store i32 %mul, ptr null, align 499 br label %bb1100}101