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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=newgvn -enable-phi-of-ops=true -S | FileCheck %s3target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"4 5define i32 @test1(i32, ptr) {6; CHECK-LABEL: @test1(7; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP0:%.*]], 08; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]9; CHECK: 4:10; CHECK-NEXT: br label [[TMP6:%.*]]11; CHECK: 5:12; CHECK-NEXT: br label [[TMP6]]13; CHECK: 6:14; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i32 [ 105, [[TMP5]] ], [ 75, [[TMP4]] ]15; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 5, [[TMP4]] ], [ 7, [[TMP5]] ]16; CHECK-NEXT: ret i32 [[PHIOFOPS]]17;18 %3 = icmp ne i32 %0, 019 br i1 %3, label %4, label %520 21; <label>:4: ; preds = %222 br label %623 24; <label>:5: ; preds = %225 br label %626 27; <label>:6: ; preds = %5, %428 %.0 = phi i32 [ 5, %4 ], [ 7, %5 ]29 %7 = mul nsw i32 %.0, 1530 ret i32 %731}32;; Dependent phi of ops33define i32 @test1b(i32, ptr) {34; CHECK-LABEL: @test1b(35; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP0:%.*]], 036; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]37; CHECK: 4:38; CHECK-NEXT: br label [[TMP6:%.*]]39; CHECK: 5:40; CHECK-NEXT: br label [[TMP6]]41; CHECK: 6:42; CHECK-NEXT: [[PHIOFOPS1:%.*]] = phi i32 [ 105, [[TMP5]] ], [ 75, [[TMP4]] ]43; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i32 [ 1575, [[TMP5]] ], [ 1125, [[TMP4]] ]44; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 5, [[TMP4]] ], [ 7, [[TMP5]] ]45; CHECK-NEXT: ret i32 [[PHIOFOPS]]46;47 %3 = icmp ne i32 %0, 048 br i1 %3, label %4, label %549 50; <label>:4: ; preds = %251 br label %652 53; <label>:5: ; preds = %254 br label %655 56; <label>:6: ; preds = %5, %457 %.0 = phi i32 [ 5, %4 ], [ 7, %5 ]58 %7 = mul nsw i32 %.0, 1559 %8 = mul nsw i32 %7, 1560 ret i32 %861}62 63define i32 @test2(i32) {64; CHECK-LABEL: @test2(65; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP0:%.*]], 066; CHECK-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP4:%.*]]67; CHECK: 3:68; CHECK-NEXT: br label [[TMP5:%.*]]69; CHECK: 4:70; CHECK-NEXT: br label [[TMP5]]71; CHECK: 5:72; CHECK-NEXT: [[DOT01:%.*]] = phi i32 [ 3, [[TMP3]] ], [ 2, [[TMP4]] ]73; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 2, [[TMP3]] ], [ 3, [[TMP4]] ]74; CHECK-NEXT: ret i32 575;76 %2 = icmp ne i32 %0, 077 br i1 %2, label %3, label %478 79; <label>:3: ; preds = %180 br label %581 82; <label>:4: ; preds = %183 br label %584 85; <label>:5: ; preds = %4, %386 %.01 = phi i32 [ 3, %3 ], [ 2, %4 ]87 %.0 = phi i32 [ 2, %3 ], [ 3, %4 ]88 %6 = add nsw i32 %.01, %.089 ret i32 %690}91define i32 @test3(i1 %which) {92; CHECK-LABEL: @test3(93; CHECK-NEXT: entry:94; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]95; CHECK: delay:96; CHECK-NEXT: br label [[FINAL]]97; CHECK: final:98; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i32 [ -877, [[ENTRY:%.*]] ], [ 113, [[DELAY]] ]99; CHECK-NEXT: [[A:%.*]] = phi i32 [ 1000, [[ENTRY]] ], [ 10, [[DELAY]] ]100; CHECK-NEXT: ret i32 [[PHIOFOPS]]101;102 103entry:104 br i1 %which, label %final, label %delay105 106delay:107 br label %final108 109final:110 %A = phi i32 [ 1000, %entry ], [ 10, %delay ]111 %value = sub i32 123, %A112 ret i32 %value113}114 115define <2 x i32> @test3vec(i1 %which) {116; CHECK-LABEL: @test3vec(117; CHECK-NEXT: entry:118; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]119; CHECK: delay:120; CHECK-NEXT: br label [[FINAL]]121; CHECK: final:122; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi <2 x i32> [ splat (i32 -877), [[ENTRY:%.*]] ], [ splat (i32 113), [[DELAY]] ]123; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ splat (i32 1000), [[ENTRY]] ], [ splat (i32 10), [[DELAY]] ]124; CHECK-NEXT: ret <2 x i32> [[PHIOFOPS]]125;126 127entry:128 br i1 %which, label %final, label %delay129 130delay:131 br label %final132 133final:134 %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ]135 %value = sub <2 x i32> <i32 123, i32 123>, %A136 ret <2 x i32> %value137}138 139define <2 x i32> @test3vec2(i1 %which) {140; CHECK-LABEL: @test3vec2(141; CHECK-NEXT: entry:142; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]143; CHECK: delay:144; CHECK-NEXT: br label [[FINAL]]145; CHECK: final:146; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi <2 x i32> [ <i32 -877, i32 -2167>, [[ENTRY:%.*]] ], [ <i32 113, i32 303>, [[DELAY]] ]147; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 2500>, [[ENTRY]] ], [ <i32 10, i32 30>, [[DELAY]] ]148; CHECK-NEXT: ret <2 x i32> [[PHIOFOPS]]149;150 151entry:152 br i1 %which, label %final, label %delay153 154delay:155 br label %final156 157final:158 %A = phi <2 x i32> [ <i32 1000, i32 2500>, %entry ], [ <i32 10, i32 30>, %delay ]159 %value = sub <2 x i32> <i32 123, i32 333>, %A160 ret <2 x i32> %value161}162 163;; This example is a bit contrived because we can't create fake memoryuses, so we use two loads in the if blocks164define i32 @test4(i32, ptr, ptr noalias, ptr noalias) {165; CHECK-LABEL: @test4(166; CHECK-NEXT: store i32 5, ptr [[TMP2:%.*]], align 4167; CHECK-NEXT: store i32 7, ptr [[TMP3:%.*]], align 4168; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP0:%.*]], 0169; CHECK-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP7:%.*]]170; CHECK: 6:171; CHECK-NEXT: br label [[TMP8:%.*]]172; CHECK: 7:173; CHECK-NEXT: br label [[TMP8]]174; CHECK: 8:175; CHECK-NEXT: [[DOT01:%.*]] = phi i32 [ 5, [[TMP6]] ], [ 7, [[TMP7]] ]176; CHECK-NEXT: [[DOT0:%.*]] = phi ptr [ [[TMP2]], [[TMP6]] ], [ [[TMP3]], [[TMP7]] ]177; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOT0]], align 4178; CHECK-NEXT: [[TMP10:%.*]] = mul nsw i32 [[TMP9]], 15179; CHECK-NEXT: [[TMP11:%.*]] = mul nsw i32 [[TMP10]], [[DOT01]]180; CHECK-NEXT: ret i32 [[TMP11]]181;182 store i32 5, ptr %2, align 4183 store i32 7, ptr %3, align 4184 %5 = icmp ne i32 %0, 0185 br i1 %5, label %6, label %8186 187; <label>:6: ; preds = %4188 %7 = load i32, ptr %2, align 4189 br label %10190 191; <label>:8: ; preds = %4192 %9 = load i32, ptr %3, align 4193 br label %10194 195; <label>:10: ; preds = %8, %6196 %.01 = phi i32 [ %7, %6 ], [ %9, %8 ]197 %.0 = phi ptr [ %2, %6 ], [ %3, %8 ]198 %11 = load i32, ptr %.0, align 4199 %12 = mul nsw i32 %11, 15200 %13 = mul nsw i32 %12, %.01201 ret i32 %13202}203 204@global = common global [100 x i64] zeroinitializer, align 16205@global.1 = common global [100 x i64] zeroinitializer, align 16206define i64 @test5(i64 %arg) {207; CHECK-LABEL: @test5(208; CHECK-NEXT: bb:209; CHECK-NEXT: [[TMP:%.*]] = alloca i64, align 8210; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[ARG:%.*]], 0211; CHECK-NEXT: br i1 [[TMP1]], label [[BB28:%.*]], label [[BB2:%.*]]212; CHECK: bb2:213; CHECK-NEXT: br label [[BB7:%.*]]214; CHECK: bb4:215; CHECK-NEXT: br label [[BB5:%.*]]216; CHECK: bb5:217; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP9:%.*]], 0218; CHECK-NEXT: br i1 [[TMP6]], label [[BB27:%.*]], label [[BB7]]219; CHECK: bb7:220; CHECK-NEXT: [[TMP8:%.*]] = phi i64 [ [[ARG]], [[BB2]] ], [ [[TMP9]], [[BB5]] ]221; CHECK-NEXT: [[TMP9]] = add nsw i64 [[TMP8]], -1222; CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr @global, align 16223; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr @global.1, align 16224; CHECK-NEXT: [[TMP12:%.*]] = mul nsw i64 [[TMP11]], [[TMP10]]225; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[TMP12]], 0226; CHECK-NEXT: br i1 [[TMP13]], label [[BB5]], label [[BB14:%.*]]227; CHECK: bb14:228; CHECK-NEXT: br label [[BB15:%.*]]229; CHECK: bb15:230; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i64 [ [[TMP12]], [[BB14]] ], [ [[TMP25:%.*]], [[BB15]] ]231; CHECK-NEXT: [[TMP16:%.*]] = phi i64 [ [[TMP24:%.*]], [[BB15]] ], [ [[TMP11]], [[BB14]] ]232; CHECK-NEXT: [[TMP17:%.*]] = phi i64 [ [[TMP22:%.*]], [[BB15]] ], [ [[TMP10]], [[BB14]] ]233; CHECK-NEXT: [[TMP18:%.*]] = phi i64 [ [[TMP20:%.*]], [[BB15]] ], [ 0, [[BB14]] ]234; CHECK-NEXT: store i64 [[PHIOFOPS]], ptr [[TMP]], align 8235; CHECK-NEXT: [[TMP20]] = add nuw nsw i64 [[TMP18]], 1236; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds [100 x i64], ptr @global, i64 0, i64 [[TMP20]]237; CHECK-NEXT: [[TMP22]] = load i64, ptr [[TMP21]], align 8238; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds [100 x i64], ptr @global.1, i64 0, i64 [[TMP20]]239; CHECK-NEXT: [[TMP24]] = load i64, ptr [[TMP23]], align 8240; CHECK-NEXT: [[TMP25]] = mul nsw i64 [[TMP24]], [[TMP22]]241; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i64 [[TMP20]], [[TMP25]]242; CHECK-NEXT: br i1 [[TMP26]], label [[BB4:%.*]], label [[BB15]]243; CHECK: bb27:244; CHECK-NEXT: br label [[BB28]]245; CHECK: bb28:246; CHECK-NEXT: ret i64 0247;248bb:249 %tmp = alloca i64, align 8250 %tmp1 = icmp eq i64 %arg, 0251 br i1 %tmp1, label %bb28, label %bb2252 253bb2: ; preds = %bb254 br label %bb7255 256bb4: ; preds = %bb15257 br label %bb5258 259bb5: ; preds = %bb7, %bb4260 %tmp6 = icmp eq i64 %tmp9, 0261 br i1 %tmp6, label %bb27, label %bb7262 263bb7: ; preds = %bb5, %bb2264 %tmp8 = phi i64 [ %arg, %bb2 ], [ %tmp9, %bb5 ]265 %tmp9 = add nsw i64 %tmp8, -1266 %tmp10 = load i64, ptr @global, align 16267 %tmp11 = load i64, ptr @global.1, align 16268 %tmp12 = mul nsw i64 %tmp11, %tmp10269 %tmp13 = icmp eq i64 %tmp12, 0270 br i1 %tmp13, label %bb5, label %bb14271 272bb14: ; preds = %bb7273 br label %bb15274 275bb15: ; preds = %bb15, %bb14276 %tmp16 = phi i64 [ %tmp24, %bb15 ], [ %tmp11, %bb14 ]277 %tmp17 = phi i64 [ %tmp22, %bb15 ], [ %tmp10, %bb14 ]278 %tmp18 = phi i64 [ %tmp20, %bb15 ], [ 0, %bb14 ]279;; This multiply is an op of phis which is really equivalent to phi(tmp25, tmp12)280 %tmp19 = mul nsw i64 %tmp16, %tmp17281 store i64 %tmp19, ptr %tmp, align 8282 %tmp20 = add nuw nsw i64 %tmp18, 1283 %tmp21 = getelementptr inbounds [100 x i64], ptr @global, i64 0, i64 %tmp20284 %tmp22 = load i64, ptr %tmp21, align 8285 %tmp23 = getelementptr inbounds [100 x i64], ptr @global.1, i64 0, i64 %tmp20286 %tmp24 = load i64, ptr %tmp23, align 8287 %tmp25 = mul nsw i64 %tmp24, %tmp22288 %tmp26 = icmp eq i64 %tmp20, %tmp25289 br i1 %tmp26, label %bb4, label %bb15290 291bb27: ; preds = %bb5292 br label %bb28293 294bb28: ; preds = %bb27, %bb295 ret i64 0296}297 298;; These icmps are all equivalent to phis of constants299define i8 @test6(ptr %addr) {300; CHECK-LABEL: @test6(301; CHECK-NEXT: entry-block:302; CHECK-NEXT: br label [[MAIN_LOOP:%.*]]303; CHECK: main-loop:304; CHECK-NEXT: [[PHIOFOPS1:%.*]] = phi i1 [ true, [[ENTRY_BLOCK:%.*]] ], [ false, [[CORE:%.*]] ]305; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i1 [ false, [[ENTRY_BLOCK]] ], [ true, [[CORE]] ]306; CHECK-NEXT: [[PHI:%.*]] = phi i8 [ 0, [[ENTRY_BLOCK]] ], [ 1, [[CORE]] ]307; CHECK-NEXT: store volatile i8 0, ptr [[ADDR:%.*]], align 1308; CHECK-NEXT: br i1 [[PHIOFOPS1]], label [[BUSY_WAIT_PHI_0:%.*]], label [[EXIT:%.*]]309; CHECK: busy-wait-phi-0:310; CHECK-NEXT: [[LOAD:%.*]] = load volatile i8, ptr [[ADDR]], align 1311; CHECK-NEXT: [[ICMP:%.*]] = icmp eq i8 [[LOAD]], 0312; CHECK-NEXT: br i1 [[ICMP]], label [[BUSY_WAIT_PHI_0]], label [[CORE]]313; CHECK: core:314; CHECK-NEXT: br i1 [[PHIOFOPS]], label [[TRAP:%.*]], label [[MAIN_LOOP]]315; CHECK: trap:316; CHECK-NEXT: ret i8 1317; CHECK: exit:318; CHECK-NEXT: ret i8 0319;320entry-block:321 br label %main-loop322 323main-loop:324 %phi = phi i8 [ 0, %entry-block ], [ 1, %core ]325 %switch_0 = icmp eq i8 %phi, 0326 store volatile i8 0, ptr %addr327 br i1 %switch_0, label %busy-wait-phi-0, label %exit328 329busy-wait-phi-0:330 %load = load volatile i8, ptr %addr331 %icmp = icmp eq i8 %load, 0332 br i1 %icmp, label %busy-wait-phi-0, label %core333 334core:335 %switch_1 = icmp eq i8 %phi, 1336 br i1 %switch_1, label %trap, label %main-loop337 338trap:339 ret i8 1340 341exit:342 ret i8 0343}344 345; Test that we don't infinite loop simplifying346; an undefined value that can go both ways.347define void @test7() {348; CHECK-LABEL: @test7(349; CHECK-NEXT: bb:350; CHECK-NEXT: br label [[BB1:%.*]]351; CHECK: bb1:352; CHECK-NEXT: br label [[BB1]]353;354bb:355 br label %bb1356 357bb1: ; preds = %bb1, %bb358 %tmp = phi i32 [ undef, %bb ], [ %tmp3, %bb1 ]359 %tmp2 = icmp eq i32 %tmp, 0360 %tmp3 = select i1 %tmp2, i32 1, i32 %tmp361 br label %bb1362}363 364 365 366; Test that we get a consistent answer about what the367; value of this undefined select is.368define void @test8() {369; CHECK-LABEL: @test8(370; CHECK-NEXT: bb:371; CHECK-NEXT: br label [[BB1:%.*]]372; CHECK: bb1:373; CHECK-NEXT: br label [[BB1]]374;375bb:376 %tmp = select i1 undef, i8 0, i8 1377 br label %bb1378 379bb1: ; preds = %bb1, %bb380 %tmp2 = phi i8 [ %tmp4, %bb1 ], [ %tmp, %bb ]381 %tmp3 = icmp eq i8 %tmp2, 0382 %tmp4 = select i1 %tmp3, i8 1, i8 %tmp2383 br label %bb1384}385 386 387;; Make sure we handle the case where we later come up with an expression that we need388;; for a phi of ops.389define void @test9(i1 %arg) {390; CHECK-LABEL: @test9(391; CHECK-NEXT: bb:392; CHECK-NEXT: br label [[BB1:%.*]]393; CHECK: bb1:394; CHECK-NEXT: br i1 [[ARG:%.*]], label [[BB1]], label [[BB2:%.*]]395; CHECK: bb2:396; CHECK-NEXT: br label [[BB6:%.*]]397; CHECK: bb6:398; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i32 [ -13, [[BB2]] ], [ [[TMP11:%.*]], [[BB6]] ]399; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ 1, [[BB2]] ], [ [[TMP8:%.*]], [[BB6]] ]400; CHECK-NEXT: [[TMP8]] = add nuw nsw i32 [[TMP7]], 1401; CHECK-NEXT: [[TMP11]] = add i32 -14, [[TMP8]]402; CHECK-NEXT: br label [[BB6]]403;404bb:405 br label %bb1406 407bb1: ; preds = %bb1, %bb408 br i1 %arg, label %bb1, label %bb2409 410bb2: ; preds = %bb1411 %tmp = select i1 true, i32 -14, i32 -10412 %tmp3 = add i32 %tmp, 0413 %tmp4 = select i1 true, i32 -14, i32 -10414 %tmp5 = add i32 %tmp4, 0415 br label %bb6416 417bb6: ; preds = %bb6, %bb2418 %tmp7 = phi i32 [ 1, %bb2 ], [ %tmp13, %bb6 ]419 %tmp8 = add nuw nsw i32 %tmp7, 1420 %tmp9 = add i32 %tmp3, %tmp7421 %tmp10 = select i1 false, i32 undef, i32 %tmp9422 %tmp11 = add i32 %tmp5, %tmp8423 %tmp12 = select i1 undef, i32 undef, i32 %tmp11424 %tmp13 = add nuw nsw i32 %tmp7, 1425 br label %bb6426}427 428;; Ensure that we revisit predicateinfo operands at the right points in time.429define void @test10(i1 %arg) {430; CHECK-LABEL: @test10(431; CHECK-NEXT: b:432; CHECK-NEXT: br label [[G:%.*]]433; CHECK: g:434; CHECK-NEXT: [[N:%.*]] = phi ptr [ [[H:%.*]], [[I:%.*]] ], [ null, [[B:%.*]] ]435; CHECK-NEXT: [[H]] = getelementptr i32, ptr [[N]], i64 1436; CHECK-NEXT: [[J:%.*]] = icmp eq ptr [[H]], inttoptr (i64 32 to ptr)437; CHECK-NEXT: br i1 [[J]], label [[C:%.*]], label [[I]]438; CHECK: i:439; CHECK-NEXT: br i1 [[ARG:%.*]], label [[K:%.*]], label [[G]]440; CHECK: k:441; CHECK-NEXT: br i1 false, label [[C]], label [[O:%.*]]442; CHECK: o:443; CHECK-NEXT: br label [[C]]444; CHECK: c:445; CHECK-NEXT: ret void446;447b:448 %m = getelementptr i32, ptr null, i64 8449 br label %g450 451g: ; preds = %i, %b452 %n = phi ptr [ %h, %i ], [ null, %b ]453 %h = getelementptr i32, ptr %n, i64 1454 %j = icmp eq ptr %h, %m455 br i1 %j, label %c, label %i456 457i: ; preds = %g458 br i1 %arg, label %k, label %g459 460k: ; preds = %i461 %l = icmp eq ptr %n, %m462 br i1 %l, label %c, label %o463 464o: ; preds = %k465 br label %c466 467c: ; preds = %o, %k, %g468 %0 = phi ptr [ undef, %o ], [ %m, %k ], [ %m, %g ]469 ret void470}471 472;; Ensure we handle VariableExpression properly.473define void @test11(i1 %arg) {474; CHECK-LABEL: @test11(475; CHECK-NEXT: bb:476; CHECK-NEXT: br i1 [[ARG:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]477; CHECK: bb1:478; CHECK-NEXT: br label [[BB2]]479; CHECK: bb2:480; CHECK-NEXT: [[TMP:%.*]] = phi i1 [ false, [[BB1]] ], [ true, [[BB:%.*]] ]481; CHECK-NEXT: [[TMP3:%.*]] = call ptr @wombat()482; CHECK-NEXT: [[TMP4:%.*]] = icmp ne ptr [[TMP3]], null483; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP]], [[TMP4]]484; CHECK-NEXT: br i1 [[TMP5]], label [[BB6:%.*]], label [[BB7:%.*]]485; CHECK: bb6:486; CHECK-NEXT: unreachable487; CHECK: bb7:488; CHECK-NEXT: ret void489;490bb:491 br i1 %arg, label %bb1, label %bb2492 493bb1: ; preds = %bb494 br label %bb2495 496bb2: ; preds = %bb1, %bb497 %tmp = phi i1 [ false, %bb1 ], [ true, %bb ]498 %tmp3 = call ptr @wombat()499 %tmp4 = icmp ne ptr %tmp3, null500 %tmp5 = and i1 %tmp, %tmp4501 br i1 %tmp5, label %bb6, label %bb7502 503bb6: ; preds = %bb2504 unreachable505 506bb7: ; preds = %bb2507 ret void508}509 510declare ptr @wombat()511 512;; Ensure that when reachability affects a phi of ops, we recompute513;; it. Here, the phi node is marked for recomputation when bb7->bb3514;; becomes live, but the value does not change. if we do not directly515;; recompute the phi of ops instruction (tmp5), the value number will516;; change in the verifier, as it goes from a constant value to a517;; phi of [true, false]518 519define void @test12(ptr %p) {520; CHECK-LABEL: @test12(521; CHECK-NEXT: bb:522; CHECK-NEXT: [[TMP:%.*]] = load i32, ptr [[P:%.*]], align 4523; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP]], 0524; CHECK-NEXT: br i1 [[TMP1]], label [[BB2:%.*]], label [[BB8:%.*]]525; CHECK: bb2:526; CHECK-NEXT: br label [[BB3:%.*]]527; CHECK: bb3:528; CHECK-NEXT: br i1 true, label [[BB6:%.*]], label [[BB7:%.*]]529; CHECK: bb6:530; CHECK-NEXT: br label [[BB7]]531; CHECK: bb7:532; CHECK-NEXT: br label [[BB3]]533; CHECK: bb8:534; CHECK-NEXT: ret void535;536bb:537 %tmp = load i32, ptr %p538 %tmp1 = icmp sgt i32 %tmp, 0539 br i1 %tmp1, label %bb2, label %bb8540 541bb2: ; preds = %bb542 br label %bb3543 544bb3: ; preds = %bb7, %bb2545 %tmp4 = phi i32 [ %tmp, %bb2 ], [ poison, %bb7 ]546 %tmp5 = icmp sgt i32 %tmp4, 0547 br i1 %tmp5, label %bb6, label %bb7548 549bb6: ; preds = %bb3550 br label %bb7551 552bb7: ; preds = %bb6, %bb3553 br label %bb3554 555bb8: ; preds = %bb556 ret void557}558 559;; Make sure we reprocess phi of ops involving loads when loads change class.560;; This is PR 34473561define void @test13() {562; CHECK-LABEL: @test13(563; CHECK-NEXT: bb:564; CHECK-NEXT: br label [[BB1:%.*]]565; CHECK: bb1:566; CHECK-NEXT: [[TMP:%.*]] = load i8, ptr null, align 1567; CHECK-NEXT: br label [[BB3:%.*]]568; CHECK: bb3:569; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i8 [ [[TMP]], [[BB1]] ], [ [[TMP10:%.*]], [[BB3]] ]570; CHECK-NEXT: [[TMP4:%.*]] = phi ptr [ null, [[BB1]] ], [ [[TMP6:%.*]], [[BB3]] ]571; CHECK-NEXT: [[TMP5:%.*]] = phi i32 [ undef, [[BB1]] ], [ [[TMP9:%.*]], [[BB3]] ]572; CHECK-NEXT: [[TMP6]] = getelementptr i8, ptr [[TMP4]], i64 1573; CHECK-NEXT: [[TMP8:%.*]] = sext i8 [[PHIOFOPS]] to i32574; CHECK-NEXT: [[TMP9]] = mul i32 [[TMP5]], [[TMP8]]575; CHECK-NEXT: [[TMP10]] = load i8, ptr [[TMP6]], align 1576; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i8 [[TMP10]], 0577; CHECK-NEXT: br i1 [[TMP11]], label [[BB12:%.*]], label [[BB3]]578; CHECK: bb12:579; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP9]], 0580; CHECK-NEXT: br i1 [[TMP14]], label [[BB1]], label [[BB15:%.*]]581; CHECK: bb15:582; CHECK-NEXT: call void (...) @bar()583; CHECK-NEXT: br label [[BB1]]584;585bb:586 br label %bb1587 588bb1: ; preds = %bb15, %bb12, %bb589 %tmp = load i8, ptr null590 %tmp2 = icmp eq i8 %tmp, 8591 br label %bb3592 593bb3: ; preds = %bb3, %bb1594 %tmp4 = phi ptr [ null, %bb1 ], [ %tmp6, %bb3 ]595 %tmp5 = phi i32 [ undef, %bb1 ], [ %tmp9, %bb3 ]596 %tmp6 = getelementptr i8, ptr %tmp4, i64 1597 %tmp7 = load i8, ptr %tmp4598 %tmp8 = sext i8 %tmp7 to i32599 %tmp9 = mul i32 %tmp5, %tmp8600 %tmp10 = load i8, ptr %tmp6601 %tmp11 = icmp eq i8 %tmp10, 0602 br i1 %tmp11, label %bb12, label %bb3603 604bb12: ; preds = %bb3605 %tmp13 = phi i32 [ %tmp9, %bb3 ]606 %tmp14 = icmp eq i32 %tmp13, 0607 br i1 %tmp14, label %bb1, label %bb15608 609bb15: ; preds = %bb12610 call void (...) @bar()611 br label %bb1612}613 614declare void @bar(...)615 616