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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 62;; This test is really dependent on propagating a lot of memory info around, but in the end, not3;; screwing up a single add.4; RUN: opt < %s -passes=newgvn -S | FileCheck %s5target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"6 7%struct.Letter = type { i32, i32, i32, i32 }8 9@alPhrase = external local_unnamed_addr global [26 x %struct.Letter], align 1610@aqMainMask = external local_unnamed_addr global [2 x i64], align 1611@aqMainSign = external local_unnamed_addr global [2 x i64], align 1612@cchPhraseLength = external local_unnamed_addr global i32, align 413@auGlobalFrequency = external local_unnamed_addr global [26 x i32], align 1614@.str.7 = external hidden unnamed_addr constant [28 x i8], align 115 16; Function Attrs: nounwind uwtable17declare void @Fatal(ptr, i32) local_unnamed_addr #018 19; Function Attrs: nounwind readnone20declare ptr @__ctype_b_loc() local_unnamed_addr #121 22; Function Attrs: nounwind uwtable23define void @BuildMask(ptr nocapture readonly) local_unnamed_addr #0 {24; CHECK-LABEL: define void @BuildMask(25; CHECK-SAME: ptr readonly captures(none) [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {26; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr align 16 @alPhrase, i8 0, i64 416, i1 false)27; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr align 16 @aqMainMask, i8 0, i64 16, i1 false)28; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr align 16 @aqMainSign, i8 0, i64 16, i1 false)29; CHECK-NEXT: br label %[[DOTSINK_SPLIT:.*]]30; CHECK: [[_SINK_SPLIT:.*:]]31; CHECK-NEXT: [[DOT0:%.*]] = phi ptr [ [[TMP0]], [[TMP1:%.*]] ], [ [[TMP3:%.*]], %[[TMP14:.*]] ]32; CHECK-NEXT: [[DOTSINK:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP22:%.*]], %[[TMP14]] ]33; CHECK-NEXT: store i32 [[DOTSINK]], ptr @cchPhraseLength, align 4, !tbaa [[INT_TBAA1:![0-9]+]]34; CHECK-NEXT: br label %[[BB2:.*]]35; CHECK: [[BB2]]:36; CHECK-NEXT: [[DOT1:%.*]] = phi ptr [ [[DOT0]], %[[DOTSINK_SPLIT]] ], [ [[TMP3]], %[[TMP6:.*]] ]37; CHECK-NEXT: [[TMP3]] = getelementptr inbounds i8, ptr [[DOT1]], i64 138; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOT1]], align 1, !tbaa [[CHAR_TBAA5:![0-9]+]]39; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i8 [[TMP4]], 040; CHECK-NEXT: br i1 [[TMP5]], label %[[DOTPREHEADER_PREHEADER:.*]], label %[[TMP6]]41; CHECK: [[_PREHEADER_PREHEADER:.*:]]42; CHECK-NEXT: br [[DOTPREHEADER:label %.*]]43; CHECK: [[TMP6]]:44; CHECK-NEXT: [[TMP7:%.*]] = tail call ptr @__ctype_b_loc() #[[ATTR4:[0-9]+]]45; CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP7]], align 8, !tbaa [[ANYPTR_TBAA6:![0-9]+]]46; CHECK-NEXT: [[TMP9:%.*]] = sext i8 [[TMP4]] to i6447; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i16, ptr [[TMP8]], i64 [[TMP9]]48; CHECK-NEXT: [[TMP11:%.*]] = load i16, ptr [[TMP10]], align 2, !tbaa [[SHORT_TBAA8:![0-9]+]]49; CHECK-NEXT: [[TMP12:%.*]] = and i16 [[TMP11]], 102450; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i16 [[TMP12]], 051; CHECK-NEXT: br i1 [[TMP13]], label %[[BB2]], label %[[TMP14]]52; CHECK: [[TMP14]]:53; CHECK-NEXT: [[TMP15:%.*]] = sext i8 [[TMP4]] to i3254; CHECK-NEXT: [[TMP16:%.*]] = tail call i32 @tolower(i32 [[TMP15]]) #[[ATTR5:[0-9]+]]55; CHECK-NEXT: [[TMP17:%.*]] = add nsw i32 [[TMP16]], -9756; CHECK-NEXT: [[TMP18:%.*]] = sext i32 [[TMP17]] to i6457; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 [[TMP18]], i32 058; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 16, !tbaa [[INT_TBAA10:![0-9]+]]59; CHECK-NEXT: [[TMP21:%.*]] = add i32 [[TMP20]], 160; CHECK-NEXT: store i32 [[TMP21]], ptr [[TMP19]], align 16, !tbaa [[INT_TBAA10]]61; CHECK-NEXT: [[TMP22]] = add nsw i32 [[DOTSINK]], 162; CHECK-NEXT: br label %[[DOTSINK_SPLIT]]63; CHECK: [[_PREHEADER:.*:]]64; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[DOTPREHEADER_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[TMP57:.*]] ]65; CHECK-NEXT: [[DOT04961:%.*]] = phi i32 [ [[DOT2:%.*]], %[[TMP57]] ], [ 0, %[[DOTPREHEADER_PREHEADER]] ]66; CHECK-NEXT: [[DOT05160:%.*]] = phi i32 [ [[DOT253:%.*]], %[[TMP57]] ], [ 0, %[[DOTPREHEADER_PREHEADER]] ]67; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 [[INDVARS_IV]], i32 068; CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 16, !tbaa [[INT_TBAA10]]69; CHECK-NEXT: [[TMP25:%.*]] = icmp eq i32 [[TMP24]], 070; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds [26 x i32], ptr @auGlobalFrequency, i64 0, i64 [[INDVARS_IV]]71; CHECK-NEXT: br i1 [[TMP25]], label %[[TMP27:.*]], label %[[TMP28:.*]]72; CHECK: [[TMP27]]:73; CHECK-NEXT: store i32 -1, ptr [[TMP26]], align 4, !tbaa [[INT_TBAA1]]74; CHECK-NEXT: br label %[[TMP57]]75; CHECK: [[TMP28]]:76; CHECK-NEXT: store i32 0, ptr [[TMP26]], align 4, !tbaa [[INT_TBAA1]]77; CHECK-NEXT: [[TMP29:%.*]] = zext i32 [[TMP24]] to i6478; CHECK-NEXT: br i1 false, label %[[DOT_CRIT_EDGE:.*]], label %[[DOTLR_PH_PREHEADER:.*]]79; CHECK: [[_LR_PH_PREHEADER:.*:]]80; CHECK-NEXT: br label %[[DOTLR_PH:.*]]81; CHECK: [[_LR_PH:.*:]]82; CHECK-NEXT: [[DOT04658:%.*]] = phi i64 [ [[TMP31:%.*]], %[[DOTLR_PH]] ], [ 1, %[[DOTLR_PH_PREHEADER]] ]83; CHECK-NEXT: [[DOT04857:%.*]] = phi i32 [ [[TMP30:%.*]], %[[DOTLR_PH]] ], [ 1, %[[DOTLR_PH_PREHEADER]] ]84; CHECK-NEXT: [[TMP30]] = add nuw nsw i32 [[DOT04857]], 185; CHECK-NEXT: [[TMP31]] = shl i64 [[DOT04658]], 186; CHECK-NEXT: [[TMP32:%.*]] = icmp ult i64 [[TMP29]], [[TMP31]]87; CHECK-NEXT: br i1 [[TMP32]], label %[[DOT_CRIT_EDGE_LOOPEXIT:.*]], label %[[DOTLR_PH]]88; CHECK: [[__CRIT_EDGE_LOOPEXIT:.*:]]89; CHECK-NEXT: br label %[[DOT_CRIT_EDGE]]90; CHECK: [[__CRIT_EDGE:.*:]]91; CHECK-NEXT: [[DOT048_LCSSA:%.*]] = phi i32 [ poison, %[[TMP28]] ], [ [[TMP30]], %[[DOT_CRIT_EDGE_LOOPEXIT]] ]92; CHECK-NEXT: [[DOT046_LCSSA:%.*]] = phi i64 [ poison, %[[TMP28]] ], [ [[TMP31]], %[[DOT_CRIT_EDGE_LOOPEXIT]] ]93; CHECK-NEXT: [[TMP33:%.*]] = add nsw i32 [[DOT048_LCSSA]], [[DOT04961]]94; CHECK-NEXT: [[TMP34:%.*]] = icmp ugt i32 [[TMP33]], 6495; CHECK-NEXT: br i1 [[TMP34]], label %[[TMP35:.*]], label %[[TMP39:.*]]96; CHECK: [[TMP35]]:97; CHECK-NEXT: [[TMP36:%.*]] = add i32 [[DOT05160]], 198; CHECK-NEXT: [[TMP37:%.*]] = icmp ugt i32 [[TMP36]], 199; CHECK-NEXT: br i1 [[TMP37]], label %[[TMP38:.*]], label %[[TMP39]]100; CHECK: [[TMP38]]:101; CHECK-NEXT: tail call void @Fatal(ptr @.str.7, i32 0)102; CHECK-NEXT: br label %[[TMP39]]103; CHECK: [[TMP39]]:104; CHECK-NEXT: [[DOT152:%.*]] = phi i32 [ [[DOT05160]], %[[DOT_CRIT_EDGE]] ], [ [[TMP36]], %[[TMP38]] ], [ [[TMP36]], %[[TMP35]] ]105; CHECK-NEXT: [[DOT150:%.*]] = phi i32 [ [[DOT04961]], %[[DOT_CRIT_EDGE]] ], [ 0, %[[TMP38]] ], [ 0, %[[TMP35]] ]106; CHECK-NEXT: [[TMP40:%.*]] = add i64 [[DOT046_LCSSA]], 4294967295107; CHECK-NEXT: [[TMP41:%.*]] = trunc i64 [[TMP40]] to i32108; CHECK-NEXT: [[TMP42:%.*]] = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 [[INDVARS_IV]], i32 2109; CHECK-NEXT: store i32 [[TMP41]], ptr [[TMP42]], align 8, !tbaa [[INT_TBAA12:![0-9]+]]110; CHECK-NEXT: [[TMP43:%.*]] = zext i32 [[DOT150]] to i64111; CHECK-NEXT: [[DOT046_:%.*]] = shl i64 [[DOT046_LCSSA]], [[TMP43]]112; CHECK-NEXT: [[TMP44:%.*]] = zext i32 [[DOT152]] to i64113; CHECK-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i64], ptr @aqMainSign, i64 0, i64 [[TMP44]]114; CHECK-NEXT: [[TMP46:%.*]] = load i64, ptr [[TMP45]], align 8, !tbaa [[LONG_TBAA13:![0-9]+]]115; CHECK-NEXT: [[TMP47:%.*]] = or i64 [[TMP46]], [[DOT046_]]116; CHECK-NEXT: store i64 [[TMP47]], ptr [[TMP45]], align 8, !tbaa [[LONG_TBAA13]]117; CHECK-NEXT: [[TMP48:%.*]] = load i32, ptr [[TMP23]], align 16, !tbaa [[INT_TBAA10]]118; CHECK-NEXT: [[TMP49:%.*]] = zext i32 [[TMP48]] to i64119; CHECK-NEXT: [[TMP50:%.*]] = shl i64 [[TMP49]], [[TMP43]]120; CHECK-NEXT: [[TMP51:%.*]] = getelementptr inbounds [2 x i64], ptr @aqMainMask, i64 0, i64 [[TMP44]]121; CHECK-NEXT: [[TMP52:%.*]] = load i64, ptr [[TMP51]], align 8, !tbaa [[LONG_TBAA13]]122; CHECK-NEXT: [[TMP53:%.*]] = or i64 [[TMP50]], [[TMP52]]123; CHECK-NEXT: store i64 [[TMP53]], ptr [[TMP51]], align 8, !tbaa [[LONG_TBAA13]]124; CHECK-NEXT: [[TMP54:%.*]] = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 [[INDVARS_IV]], i32 1125; CHECK-NEXT: store i32 [[DOT150]], ptr [[TMP54]], align 4, !tbaa [[INT_TBAA15:![0-9]+]]126; CHECK-NEXT: [[TMP55:%.*]] = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 [[INDVARS_IV]], i32 3127; CHECK-NEXT: store i32 [[DOT152]], ptr [[TMP55]], align 4, !tbaa [[INT_TBAA16:![0-9]+]]128; CHECK-NEXT: [[TMP56:%.*]] = add nsw i32 [[DOT150]], [[DOT048_LCSSA]]129; CHECK-NEXT: br label %[[TMP57]]130; CHECK: [[TMP57]]:131; CHECK-NEXT: [[DOT253]] = phi i32 [ [[DOT05160]], %[[TMP27]] ], [ [[DOT152]], %[[TMP39]] ]132; CHECK-NEXT: [[DOT2]] = phi i32 [ [[DOT04961]], %[[TMP27]] ], [ [[TMP56]], %[[TMP39]] ]133; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1134; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 26135; CHECK-NEXT: br i1 [[EXITCOND]], [[DOTPREHEADER]], label %[[BB58:.*]]136; CHECK: [[BB58]]:137; CHECK-NEXT: ret void138;139 tail call void @llvm.memset.p0.i64(ptr align 16 @alPhrase, i8 0, i64 416, i1 false)140 tail call void @llvm.memset.p0.i64(ptr align 16 @aqMainMask, i8 0, i64 16, i1 false)141 tail call void @llvm.memset.p0.i64(ptr align 16 @aqMainSign, i8 0, i64 16, i1 false)142 br label %.sink.split143 144.sink.split: ; preds = %14, %1145 %.0 = phi ptr [ %0, %1 ], [ %.lcssa67, %14 ]146 %.sink = phi i32 [ 0, %1 ], [ %23, %14 ]147 store i32 %.sink, ptr @cchPhraseLength, align 4, !tbaa !1148 br label %2149 150; <label>:2: ; preds = %6, %.sink.split151 %.1 = phi ptr [ %.0, %.sink.split ], [ %3, %6 ]152 %3 = getelementptr inbounds i8, ptr %.1, i64 1153 %4 = load i8, ptr %.1, align 1, !tbaa !5154 %5 = icmp eq i8 %4, 0155 br i1 %5, label %.preheader.preheader, label %6156 157.preheader.preheader: ; preds = %2158 br label %.preheader159 160; <label>:6: ; preds = %2161 %7 = tail call ptr @__ctype_b_loc() #4162 %8 = load ptr, ptr %7, align 8, !tbaa !6163 %9 = sext i8 %4 to i64164 %10 = getelementptr inbounds i16, ptr %8, i64 %9165 %11 = load i16, ptr %10, align 2, !tbaa !8166 %12 = and i16 %11, 1024167 %13 = icmp eq i16 %12, 0168 br i1 %13, label %2, label %14169 170; <label>:14: ; preds = %6171 %.lcssa67 = phi ptr [ %3, %6 ]172 %.lcssa65 = phi i8 [ %4, %6 ]173 %15 = sext i8 %.lcssa65 to i32174 %16 = tail call i32 @tolower(i32 %15) #5175 %17 = add nsw i32 %16, -97176 %18 = sext i32 %17 to i64177 %19 = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 %18, i32 0178 %20 = load i32, ptr %19, align 16, !tbaa !10179 %21 = add i32 %20, 1180 store i32 %21, ptr %19, align 16, !tbaa !10181 %22 = load i32, ptr @cchPhraseLength, align 4, !tbaa !1182 %23 = add nsw i32 %22, 1183 br label %.sink.split184 185.preheader: ; preds = %58, %.preheader.preheader186 %indvars.iv = phi i64 [ 0, %.preheader.preheader ], [ %indvars.iv.next, %58 ]187 %.04961 = phi i32 [ %.2, %58 ], [ 0, %.preheader.preheader ]188 %.05160 = phi i32 [ %.253, %58 ], [ 0, %.preheader.preheader ]189 %24 = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 %indvars.iv, i32 0190 %25 = load i32, ptr %24, align 16, !tbaa !10191 %26 = icmp eq i32 %25, 0192 %27 = getelementptr inbounds [26 x i32], ptr @auGlobalFrequency, i64 0, i64 %indvars.iv193 br i1 %26, label %28, label %29194 195; <label>:28: ; preds = %.preheader196 store i32 -1, ptr %27, align 4, !tbaa !1197 br label %58198 199; <label>:29: ; preds = %.preheader200 store i32 0, ptr %27, align 4, !tbaa !1201 %30 = zext i32 %25 to i64202 br i1 false, label %._crit_edge, label %.lr.ph.preheader203 204.lr.ph.preheader: ; preds = %29205 br label %.lr.ph206 207.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader208 %.04658 = phi i64 [ %32, %.lr.ph ], [ 1, %.lr.ph.preheader ]209 %.04857 = phi i32 [ %31, %.lr.ph ], [ 1, %.lr.ph.preheader ]210 %31 = add nuw nsw i32 %.04857, 1211 %32 = shl i64 %.04658, 1212 %33 = icmp ult i64 %30, %32213 br i1 %33, label %._crit_edge.loopexit, label %.lr.ph214 215._crit_edge.loopexit: ; preds = %.lr.ph216 %.lcssa63 = phi i32 [ %31, %.lr.ph ]217 %.lcssa = phi i64 [ %32, %.lr.ph ]218 br label %._crit_edge219 220._crit_edge: ; preds = %._crit_edge.loopexit, %29221 %.048.lcssa = phi i32 [ 1, %29 ], [ %.lcssa63, %._crit_edge.loopexit ]222 %.046.lcssa = phi i64 [ 1, %29 ], [ %.lcssa, %._crit_edge.loopexit ]223 %34 = add nsw i32 %.048.lcssa, %.04961224 %35 = icmp ugt i32 %34, 64225 br i1 %35, label %36, label %40226 227; <label>:36: ; preds = %._crit_edge228; This testcase essentially comes down to this little add.229; If we screw up the revisitation of the users of store of %sink above230; we will end up propagating and simplifying this to 1 in the final output231; because we keep an optimistic assumption we should not.232 %37 = add i32 %.05160, 1233 %38 = icmp ugt i32 %37, 1234 br i1 %38, label %39, label %40235 236; <label>:39: ; preds = %36237 tail call void @Fatal(ptr @.str.7, i32 0)238 br label %40239 240; <label>:40: ; preds = %39, %36, %._crit_edge241 %.152 = phi i32 [ %.05160, %._crit_edge ], [ %37, %39 ], [ %37, %36 ]242 %.150 = phi i32 [ %.04961, %._crit_edge ], [ 0, %39 ], [ 0, %36 ]243 %41 = add i64 %.046.lcssa, 4294967295244 %42 = trunc i64 %41 to i32245 %43 = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 %indvars.iv, i32 2246 store i32 %42, ptr %43, align 8, !tbaa !12247 %44 = zext i32 %.150 to i64248 %.046. = shl i64 %.046.lcssa, %44249 %45 = zext i32 %.152 to i64250 %46 = getelementptr inbounds [2 x i64], ptr @aqMainSign, i64 0, i64 %45251 %47 = load i64, ptr %46, align 8, !tbaa !13252 %48 = or i64 %47, %.046.253 store i64 %48, ptr %46, align 8, !tbaa !13254 %49 = load i32, ptr %24, align 16, !tbaa !10255 %50 = zext i32 %49 to i64256 %51 = shl i64 %50, %44257 %52 = getelementptr inbounds [2 x i64], ptr @aqMainMask, i64 0, i64 %45258 %53 = load i64, ptr %52, align 8, !tbaa !13259 %54 = or i64 %51, %53260 store i64 %54, ptr %52, align 8, !tbaa !13261 %55 = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 %indvars.iv, i32 1262 store i32 %.150, ptr %55, align 4, !tbaa !15263 %56 = getelementptr inbounds [26 x %struct.Letter], ptr @alPhrase, i64 0, i64 %indvars.iv, i32 3264 store i32 %.152, ptr %56, align 4, !tbaa !16265 %57 = add nsw i32 %.150, %.048.lcssa266 br label %58267 268; <label>:58: ; preds = %40, %28269 %.253 = phi i32 [ %.05160, %28 ], [ %.152, %40 ]270 %.2 = phi i32 [ %.04961, %28 ], [ %57, %40 ]271 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1272 %exitcond = icmp ne i64 %indvars.iv.next, 26273 br i1 %exitcond, label %.preheader, label %59274 275; <label>:59: ; preds = %58276 ret void277}278 279; Function Attrs: argmemonly nounwind280declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1) #2281 282; Function Attrs: inlinehint nounwind readonly uwtable283declare i32 @tolower(i32) local_unnamed_addr #3284 285attributes #0 = { nounwind uwtable }286attributes #1 = { nounwind readnone }287attributes #2 = { argmemonly nounwind }288attributes #3 = { inlinehint nounwind readonly uwtable }289attributes #4 = { nounwind readnone }290attributes #5 = { nounwind readonly }291 292!llvm.ident = !{!0}293 294!0 = !{!"clang version 4.0.0"}295!1 = !{!2, !2, i64 0}296!2 = !{!"int", !3, i64 0}297!3 = !{!"omnipotent char", !4, i64 0}298!4 = !{!"Simple C/C++ TBAA"}299!5 = !{!3, !3, i64 0}300!6 = !{!7, !7, i64 0}301!7 = !{!"any pointer", !3, i64 0}302!8 = !{!9, !9, i64 0}303!9 = !{!"short", !3, i64 0}304!10 = !{!11, !2, i64 0}305!11 = !{!"", !2, i64 0, !2, i64 4, !2, i64 8, !2, i64 12}306!12 = !{!11, !2, i64 8}307!13 = !{!14, !14, i64 0}308!14 = !{!"long", !3, i64 0}309!15 = !{!11, !2, i64 4}310!16 = !{!11, !2, i64 12}311;.312; CHECK: [[INT_TBAA1]] = !{[[META2:![0-9]+]], [[META2]], i64 0}313; CHECK: [[META2]] = !{!"int", [[META3:![0-9]+]], i64 0}314; CHECK: [[META3]] = !{!"omnipotent char", [[META4:![0-9]+]], i64 0}315; CHECK: [[META4]] = !{!"Simple C/C++ TBAA"}316; CHECK: [[CHAR_TBAA5]] = !{[[META3]], [[META3]], i64 0}317; CHECK: [[ANYPTR_TBAA6]] = !{[[META7:![0-9]+]], [[META7]], i64 0}318; CHECK: [[META7]] = !{!"any pointer", [[META3]], i64 0}319; CHECK: [[SHORT_TBAA8]] = !{[[META9:![0-9]+]], [[META9]], i64 0}320; CHECK: [[META9]] = !{!"short", [[META3]], i64 0}321; CHECK: [[INT_TBAA10]] = !{[[META11:![0-9]+]], [[META2]], i64 0}322; CHECK: [[META11]] = !{!"", [[META2]], i64 0, [[META2]], i64 4, [[META2]], i64 8, [[META2]], i64 12}323; CHECK: [[INT_TBAA12]] = !{[[META11]], [[META2]], i64 8}324; CHECK: [[LONG_TBAA13]] = !{[[META14:![0-9]+]], [[META14]], i64 0}325; CHECK: [[META14]] = !{!"long", [[META3]], i64 0}326; CHECK: [[INT_TBAA15]] = !{[[META11]], [[META2]], i64 4}327; CHECK: [[INT_TBAA16]] = !{[[META11]], [[META2]], i64 12}328;.329