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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=newgvn -S %s | FileCheck %s3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"4declare noalias ptr @_Znam(i64) #15 6define i32 @TestNoAsan() {7; CHECK-LABEL: @TestNoAsan(8; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias ptr @_Znam(i64 2)9; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 110; CHECK-NEXT: store i8 0, ptr [[TMP2]], align 111; CHECK-NEXT: store i8 0, ptr [[TMP1]], align 112; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[TMP1]], align 413; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i16 [[TMP3]], 014; CHECK-NEXT: br i1 [[TMP4]], label [[TMP9:%.*]], label [[TMP5:%.*]]15; CHECK: 5:16; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 217; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[TMP6]], align 218; CHECK-NEXT: [[TMP8:%.*]] = sext i16 [[TMP7]] to i3219; CHECK-NEXT: br label [[TMP9]]20; CHECK: 9:21; CHECK-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 0, [[TMP0:%.*]] ]22; CHECK-NEXT: ret i32 [[TMP10]]23;24 %1 = tail call noalias ptr @_Znam(i64 2)25 %2 = getelementptr inbounds i8, ptr %1, i64 126 store i8 0, ptr %2, align 127 store i8 0, ptr %1, align 128 %3 = load i16, ptr %1, align 429 %4 = icmp eq i16 %3, 030 br i1 %4, label %9, label %531 32; <label>:5 ; preds = %033 %6 = getelementptr inbounds i8, ptr %1, i64 234 %7 = load i16, ptr %6, align 235 %8 = sext i16 %7 to i3236 br label %937 38; <label>:9 ; preds = %0, %539 %10 = phi i32 [ %8, %5 ], [ 0, %0 ]40 ret i32 %1041}42 43define i32 @TestAsan() sanitize_address {44; CHECK-LABEL: @TestAsan(45; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias ptr @_Znam(i64 2)46; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 147; CHECK-NEXT: store i8 0, ptr [[TMP2]], align 148; CHECK-NEXT: store i8 0, ptr [[TMP1]], align 149; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[TMP1]], align 450; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i16 [[TMP3]], 051; CHECK-NEXT: br i1 [[TMP4]], label [[TMP9:%.*]], label [[TMP5:%.*]]52; CHECK: 5:53; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 254; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[TMP6]], align 255; CHECK-NEXT: [[TMP8:%.*]] = sext i16 [[TMP7]] to i3256; CHECK-NEXT: br label [[TMP9]]57; CHECK: 9:58; CHECK-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 0, [[TMP0:%.*]] ]59; CHECK-NEXT: ret i32 [[TMP10]]60;61 %1 = tail call noalias ptr @_Znam(i64 2)62 %2 = getelementptr inbounds i8, ptr %1, i64 163 store i8 0, ptr %2, align 164 store i8 0, ptr %1, align 165 %3 = load i16, ptr %1, align 466 %4 = icmp eq i16 %3, 067 br i1 %4, label %9, label %568 69; <label>:5 ; preds = %070 %6 = getelementptr inbounds i8, ptr %1, i64 271 %7 = load i16, ptr %6, align 272 %8 = sext i16 %7 to i3273 br label %974 75; <label>:9 ; preds = %0, %576 %10 = phi i32 [ %8, %5 ], [ 0, %0 ]77 ret i32 %1078}79 80define i32 @TestHWAsan() sanitize_hwaddress {81; CHECK-LABEL: @TestHWAsan(82; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias ptr @_Znam(i64 2)83; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 184; CHECK-NEXT: store i8 0, ptr [[TMP2]], align 185; CHECK-NEXT: store i8 0, ptr [[TMP1]], align 186; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[TMP1]], align 487; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i16 [[TMP3]], 088; CHECK-NEXT: br i1 [[TMP4]], label [[TMP9:%.*]], label [[TMP5:%.*]]89; CHECK: 5:90; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 291; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[TMP6]], align 292; CHECK-NEXT: [[TMP8:%.*]] = sext i16 [[TMP7]] to i3293; CHECK-NEXT: br label [[TMP9]]94; CHECK: 9:95; CHECK-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 0, [[TMP0:%.*]] ]96; CHECK-NEXT: ret i32 [[TMP10]]97;98 %1 = tail call noalias ptr @_Znam(i64 2)99 %2 = getelementptr inbounds i8, ptr %1, i64 1100 store i8 0, ptr %2, align 1101 store i8 0, ptr %1, align 1102 %3 = load i16, ptr %1, align 4103 %4 = icmp eq i16 %3, 0104 br i1 %4, label %9, label %5105 106; <label>:5 ; preds = %0107 %6 = getelementptr inbounds i8, ptr %1, i64 2108 %7 = load i16, ptr %6, align 2109 %8 = sext i16 %7 to i32110 br label %9111 112; <label>:9 ; preds = %0, %5113 %10 = phi i32 [ %8, %5 ], [ 0, %0 ]114 ret i32 %10115}116