brintos

brintos / llvm-project-archived public Read only

0
0
Text · 4.0 KiB · e1d2708 Raw
132 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=newgvn -enable-store-refinement -S | FileCheck %s3target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"4 5;; Both of these tests are tests of phi nodes that end up all equivalent to each other6;; Without proper leader ordering, we will end up cycling the leader between all of them and never converge.7 8define void @foo(i1 %arg, i1 %arg2) {9; CHECK-LABEL: @foo(10; CHECK-NEXT:  bb:11; CHECK-NEXT:    br label [[BB1:%.*]]12; CHECK:       bb1:13; CHECK-NEXT:    [[TMP:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ 1, [[BB18:%.*]] ]14; CHECK-NEXT:    br label [[BB2:%.*]]15; CHECK:       bb2:16; CHECK-NEXT:    br label [[BB4:%.*]]17; CHECK:       bb4:18; CHECK-NEXT:    br i1 [[ARG:%.*]], label [[BB18]], label [[BB7:%.*]]19; CHECK:       bb7:20; CHECK-NEXT:    br label [[BB9:%.*]]21; CHECK:       bb9:22; CHECK-NEXT:    br i1 [[ARG]], label [[BB2]], label [[BB11:%.*]]23; CHECK:       bb11:24; CHECK-NEXT:    br i1 [[ARG2:%.*]], label [[BB16:%.*]], label [[BB14:%.*]]25; CHECK:       bb14:26; CHECK-NEXT:    br label [[BB4]]27; CHECK:       bb16:28; CHECK-NEXT:    br label [[BB7]]29; CHECK:       bb18:30; CHECK-NEXT:    br label [[BB1]]31;32bb:33  br label %bb134 35bb1:                                              ; preds = %bb18, %bb36  %tmp = phi i32 [ 0, %bb ], [ 1, %bb18 ]37  br label %bb238 39bb2:                                              ; preds = %bb9, %bb140  %tmp3 = phi i32 [ %tmp, %bb1 ], [ %tmp8, %bb9 ]41  br label %bb442 43bb4:                                              ; preds = %bb14, %bb244  %tmp5 = phi i32 [ %tmp3, %bb2 ], [ %tmp15, %bb14 ]45  br i1 %arg, label %bb18, label %bb746 47bb7:                                              ; preds = %bb16, %bb448  %tmp8 = phi i32 [ %tmp17, %bb16 ], [ %tmp5, %bb4 ]49  br label %bb950 51bb9:                                              ; preds = %bb752  br i1 %arg, label %bb2, label %bb1153 54bb11:                                             ; preds = %bb955  br i1 %arg2, label %bb16, label %bb1456 57bb14:                                             ; preds = %bb1158  %tmp15 = phi i32 [ %tmp8, %bb11 ]59  br label %bb460 61bb16:                                             ; preds = %bb1162  %tmp17 = phi i32 [ %tmp8, %bb11 ]63  br label %bb764 65bb18:                                             ; preds = %bb466  br label %bb167}68 69%struct.a = type {}70%struct.b = type {}71 72declare void @c.d.p(i64, ptr)73 74define void @e(i32 %a0, i32 %a1, ptr %p2) {75; CHECK-LABEL: @e(76; CHECK-NEXT:    [[F:%.*]] = alloca i32, align 477; CHECK-NEXT:    store i32 [[A0:%.*]], ptr [[F]], align 4, !g [[META0:![0-9]+]]78; CHECK-NEXT:    br label [[H:%.*]]79; CHECK:       h:80; CHECK-NEXT:    call void @c.d.p(i64 8, ptr undef)81; CHECK-NEXT:    [[I:%.*]] = load i32, ptr [[F]], align 482; CHECK-NEXT:    [[J:%.*]] = load i32, ptr null, align 483; CHECK-NEXT:    [[K:%.*]] = icmp eq i32 [[I]], [[J]]84; CHECK-NEXT:    br i1 [[K]], label [[L:%.*]], label [[Q:%.*]]85; CHECK:       l:86; CHECK-NEXT:    br label [[R:%.*]]87; CHECK:       q:88; CHECK-NEXT:    br label [[R]]89; CHECK:       r:90; CHECK-NEXT:    switch i32 undef, label [[N:%.*]] [91; CHECK-NEXT:      i32 0, label [[S:%.*]]92; CHECK-NEXT:    ]93; CHECK:       s:94; CHECK-NEXT:    store i32 [[A1:%.*]], ptr [[F]], align 4, !g [[META0]]95; CHECK-NEXT:    br label [[H]]96; CHECK:       n:97; CHECK-NEXT:    ret void98;99  %f = alloca i32100  store i32 %a0, ptr %f, !g !0101  br label %h102 103h:                                                ; preds = %s, %0104  call void @c.d.p(i64 8, ptr undef)105  %i = load i32, ptr %f106  %j = load i32, ptr null107  %k = icmp eq i32 %i, %j108  br i1 %k, label %l, label %q109 110l:                                                ; preds = %h111  br label %r112 113q:                                                ; preds = %h114  %m = load ptr, ptr null115  br label %r116 117r:                                                ; preds = %q, %l118  switch i32 undef, label %n [119  i32 0, label %s120  ]121 122s:                                                ; preds = %r123  store i32 %a1, ptr %f, !g !0124  br label %h125 126n:                                                ; preds = %r127  %o = load ptr, ptr %p2128  ret void129}130 131!0 = !{}132