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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 62; RUN: opt -aa-pipeline=basic-aa -passes=newgvn -S %s | FileCheck %s3; Verify that we don't accidentally delete intrinsics that aren't SSA copies4%DS_struct = type { [32 x ptr], i8, [32 x i16] }5%MNR_struct = type { i64, i64, ptr }6 7declare i64 @llvm.x86.bmi.bextr.64(i64, i64) #38 9define %MNR_struct @f000316011717_2(ptr %pDS, ptr %pCG) #2 {10; CHECK-LABEL: define %MNR_struct @f000316011717_2(11; CHECK-SAME: ptr [[PDS:%.*]], ptr [[PCG:%.*]]) #[[ATTR1:[0-9]+]] {12; CHECK-NEXT: [[ENTRY:.*:]]13; CHECK-NEXT: [[RESTART:%.*]] = alloca [[MNR_STRUCT:%.*]], align 814; CHECK-NEXT: [[PCARRY:%.*]] = getelementptr [[DS_STRUCT:%.*]], ptr [[PDS]], i32 0, i32 115; CHECK-NEXT: [[BASE:%.*]] = load ptr, ptr [[PDS]], align 8, !tbaa [[BREG_TBAA14:![0-9]+]]16; CHECK-NEXT: [[ABSADDR:%.*]] = getelementptr i64, ptr [[BASE]], i64 917; CHECK-NEXT: [[EXTARGET:%.*]] = load i64, ptr [[ABSADDR]], align 8, !tbaa [[MEM_TBAA4:![0-9]+]]18; CHECK-NEXT: [[TEMPLATE:%.*]] = icmp eq i64 [[EXTARGET]], 859398741219; CHECK-NEXT: br i1 [[TEMPLATE]], label %"BB3.000316011731#1", label %[[BB2_000316011731_5:.*]]20; CHECK: "BB3.000316011731#1":21; CHECK-NEXT: [[PBASE8:%.*]] = getelementptr [32 x ptr], ptr [[PDS]], i64 0, i64 2922; CHECK-NEXT: [[BASE9:%.*]] = load ptr, ptr [[PBASE8]], align 8, !tbaa [[BREG_TBAA14]]23; CHECK-NEXT: [[ABSADDR1:%.*]] = getelementptr i64, ptr [[BASE9]], i64 724; CHECK-NEXT: [[RMEM:%.*]] = load i64, ptr [[ABSADDR1]], align 8, !tbaa [[MEM_TBAA4]]25; CHECK-NEXT: [[PWT:%.*]] = getelementptr [[DS_STRUCT]], ptr [[PDS]], i32 0, i32 226; CHECK-NEXT: [[PWTE:%.*]] = getelementptr [32 x i16], ptr [[PWT]], i64 0, i64 859398741227; CHECK-NEXT: [[SHIFTS:%.*]] = load i16, ptr [[PWTE]], align 2, !tbaa [[CONST_TBAA18:![0-9]+]], !invariant.load [[META20:![0-9]+]]28; CHECK-NEXT: [[SLOWJ:%.*]] = icmp eq i16 [[SHIFTS]], 029; CHECK-NEXT: br i1 [[SLOWJ]], label %[[BB2_000316011731_5]], label %"BB3.000316011731#1.1"30; CHECK: [[BB2_000316011731_5]]:31; CHECK-NEXT: [[EXTARGET1:%.*]] = and i64 [[EXTARGET]], 13743895347132; CHECK-NEXT: switch i64 [[EXTARGET1]], label %[[EXIT:.*]] [33; CHECK-NEXT: ]34; CHECK: "BB3.000316011731#1.1":35; CHECK-NEXT: [[SHIFTS1:%.*]] = zext i16 [[SHIFTS]] to i6436; CHECK-NEXT: [[VAL:%.*]] = call i64 @llvm.x86.bmi.bextr.64(i64 [[RMEM]], i64 [[SHIFTS1]])37; CHECK-NEXT: [[PREG:%.*]] = getelementptr [64 x i64], ptr [[PCG]], i64 0, i64 1238; CHECK-NEXT: store i64 [[VAL]], ptr [[PREG]], align 32, !tbaa [[A0_TBAA10:![0-9]+]]39; CHECK-NEXT: [[PREG2:%.*]] = getelementptr [64 x i64], ptr [[PCG]], i64 0, i64 1440; CHECK-NEXT: [[REG:%.*]] = load i64, ptr [[PREG2]], align 16, !tbaa [[A2_TBAA12:![0-9]+]]41; CHECK-NEXT: [[BASE2:%.*]] = load ptr, ptr [[PBASE8]], align 8, !tbaa [[BREG_TBAA14]]42; CHECK-NEXT: [[ABSADDR2:%.*]] = getelementptr i64, ptr [[BASE2]], i64 [[REG]]43; CHECK-NEXT: [[RMEM2:%.*]] = load i64, ptr [[ABSADDR2]], align 8, !tbaa [[MEM_TBAA4]]44; CHECK-NEXT: [[PREG7:%.*]] = getelementptr [64 x i64], ptr [[PCG]], i64 0, i64 945; CHECK-NEXT: store i64 [[RMEM2]], ptr [[PREG7]], align 8, !tbaa [[X9_TBAA8:![0-9]+]]46; CHECK-NEXT: [[ADD2C279:%.*]] = add i64 [[RMEM2]], [[VAL]]47; CHECK-NEXT: [[CCHK:%.*]] = icmp sge i64 [[ADD2C279]], 048; CHECK-NEXT: [[CFL:%.*]] = zext i1 [[CCHK]] to i849; CHECK-NEXT: store i8 [[CFL]], ptr [[PCARRY]], align 1, !tbaa [[CARRY_TBAA16:![0-9]+]]50; CHECK-NEXT: br label %[[EXIT]]51; CHECK: [[EXIT]]:52; CHECK-NEXT: [[RESTART378:%.*]] = load [[MNR_STRUCT]], ptr [[RESTART]], align 853; CHECK-NEXT: ret [[MNR_STRUCT]] [[RESTART378]]54;55Entry:56 %restart = alloca %MNR_struct57 %pCarry = getelementptr %DS_struct, ptr %pDS, i32 0, i32 158 %base = load ptr, ptr %pDS, !tbaa !14259 %absaddr = getelementptr i64, ptr %base, i64 960 %extarget = load i64, ptr %absaddr, align 8, !tbaa !461 %template = icmp eq i64 %extarget, 859398741262 br i1 %template, label %"BB3.000316011731#1", label %BB2.000316011731.563 64"BB3.000316011731#1":65 %pbase8 = getelementptr [32 x ptr], ptr %pDS, i64 0, i64 2966 %base9 = load ptr, ptr %pbase8, !tbaa !14267 %absaddr1 = getelementptr i64, ptr %base9, i64 768 %rmem = load i64, ptr %absaddr1, align 8, !tbaa !469 %pwt = getelementptr %DS_struct, ptr %pDS, i32 0, i32 270 %pwte = getelementptr [32 x i16], ptr %pwt, i64 0, i64 %extarget71 %shifts = load i16, ptr %pwte, align 2, !tbaa !175, !invariant.load !18172 %slowj = icmp eq i16 %shifts, 073 br i1 %slowj, label %BB2.000316011731.5, label %"BB3.000316011731#1.1"74 75BB2.000316011731.5:76 %extarget1 = and i64 %extarget, 13743895347177 switch i64 %extarget1, label %Exit [78 ]79 80"BB3.000316011731#1.1":81 %shifts1 = zext i16 %shifts to i6482 %val = call i64 @llvm.x86.bmi.bextr.64(i64 %rmem, i64 %shifts1)83 %preg = getelementptr [64 x i64], ptr %pCG, i64 0, i64 1284 store i64 %val, ptr %preg, align 32, !tbaa !3285 %preg2 = getelementptr [64 x i64], ptr %pCG, i64 0, i64 1486 %reg = load i64, ptr %preg2, align 16, !tbaa !3687 %pbase2 = getelementptr [32 x ptr], ptr %pDS, i64 0, i64 2988 %base2 = load ptr, ptr %pbase2, !tbaa !14289 %absaddr2 = getelementptr i64, ptr %base2, i64 %reg90 %rmem2 = load i64, ptr %absaddr2, align 8, !tbaa !491 %preg7 = getelementptr [64 x i64], ptr %pCG, i64 0, i64 992 store i64 %rmem2, ptr %preg7, align 8, !tbaa !2693 %reg7 = load i64, ptr %preg7, align 8, !tbaa !2694 %preg3 = getelementptr [64 x i64], ptr %pCG, i64 0, i64 1295 %reg4 = load i64, ptr %preg3, align 32, !tbaa !3296 %add2c279 = add i64 %reg7, %reg497 %cchk = icmp sge i64 %add2c279, 098 %cfl = zext i1 %cchk to i899 store i8 %cfl, ptr %pCarry, align 1, !tbaa !156100 br label %Exit101 102Exit:103 %restart378 = load %MNR_struct, ptr %restart104 ret %MNR_struct %restart378105}106 107attributes #2 = { nounwind }108attributes #3 = { nounwind readnone }109 110!tbaa = !{!0, !1, !3, !4, !6, !26, !32, !36, !142, !156, !175}111 112!0 = !{!"tbaa2200"}113!1 = !{!2, !2, i64 0}114!2 = !{!"data", !0}115!3 = !{!"ctrl", !0}116!4 = !{!5, !5, i64 0}117!5 = !{!"mem", !2}118!6 = !{!7, !7, i64 0}119!7 = !{!"grs", !2}120!26 = !{!27, !27, i64 0}121!27 = !{!"X9", !7}122!32 = !{!33, !33, i64 0}123!33 = !{!"A0", !7}124!36 = !{!37, !37, i64 0}125!37 = !{!"A2", !7}126!142 = !{!143, !143, i64 0}127!143 = !{!"breg", !3}128!156 = !{!157, !157, i64 0}129!157 = !{!"carry", !3}130!175 = !{!176, !176, i64 0, i32 1}131!176 = !{!"const", !3}132!181 = !{}133;.134; CHECK: [[META0:![0-9]+]] = !{!"tbaa2200"}135; CHECK: [[META2:![0-9]+]] = !{!"data", [[META0]]}136; CHECK: [[META3:![0-9]+]] = !{!"ctrl", [[META0]]}137; CHECK: [[MEM_TBAA4]] = !{[[META5:![0-9]+]], [[META5]], i64 0}138; CHECK: [[META5]] = !{!"mem", [[META2]]}139; CHECK: [[META7:![0-9]+]] = !{!"grs", [[META2]]}140; CHECK: [[X9_TBAA8]] = !{[[META9:![0-9]+]], [[META9]], i64 0}141; CHECK: [[META9]] = !{!"X9", [[META7]]}142; CHECK: [[A0_TBAA10]] = !{[[META11:![0-9]+]], [[META11]], i64 0}143; CHECK: [[META11]] = !{!"A0", [[META7]]}144; CHECK: [[A2_TBAA12]] = !{[[META13:![0-9]+]], [[META13]], i64 0}145; CHECK: [[META13]] = !{!"A2", [[META7]]}146; CHECK: [[BREG_TBAA14]] = !{[[META15:![0-9]+]], [[META15]], i64 0}147; CHECK: [[META15]] = !{!"breg", [[META3]]}148; CHECK: [[CARRY_TBAA16]] = !{[[META17:![0-9]+]], [[META17]], i64 0}149; CHECK: [[META17]] = !{!"carry", [[META3]]}150; CHECK: [[CONST_TBAA18]] = !{[[META19:![0-9]+]], [[META19]], i64 0, i32 1}151; CHECK: [[META19]] = !{!"const", [[META3]]}152; CHECK: [[META20]] = !{}153;.154