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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes='require<profile-summary>,function(chr,instcombine,simplifycfg)' -S | FileCheck %s3 4declare void @foo()5declare void @bar()6 7; Simple case.8; Roughly,9; t0 = *i10; if ((t0 & 1) != 0) // Likely true11; foo()12; if ((t0 & 2) != 0) // Likely true13; foo()14; ->15; t0 = *i16; if ((t0 & 3) != 0) { // Likely true17; foo()18; foo()19; } else {20; if ((t0 & 1) != 0)21; foo()22; if ((t0 & 2) != 0)23; foo()24; }25define void @test_chr_1(ptr %i) !prof !14 {26; CHECK-LABEL: @test_chr_1(27; CHECK-NEXT: entry:28; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 429; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]30; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 331; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 332; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15:![0-9]+]]33; CHECK: bb0:34; CHECK-NEXT: call void @foo()35; CHECK-NEXT: call void @foo()36; CHECK-NEXT: br label [[BB3:%.*]]37; CHECK: entry.split.nonchr:38; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 139; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 040; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16:![0-9]+]]41; CHECK: bb0.nonchr:42; CHECK-NEXT: call void @foo()43; CHECK-NEXT: br label [[BB1_NONCHR]]44; CHECK: bb1.nonchr:45; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 246; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 047; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]48; CHECK: bb2.nonchr:49; CHECK-NEXT: call void @foo()50; CHECK-NEXT: br label [[BB3]]51; CHECK: bb3:52; CHECK-NEXT: ret void53;54entry:55 %0 = load i32, ptr %i56 %1 = and i32 %0, 157 %2 = icmp eq i32 %1, 058 br i1 %2, label %bb1, label %bb0, !prof !1559 60bb0:61 call void @foo()62 br label %bb163 64bb1:65 %3 = and i32 %0, 266 %4 = icmp eq i32 %3, 067 br i1 %4, label %bb3, label %bb2, !prof !1568 69bb2:70 call void @foo()71 br label %bb372 73bb3:74 ret void75}76 77; Simple case with a cold block.78; Roughly,79; t0 = *i80; if ((t0 & 1) != 0) // Likely true81; foo()82; if ((t0 & 2) == 0) // Likely false83; bar()84; if ((t0 & 4) != 0) // Likely true85; foo()86; ->87; t0 = *i88; if ((t0 & 7) == 7) { // Likely true89; foo()90; foo()91; } else {92; if ((t0 & 1) != 0)93; foo()94; if ((t0 & 2) == 0)95; bar()96; if ((t0 & 4) != 0)97; foo()98; }99define void @test_chr_1_1(ptr %i) !prof !14 {100; CHECK-LABEL: @test_chr_1_1(101; CHECK-NEXT: entry:102; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4103; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]104; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 7105; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 7106; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]107; CHECK: bb0:108; CHECK-NEXT: call void @foo()109; CHECK-NEXT: call void @foo()110; CHECK-NEXT: br label [[BB5:%.*]]111; CHECK: entry.split.nonchr:112; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 1113; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0114; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]115; CHECK: bb0.nonchr:116; CHECK-NEXT: call void @foo()117; CHECK-NEXT: br label [[BB1_NONCHR]]118; CHECK: bb1.nonchr:119; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 2120; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0121; CHECK-NEXT: br i1 [[TMP5]], label [[BB2_NONCHR:%.*]], label [[BB3_NONCHR:%.*]], !prof [[PROF16]]122; CHECK: bb2.nonchr:123; CHECK-NEXT: call void @bar()124; CHECK-NEXT: br label [[BB3_NONCHR]]125; CHECK: bb3.nonchr:126; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 4127; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0128; CHECK-NEXT: br i1 [[TMP7]], label [[BB5]], label [[BB4_NONCHR:%.*]], !prof [[PROF16]]129; CHECK: bb4.nonchr:130; CHECK-NEXT: call void @foo()131; CHECK-NEXT: br label [[BB5]]132; CHECK: bb5:133; CHECK-NEXT: ret void134;135entry:136 %0 = load i32, ptr %i137 %1 = and i32 %0, 1138 %2 = icmp eq i32 %1, 0139 br i1 %2, label %bb1, label %bb0, !prof !15140 141bb0:142 call void @foo()143 br label %bb1144 145bb1:146 %3 = and i32 %0, 2147 %4 = icmp eq i32 %3, 0148 br i1 %4, label %bb2, label %bb3, !prof !15149 150bb2:151 call void @bar()152 br label %bb3153 154bb3:155 %5 = and i32 %0, 4156 %6 = icmp eq i32 %5, 0157 br i1 %6, label %bb5, label %bb4, !prof !15158 159bb4:160 call void @foo()161 br label %bb5162 163bb5:164 ret void165}166 167; With an aggregate bit check.168; Roughly,169; t0 = *i170; if ((t0 & 255) != 0) // Likely true171; if ((t0 & 1) != 0) // Likely true172; foo()173; if ((t0 & 2) != 0) // Likely true174; foo()175; ->176; t0 = *i177; if ((t0 & 3) != 0) { // Likely true178; foo()179; foo()180; } else if ((t0 & 255) != 0)181; if ((t0 & 1) != 0)182; foo()183; if ((t0 & 2) != 0)184; foo()185; }186define void @test_chr_2(ptr %i) !prof !14 {187; CHECK-LABEL: @test_chr_2(188; CHECK-NEXT: entry:189; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4190; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]191; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3192; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3193; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]194; CHECK: bb1:195; CHECK-NEXT: call void @foo()196; CHECK-NEXT: call void @foo()197; CHECK-NEXT: br label [[BB4:%.*]]198; CHECK: entry.split.nonchr:199; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 255200; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0201; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB4]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]202; CHECK: bb0.nonchr:203; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 1204; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0205; CHECK-NEXT: br i1 [[TMP5]], label [[BB2_NONCHR:%.*]], label [[BB1_NONCHR:%.*]], !prof [[PROF16]]206; CHECK: bb2.nonchr:207; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 2208; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0209; CHECK-NEXT: br i1 [[TMP7]], label [[BB4]], label [[BB3_NONCHR:%.*]], !prof [[PROF16]]210; CHECK: bb3.nonchr:211; CHECK-NEXT: call void @foo()212; CHECK-NEXT: br label [[BB4]]213; CHECK: bb1.nonchr:214; CHECK-NEXT: call void @foo()215; CHECK-NEXT: br label [[BB2_NONCHR]]216; CHECK: bb4:217; CHECK-NEXT: ret void218;219entry:220 %0 = load i32, ptr %i221 %1 = and i32 %0, 255222 %2 = icmp eq i32 %1, 0223 br i1 %2, label %bb4, label %bb0, !prof !15224 225bb0:226 %3 = and i32 %0, 1227 %4 = icmp eq i32 %3, 0228 br i1 %4, label %bb2, label %bb1, !prof !15229 230bb1:231 call void @foo()232 br label %bb2233 234bb2:235 %5 = and i32 %0, 2236 %6 = icmp eq i32 %5, 0237 br i1 %6, label %bb4, label %bb3, !prof !15238 239bb3:240 call void @foo()241 br label %bb4242 243bb4:244 ret void245}246 247; Split case.248; Roughly,249; t1 = *i250; if ((t1 & 1) != 0) // Likely true251; foo()252; if ((t1 & 2) != 0) // Likely true253; foo()254; t2 = *i255; if ((t2 & 4) != 0) // Likely true256; foo()257; if ((t2 & 8) != 0) // Likely true258; foo()259; ->260; t1 = *i261; if ((t1 & 3) != 0) { // Likely true262; foo()263; foo()264; } else {265; if ((t1 & 1) != 0)266; foo()267; if ((t1 & 2) != 0)268; foo()269; }270; t2 = *i271; if ((t2 & 12) != 0) { // Likely true272; foo()273; foo()274; } else {275; if ((t2 & 4) != 0)276; foo()277; if ((t2 & 8) != 0)278; foo()279; }280define void @test_chr_3(ptr %i) !prof !14 {281; CHECK-LABEL: @test_chr_3(282; CHECK-NEXT: entry:283; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4284; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]285; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3286; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3287; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]288; CHECK: bb0:289; CHECK-NEXT: call void @foo()290; CHECK-NEXT: call void @foo()291; CHECK-NEXT: br label [[BB3:%.*]]292; CHECK: entry.split.nonchr:293; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 1294; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0295; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]296; CHECK: bb0.nonchr:297; CHECK-NEXT: call void @foo()298; CHECK-NEXT: br label [[BB1_NONCHR]]299; CHECK: bb1.nonchr:300; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 2301; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0302; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]303; CHECK: bb2.nonchr:304; CHECK-NEXT: call void @foo()305; CHECK-NEXT: br label [[BB3]]306; CHECK: bb3:307; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[I]], align 4308; CHECK-NEXT: [[DOTFR2:%.*]] = freeze i32 [[TMP6]]309; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[DOTFR2]], 12310; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 12311; CHECK-NEXT: br i1 [[TMP8]], label [[BB4:%.*]], label [[BB3_SPLIT_NONCHR:%.*]], !prof [[PROF15]]312; CHECK: bb4:313; CHECK-NEXT: call void @foo()314; CHECK-NEXT: call void @foo()315; CHECK-NEXT: br label [[BB7:%.*]]316; CHECK: bb3.split.nonchr:317; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[DOTFR2]], 4318; CHECK-NEXT: [[DOTNOT3:%.*]] = icmp eq i32 [[TMP9]], 0319; CHECK-NEXT: br i1 [[DOTNOT3]], label [[BB5_NONCHR:%.*]], label [[BB4_NONCHR:%.*]], !prof [[PROF16]]320; CHECK: bb4.nonchr:321; CHECK-NEXT: call void @foo()322; CHECK-NEXT: br label [[BB5_NONCHR]]323; CHECK: bb5.nonchr:324; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[DOTFR2]], 8325; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0326; CHECK-NEXT: br i1 [[TMP11]], label [[BB7]], label [[BB6_NONCHR:%.*]], !prof [[PROF16]]327; CHECK: bb6.nonchr:328; CHECK-NEXT: call void @foo()329; CHECK-NEXT: br label [[BB7]]330; CHECK: bb7:331; CHECK-NEXT: ret void332;333entry:334 %0 = load i32, ptr %i335 %1 = and i32 %0, 1336 %2 = icmp eq i32 %1, 0337 br i1 %2, label %bb1, label %bb0, !prof !15338 339bb0:340 call void @foo()341 br label %bb1342 343bb1:344 %3 = and i32 %0, 2345 %4 = icmp eq i32 %3, 0346 br i1 %4, label %bb3, label %bb2, !prof !15347 348bb2:349 call void @foo()350 br label %bb3351 352bb3:353 %5 = load i32, ptr %i354 %6 = and i32 %5, 4355 %7 = icmp eq i32 %6, 0356 br i1 %7, label %bb5, label %bb4, !prof !15357 358bb4:359 call void @foo()360 br label %bb5361 362bb5:363 %8 = and i32 %5, 8364 %9 = icmp eq i32 %8, 0365 br i1 %9, label %bb7, label %bb6, !prof !15366 367bb6:368 call void @foo()369 br label %bb7370 371bb7:372 ret void373}374 375; Selects.376; Roughly,377; t0 = *i378; sum1 = (t0 & 1) ? sum0 : (sum0 + 42) // Likely false379; sum2 = (t0 & 2) ? sum1 : (sum1 + 43) // Likely false380; return sum2381; ->382; t0 = *i383; if ((t0 & 3) == 3)384; return sum0 + 85385; else {386; sum1 = (t0 & 1) ? sum0 : (sum0 + 42)387; sum2 = (t0 & 2) ? sum1 : (sum1 + 43)388; return sum2389; }390define i32 @test_chr_4(ptr %i, i32 %sum0) !prof !14 {391; CHECK-LABEL: @test_chr_4(392; CHECK-NEXT: entry:393; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4394; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]395; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3396; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3397; CHECK-NEXT: br i1 [[TMP2]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]398; CHECK: common.ret:399; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ [[TMP3:%.*]], [[ENTRY_SPLIT]] ], [ [[SUM2_NONCHR:%.*]], [[ENTRY_SPLIT_NONCHR]] ]400; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]401; CHECK: entry.split:402; CHECK-NEXT: [[TMP3]] = add i32 [[SUM0:%.*]], 85403; CHECK-NEXT: br label [[COMMON_RET:%.*]]404; CHECK: entry.split.nonchr:405; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 42406; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR1]], 1407; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP5]], 0408; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[DOTNOT]], i32 [[SUM0]], i32 [[TMP4]], !prof [[PROF16]]409; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 2410; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0411; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM1_NONCHR]], 43412; CHECK-NEXT: [[SUM2_NONCHR]] = select i1 [[TMP7]], i32 [[SUM1_NONCHR]], i32 [[TMP8]], !prof [[PROF16]]413; CHECK-NEXT: br label [[COMMON_RET]]414;415entry:416 %0 = load i32, ptr %i417 %1 = and i32 %0, 1418 %2 = icmp eq i32 %1, 0419 %3 = add i32 %sum0, 42420 %sum1 = select i1 %2, i32 %sum0, i32 %3, !prof !15421 %4 = and i32 %0, 2422 %5 = icmp eq i32 %4, 0423 %6 = add i32 %sum1, 43424 %sum2 = select i1 %5, i32 %sum1, i32 %6, !prof !15425 ret i32 %sum2426}427 428; Selects + Brs429; Roughly,430; t0 = *i431; if ((t0 & 255) != 0) { // Likely true432; sum = (t0 & 1) ? sum0 : (sum0 + 42) // Likely false433; sum = (t0 & 2) ? sum : (sum + 43) // Likely false434; if ((t0 & 4) != 0) { // Likely true435; sum3 = sum + 44436; sum = (t0 & 8) ? sum3 : (sum3 + 44) // Likely false437; }438; }439; return sum440; ->441; t0 = *i442; if ((t0 & 15) != 15) { // Likely true443; sum = sum0 + 173444; } else if ((t0 & 255) != 0) {445; sum = (t0 & 1) ? sum0 : (sum0 + 42)446; sum = (t0 & 2) ? sum : (sum + 43)447; if ((t0 & 4) != 0) {448; sum3 = sum + 44449; sum = (t0 & 8) ? sum3 : (sum3 + 44)450; }451; }452; return sum453define i32 @test_chr_5(ptr %i, i32 %sum0) !prof !14 {454; CHECK-LABEL: @test_chr_5(455; CHECK-NEXT: entry:456; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4457; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]458; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 15459; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 15460; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]461; CHECK: bb1:462; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 173463; CHECK-NEXT: br label [[BB3:%.*]]464; CHECK: entry.split.nonchr:465; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 255466; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP4]], 0467; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]468; CHECK: bb0.nonchr:469; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR1]], 1470; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0471; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[SUM0]], 42472; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP6]], i32 [[SUM0]], i32 [[TMP7]], !prof [[PROF16]]473; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[DOTFR1]], 2474; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 0475; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[SUM1_NONCHR]], 43476; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP9]], i32 [[SUM1_NONCHR]], i32 [[TMP10]], !prof [[PROF16]]477; CHECK-NEXT: [[TMP11:%.*]] = and i32 [[DOTFR1]], 4478; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP11]], 0479; CHECK-NEXT: [[TMP13:%.*]] = and i32 [[DOTFR1]], 8480; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP13]], 0481; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP14]], i32 44, i32 88482; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]483; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP12]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof [[PROF16]]484; CHECK-NEXT: br label [[BB3]]485; CHECK: bb3:486; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP3]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]487; CHECK-NEXT: ret i32 [[SUM6]]488;489entry:490 %0 = load i32, ptr %i491 %1 = and i32 %0, 255492 %2 = icmp eq i32 %1, 0493 br i1 %2, label %bb3, label %bb0, !prof !15494 495bb0:496 %3 = and i32 %0, 1497 %4 = icmp eq i32 %3, 0498 %5 = add i32 %sum0, 42499 %sum1 = select i1 %4, i32 %sum0, i32 %5, !prof !15500 %6 = and i32 %0, 2501 %7 = icmp eq i32 %6, 0502 %8 = add i32 %sum1, 43503 %sum2 = select i1 %7, i32 %sum1, i32 %8, !prof !15504 %9 = and i32 %0, 4505 %10 = icmp eq i32 %9, 0506 br i1 %10, label %bb2, label %bb1, !prof !15507 508bb1:509 %sum3 = add i32 %sum2, 44510 %11 = and i32 %0, 8511 %12 = icmp eq i32 %11, 0512 %13 = add i32 %sum3, 44513 %sum4 = select i1 %12, i32 %sum3, i32 %13, !prof !15514 br label %bb2515 516bb2:517 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]518 br label %bb3519 520bb3:521 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]522 ret i32 %sum6523}524 525; Selects + Brs with a scope split in the middle526; Roughly,527; t0 = *i528; if ((t0 & 255) != 0) { // Likely true529; sum = (t0 & 1) ? sum0 : (sum0 + 42) // Likely false530; sum = (t0 & 2) ? sum : (sum + 43) // Likely false531; if ((sum0 & 4) != 0) { // Likely true. The condition doesn't use v.532; sum3 = sum + 44533; sum = (t0 & 8) ? sum3 : (sum3 + 44) // Likely false534; }535; }536; return sum537; ->538; t0 = *i539; if ((sum0 & 4) != 0 & (t0 & 11) != 11) { // Likely true540; sum = sum0 + 173541; } else if ((t0 & 255) != 0) {542; sum = (t0 & 1) ? sum0 : (sum0 + 42)543; sum = (t0 & 2) ? sum : (sum + 43)544; if ((sum0 & 4) != 0) {545; sum3 = sum + 44546; sum = (t0 & 8) ? sum3 : (sum3 + 44)547; }548; }549; return sum550define i32 @test_chr_5_1(ptr %i, i32 %sum0) !prof !14 {551; CHECK-LABEL: @test_chr_5_1(552; CHECK-NEXT: entry:553; CHECK-NEXT: [[SUM0_FR:%.*]] = freeze i32 [[SUM0:%.*]]554; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4555; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]556; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUM0_FR]], 4557; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0558; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 11559; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 11560; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP2]]561; CHECK-NEXT: br i1 [[TMP5]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]562; CHECK: bb1:563; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[SUM0_FR]], 173564; CHECK-NEXT: br label [[BB3:%.*]]565; CHECK: entry.split.nonchr:566; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[DOTFR1]], 255567; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP7]], 0568; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]569; CHECK: bb0.nonchr:570; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[DOTFR1]], 1571; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 0572; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[SUM0_FR]], 42573; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP9]], i32 [[SUM0_FR]], i32 [[TMP10]], !prof [[PROF16]]574; CHECK-NEXT: [[TMP11:%.*]] = and i32 [[DOTFR1]], 2575; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP11]], 0576; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[SUM1_NONCHR]], 43577; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP12]], i32 [[SUM1_NONCHR]], i32 [[TMP13]], !prof [[PROF16]]578; CHECK-NEXT: [[TMP14:%.*]] = and i32 [[SUM0_FR]], 4579; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i32 [[TMP14]], 0580; CHECK-NEXT: [[TMP16:%.*]] = and i32 [[DOTFR1]], 8581; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[TMP16]], 0582; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP17]], i32 44, i32 88583; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]584; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP15]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof [[PROF16]]585; CHECK-NEXT: br label [[BB3]]586; CHECK: bb3:587; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP6]], [[BB1]] ], [ [[SUM0_FR]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]588; CHECK-NEXT: ret i32 [[SUM6]]589;590entry:591 %0 = load i32, ptr %i592 %1 = and i32 %0, 255593 %2 = icmp eq i32 %1, 0594 br i1 %2, label %bb3, label %bb0, !prof !15595 596bb0:597 %3 = and i32 %0, 1598 %4 = icmp eq i32 %3, 0599 %5 = add i32 %sum0, 42600 %sum1 = select i1 %4, i32 %sum0, i32 %5, !prof !15601 %6 = and i32 %0, 2602 %7 = icmp eq i32 %6, 0603 %8 = add i32 %sum1, 43604 %sum2 = select i1 %7, i32 %sum1, i32 %8, !prof !15605 %9 = and i32 %sum0, 4 ; Split606 %10 = icmp eq i32 %9, 0607 br i1 %10, label %bb2, label %bb1, !prof !15608 609bb1:610 %sum3 = add i32 %sum2, 44611 %11 = and i32 %0, 8612 %12 = icmp eq i32 %11, 0613 %13 = add i32 %sum3, 44614 %sum4 = select i1 %12, i32 %sum3, i32 %13, !prof !15615 br label %bb2616 617bb2:618 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]619 br label %bb3620 621bb3:622 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]623 ret i32 %sum6624}625 626; Selects + Brs, non-matching bases627; Roughly,628; i0 = *i629; j0 = *j630; if ((i0 & 255) != 0) { // Likely true631; sum = (i0 & 2) ? sum0 : (sum0 + 43) // Likely false632; if ((j0 & 4) != 0) { // Likely true. The condition uses j0, not i0.633; sum3 = sum + 44634; sum = (i0 & 8) ? sum3 : (sum3 + 44) // Likely false635; }636; }637; return sum638; ->639; i0 = *i640; j0 = *j641; if ((j0 & 4) != 0 & (i0 & 10) != 10) { // Likely true642; sum = sum0 + 131643; } else if ((i0 & 255) != 0) {644; sum = (i0 & 2) ? sum0 : (sum0 + 43)645; if ((j0 & 4) != 0) {646; sum3 = sum + 44647; sum = (i0 & 8) ? sum3 : (sum3 + 44)648; }649; }650; return sum651define i32 @test_chr_6(ptr %i, ptr %j, i32 %sum0) !prof !14 {652; CHECK-LABEL: @test_chr_6(653; CHECK-NEXT: entry:654; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 4655; CHECK-NEXT: [[I0_FR:%.*]] = freeze i32 [[I0]]656; CHECK-NEXT: [[J0:%.*]] = load i32, ptr [[J:%.*]], align 4657; CHECK-NEXT: [[J0_FR:%.*]] = freeze i32 [[J0]]658; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0_FR]], 4659; CHECK-NEXT: [[V10:%.*]] = icmp ne i32 [[V9]], 0660; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[I0_FR]], 10661; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 10662; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[V10]]663; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]664; CHECK: bb1:665; CHECK-NEXT: [[V13:%.*]] = add i32 [[SUM0:%.*]], 131666; CHECK-NEXT: br label [[BB3:%.*]]667; CHECK: entry.split.nonchr:668; CHECK-NEXT: [[V1:%.*]] = and i32 [[I0_FR]], 255669; CHECK-NEXT: [[V2_NOT:%.*]] = icmp eq i32 [[V1]], 0670; CHECK-NEXT: br i1 [[V2_NOT]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]671; CHECK: bb0.nonchr:672; CHECK-NEXT: [[V3_NONCHR:%.*]] = and i32 [[I0_FR]], 2673; CHECK-NEXT: [[V4_NONCHR:%.*]] = icmp eq i32 [[V3_NONCHR]], 0674; CHECK-NEXT: [[V8_NONCHR:%.*]] = add i32 [[SUM0]], 43675; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[V4_NONCHR]], i32 [[SUM0]], i32 [[V8_NONCHR]], !prof [[PROF16]]676; CHECK-NEXT: [[V9_NONCHR:%.*]] = and i32 [[J0_FR]], 4677; CHECK-NEXT: [[V10_NONCHR:%.*]] = icmp eq i32 [[V9_NONCHR]], 0678; CHECK-NEXT: [[V11_NONCHR:%.*]] = and i32 [[I0_FR]], 8679; CHECK-NEXT: [[V12_NONCHR:%.*]] = icmp eq i32 [[V11_NONCHR]], 0680; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[V12_NONCHR]], i32 44, i32 88681; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]682; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[V10_NONCHR]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof [[PROF16]]683; CHECK-NEXT: br label [[BB3]]684; CHECK: bb3:685; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[V13]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]686; CHECK-NEXT: ret i32 [[SUM6]]687;688entry:689 %i0 = load i32, ptr %i690 %j0 = load i32, ptr %j691 %v1 = and i32 %i0, 255692 %v2 = icmp eq i32 %v1, 0693 br i1 %v2, label %bb3, label %bb0, !prof !15694 695bb0:696 %v3 = and i32 %i0, 2697 %v4 = icmp eq i32 %v3, 0698 %v8 = add i32 %sum0, 43699 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !15700 %v9 = and i32 %j0, 4701 %v10 = icmp eq i32 %v9, 0702 br i1 %v10, label %bb2, label %bb1, !prof !15703 704bb1:705 %sum3 = add i32 %sum2, 44706 %v11 = and i32 %i0, 8707 %v12 = icmp eq i32 %v11, 0708 %v13 = add i32 %sum3, 44709 %sum4 = select i1 %v12, i32 %sum3, i32 %v13, !prof !15710 br label %bb2711 712bb2:713 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]714 br label %bb3715 716bb3:717 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]718 ret i32 %sum6719}720 721; Selects + Brs, the branch condition can't be hoisted to be merged with a722; select. No CHR happens.723; Roughly,724; i0 = *i725; sum = ((i0 & 2) == 0) ? sum0 : (sum0 + 43) // Likely false726; foo();727; j0 = *j728; if ((j0 & 4) != 0) { // Likely true729; foo();730; sum = sum + 44731; }732; return sum733; ->734; (no change)735define i32 @test_chr_7(ptr %i, ptr %j, i32 %sum0) !prof !14 {736; CHECK-LABEL: @test_chr_7(737; CHECK-NEXT: entry:738; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 4739; CHECK-NEXT: [[V3:%.*]] = and i32 [[I0]], 2740; CHECK-NEXT: [[V4:%.*]] = icmp eq i32 [[V3]], 0741; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43742; CHECK-NEXT: [[SUM2:%.*]] = select i1 [[V4]], i32 [[SUM0]], i32 [[V8]], !prof [[PROF16]]743; CHECK-NEXT: call void @foo()744; CHECK-NEXT: [[J0:%.*]] = load i32, ptr [[J:%.*]], align 4745; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0]], 4746; CHECK-NEXT: [[V10:%.*]] = icmp eq i32 [[V9]], 0747; CHECK-NEXT: br i1 [[V10]], label [[BB2:%.*]], label [[BB1:%.*]], !prof [[PROF16]]748; CHECK: bb1:749; CHECK-NEXT: call void @foo()750; CHECK-NEXT: [[SUM4:%.*]] = add i32 [[SUM2]], 44751; CHECK-NEXT: br label [[BB2]]752; CHECK: bb2:753; CHECK-NEXT: [[SUM5:%.*]] = phi i32 [ [[SUM2]], [[ENTRY:%.*]] ], [ [[SUM4]], [[BB1]] ]754; CHECK-NEXT: ret i32 [[SUM5]]755;756entry:757 %i0 = load i32, ptr %i758 %v3 = and i32 %i0, 2759 %v4 = icmp eq i32 %v3, 0760 %v8 = add i32 %sum0, 43761 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !15762 call void @foo()763 %j0 = load i32, ptr %j764 %v9 = and i32 %j0, 4765 %v10 = icmp eq i32 %v9, 0766 br i1 %v10, label %bb2, label %bb1, !prof !15 ; %v10 can't be hoisted above the above select767 768bb1:769 call void @foo()770 %sum4 = add i32 %sum2, 44771 br label %bb2772 773bb2:774 %sum5 = phi i32 [ %sum2, %entry ], [ %sum4, %bb1 ]775 ret i32 %sum5776}777 778; Selects + Brs, the branch condition can't be hoisted to be merged with the779; selects. Dropping the select.780; Roughly,781; i0 = *i782; sum = ((i0 & 2) == 0) ? sum0 : (sum0 + 43) // Likely false783; foo();784; j0 = *j785; if ((j0 & 4) != 0) // Likely true786; foo()787; if ((j0 & 8) != 0) // Likely true788; foo()789; return sum790; ->791; i0 = *i792; sum = ((i0 & 2) == 0) ? sum0 : (sum0 + 43) // Likely false793; foo();794; j0 = *j795; if ((j0 & 12) != 12) { // Likely true796; foo()797; foo()798; } else {799; if ((j0 & 4) != 0)800; foo()801; if ((j0 & 8) != 0)802; foo()803; }804; return sum805define i32 @test_chr_7_1(ptr %i, ptr %j, i32 %sum0) !prof !14 {806; CHECK-LABEL: @test_chr_7_1(807; CHECK-NEXT: entry:808; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 4809; CHECK-NEXT: call void @foo()810; CHECK-NEXT: [[J0:%.*]] = load i32, ptr [[J:%.*]], align 4811; CHECK-NEXT: [[J0_FR:%.*]] = freeze i32 [[J0]]812; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[J0_FR]], 12813; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 12814; CHECK-NEXT: br i1 [[TMP1]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]815; CHECK: bb0:816; CHECK-NEXT: call void @foo()817; CHECK-NEXT: call void @foo()818; CHECK-NEXT: br label [[BB3:%.*]]819; CHECK: entry.split.nonchr:820; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0_FR]], 4821; CHECK-NEXT: [[V10_NOT:%.*]] = icmp eq i32 [[V9]], 0822; CHECK-NEXT: br i1 [[V10_NOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]823; CHECK: bb0.nonchr:824; CHECK-NEXT: call void @foo()825; CHECK-NEXT: br label [[BB1_NONCHR]]826; CHECK: bb1.nonchr:827; CHECK-NEXT: [[V11_NONCHR:%.*]] = and i32 [[J0_FR]], 8828; CHECK-NEXT: [[V12_NONCHR:%.*]] = icmp eq i32 [[V11_NONCHR]], 0829; CHECK-NEXT: br i1 [[V12_NONCHR]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]830; CHECK: bb2.nonchr:831; CHECK-NEXT: call void @foo()832; CHECK-NEXT: br label [[BB3]]833; CHECK: bb3:834; CHECK-NEXT: [[V3:%.*]] = and i32 [[I0]], 2835; CHECK-NEXT: [[V4:%.*]] = icmp eq i32 [[V3]], 0836; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43837; CHECK-NEXT: [[SUM2:%.*]] = select i1 [[V4]], i32 [[SUM0]], i32 [[V8]], !prof [[PROF16]]838; CHECK-NEXT: ret i32 [[SUM2]]839;840entry:841 %i0 = load i32, ptr %i842 %v3 = and i32 %i0, 2843 %v4 = icmp eq i32 %v3, 0844 %v8 = add i32 %sum0, 43845 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !15846 call void @foo()847 %j0 = load i32, ptr %j848 %v9 = and i32 %j0, 4849 %v10 = icmp eq i32 %v9, 0850 br i1 %v10, label %bb1, label %bb0, !prof !15 ; %v10 can't be hoisted above the above select851 852bb0:853 call void @foo()854 br label %bb1855 856bb1:857 %v11 = and i32 %j0, 8858 %v12 = icmp eq i32 %v11, 0859 br i1 %v12, label %bb3, label %bb2, !prof !15860 861bb2:862 call void @foo()863 br label %bb3864 865bb3:866 ret i32 %sum2867}868 869; Branches aren't biased enough. No CHR happens.870; Roughly,871; t0 = *i872; if ((t0 & 1) != 0) // Not biased873; foo()874; if ((t0 & 2) != 0) // Not biased875; foo()876; ->877; (no change)878define void @test_chr_8(ptr %i) !prof !14 {879; CHECK-LABEL: @test_chr_8(880; CHECK-NEXT: entry:881; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4882; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 1883; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0884; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[BB0:%.*]], !prof [[PROF17:![0-9]+]]885; CHECK: bb0:886; CHECK-NEXT: call void @foo()887; CHECK-NEXT: br label [[BB1]]888; CHECK: bb1:889; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 2890; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0891; CHECK-NEXT: br i1 [[TMP4]], label [[BB3:%.*]], label [[BB2:%.*]], !prof [[PROF17]]892; CHECK: bb2:893; CHECK-NEXT: call void @foo()894; CHECK-NEXT: br label [[BB3]]895; CHECK: bb3:896; CHECK-NEXT: ret void897;898entry:899 %0 = load i32, ptr %i900 %1 = and i32 %0, 1901 %2 = icmp eq i32 %1, 0902 br i1 %2, label %bb1, label %bb0, !prof !16903 904bb0:905 call void @foo()906 br label %bb1907 908bb1:909 %3 = and i32 %0, 2910 %4 = icmp eq i32 %3, 0911 br i1 %4, label %bb3, label %bb2, !prof !16912 913bb2:914 call void @foo()915 br label %bb3916 917bb3:918 ret void919}920 921; With an existing phi at the exit.922; Roughly,923; t = *i924; if ((t0 & 1) != 0) // Likely true925; foo()926; if ((t0 & 2) != 0) { // Likely true927; t = *j928; foo()929; }930; // There's a phi for t here.931; return t932; ->933; t = *i934; if ((t & 3) == 3) { // Likely true935; foo()936; t = *j937; foo()938; } else {939; if ((t & 1) != 0)940; foo()941; if ((t & 2) != 0) {942; t = *j943; foo()944; }945; }946; // There's a phi for t here.947; return t948define i32 @test_chr_9(ptr %i, ptr %j) !prof !14 {949; CHECK-LABEL: @test_chr_9(950; CHECK-NEXT: entry:951; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4952; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]953; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3954; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3955; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]956; CHECK: bb0:957; CHECK-NEXT: call void @foo()958; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[J:%.*]], align 4959; CHECK-NEXT: call void @foo()960; CHECK-NEXT: br label [[BB3:%.*]]961; CHECK: entry.split.nonchr:962; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 1963; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP4]], 0964; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]965; CHECK: bb0.nonchr:966; CHECK-NEXT: call void @foo()967; CHECK-NEXT: br label [[BB1_NONCHR]]968; CHECK: bb1.nonchr:969; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR1]], 2970; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0971; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]972; CHECK: bb2.nonchr:973; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[J]], align 4974; CHECK-NEXT: call void @foo()975; CHECK-NEXT: br label [[BB3]]976; CHECK: bb3:977; CHECK-NEXT: [[TMP8:%.*]] = phi i32 [ [[TMP3]], [[BB0]] ], [ [[DOTFR1]], [[BB1_NONCHR]] ], [ [[TMP7]], [[BB2_NONCHR]] ]978; CHECK-NEXT: ret i32 [[TMP8]]979;980entry:981 %0 = load i32, ptr %i982 %1 = and i32 %0, 1983 %2 = icmp eq i32 %1, 0984 br i1 %2, label %bb1, label %bb0, !prof !15985 986bb0:987 call void @foo()988 br label %bb1989 990bb1:991 %3 = and i32 %0, 2992 %4 = icmp eq i32 %3, 0993 br i1 %4, label %bb3, label %bb2, !prof !15994 995bb2:996 %5 = load i32, ptr %j997 call void @foo()998 br label %bb3999 1000bb3:1001 %6 = phi i32 [ %0, %bb1 ], [ %5, %bb2 ]1002 ret i32 %61003}1004 1005; With no phi at the exit, but the exit needs a phi inserted after CHR.1006; Roughly,1007; t0 = *i1008; if ((t0 & 1) != 0) // Likely true1009; foo()1010; t1 = *j1011; if ((t1 & 2) != 0) // Likely true1012; foo()1013; return (t1 * 42) - (t1 - 99)1014; ->1015; t0 = *i1016; if ((t0 & 3) == 3) { // Likely true1017; foo()1018; t1 = *j1019; foo()1020; } else {1021; if ((t0 & 1) != 0)1022; foo()1023; if ((t0 & 2) != 0) {1024; t1 = *j1025; foo()1026; }1027; }1028; // A new phi for t1 is inserted here.1029; return (t1 * 42) - (t1 - 99)1030define i32 @test_chr_10(ptr %i, ptr %j) !prof !14 {1031; CHECK-LABEL: @test_chr_10(1032; CHECK-NEXT: entry:1033; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 41034; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]1035; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 31036; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 31037; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1038; CHECK: bb0:1039; CHECK-NEXT: call void @foo()1040; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[J:%.*]], align 41041; CHECK-NEXT: call void @foo()1042; CHECK-NEXT: br label [[BB3:%.*]]1043; CHECK: entry.split.nonchr:1044; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 11045; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP4]], 01046; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]1047; CHECK: bb0.nonchr:1048; CHECK-NEXT: call void @foo()1049; CHECK-NEXT: br label [[BB1_NONCHR]]1050; CHECK: bb1.nonchr:1051; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[J]], align 41052; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 21053; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 01054; CHECK-NEXT: br i1 [[TMP7]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]1055; CHECK: bb2.nonchr:1056; CHECK-NEXT: call void @foo()1057; CHECK-NEXT: br label [[BB3]]1058; CHECK: bb3:1059; CHECK-NEXT: [[TMP8:%.*]] = phi i32 [ [[TMP3]], [[BB0]] ], [ [[TMP5]], [[BB2_NONCHR]] ], [ [[TMP5]], [[BB1_NONCHR]] ]1060; CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[TMP8]], 421061; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP8]], -991062; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP9]], [[TMP10]]1063; CHECK-NEXT: ret i32 [[TMP11]]1064;1065entry:1066 %0 = load i32, ptr %i1067 %1 = and i32 %0, 11068 %2 = icmp eq i32 %1, 01069 br i1 %2, label %bb1, label %bb0, !prof !151070 1071bb0:1072 call void @foo()1073 br label %bb11074 1075bb1:1076 %3 = load i32, ptr %j1077 %4 = and i32 %0, 21078 %5 = icmp eq i32 %4, 01079 br i1 %5, label %bb3, label %bb2, !prof !151080 1081bb2:1082 call void @foo()1083 br label %bb31084 1085bb3:1086 %6 = mul i32 %3, 421087 %7 = sub i32 %3, 991088 %8 = add i32 %6, %71089 ret i32 %81090}1091 1092; Test a case where there are two use-def chain paths to the same value (t0)1093; from the branch condition. This is a regression test for an old bug that1094; caused a bad hoisting that moves (hoists) a value (%conv) twice to the end of1095; the %entry block (once for %div and once for %mul16) and put a use ahead of1096; its definition like:1097; %entry:1098; ...1099; %div = fdiv double 1.000000e+00, %conv1100; %conv = sitofp i32 %0 to double1101; %mul16 = fmul double %div, %conv1102;1103; Roughly,1104; t0 = *i1105; if ((t0 & 1) != 0) // Likely true1106; foo()1107; // there are two use-def paths from the branch condition to t0.1108; if ((1.0 / t0) * t0 < 1) // Likely true1109; foo()1110; ->1111; t0 = *i1112; if ((t0 & 1) != 0 & (1.0 / t0) * t0 > 0) { // Likely true1113; foo()1114; foo()1115; } else {1116; if ((t0 & 1) != 0)1117; foo()1118; if ((1.0 / t0) * t0 < 1) // Likely true1119; foo()1120; }1121define void @test_chr_11(ptr %i, i32 %x) !prof !14 {1122; CHECK-LABEL: @test_chr_11(1123; CHECK-NEXT: entry:1124; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 41125; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]1126; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 11127; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 01128; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[DOTFR1]] to double1129; CHECK-NEXT: [[DIV:%.*]] = fdiv double 1.000000e+00, [[CONV]]1130; CHECK-NEXT: [[MUL16:%.*]] = fmul double [[DIV]], [[CONV]]1131; CHECK-NEXT: [[CONV717:%.*]] = fptosi double [[MUL16]] to i321132; CHECK-NEXT: [[CONV717_FR:%.*]] = freeze i32 [[CONV717]]1133; CHECK-NEXT: [[CMP18:%.*]] = icmp sgt i32 [[CONV717_FR]], 01134; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[CMP18]]1135; CHECK-NEXT: br i1 [[TMP3]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1136; CHECK: bb0:1137; CHECK-NEXT: call void @foo()1138; CHECK-NEXT: call void @foo()1139; CHECK-NEXT: br label [[BB3:%.*]]1140; CHECK: entry.split.nonchr:1141; CHECK-NEXT: br i1 [[TMP2]], label [[BB0_NONCHR:%.*]], label [[BB1_NONCHR:%.*]], !prof [[PROF18:![0-9]+]]1142; CHECK: bb0.nonchr:1143; CHECK-NEXT: call void @foo()1144; CHECK-NEXT: br label [[BB1_NONCHR]]1145; CHECK: bb1.nonchr:1146; CHECK-NEXT: [[CONV_NONCHR:%.*]] = sitofp i32 [[DOTFR1]] to double1147; CHECK-NEXT: [[DIV_NONCHR:%.*]] = fdiv double 1.000000e+00, [[CONV_NONCHR]]1148; CHECK-NEXT: [[MUL16_NONCHR:%.*]] = fmul double [[DIV_NONCHR]], [[CONV_NONCHR]]1149; CHECK-NEXT: [[CONV717_NONCHR:%.*]] = fptosi double [[MUL16_NONCHR]] to i321150; CHECK-NEXT: [[CMP18_NONCHR:%.*]] = icmp slt i32 [[CONV717_NONCHR]], 11151; CHECK-NEXT: br i1 [[CMP18_NONCHR]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]1152; CHECK: bb2.nonchr:1153; CHECK-NEXT: call void @foo()1154; CHECK-NEXT: br label [[BB3]]1155; CHECK: bb3:1156; CHECK-NEXT: ret void1157;1158entry:1159 %0 = load i32, ptr %i1160 %1 = and i32 %0, 11161 %2 = icmp eq i32 %1, 01162 br i1 %2, label %bb1, label %bb0, !prof !151163 1164bb0:1165 call void @foo()1166 br label %bb11167 1168bb1:1169 %conv = sitofp i32 %0 to double1170 %div = fdiv double 1.000000e+00, %conv1171 %mul16 = fmul double %div, %conv1172 %conv717 = fptosi double %mul16 to i321173 %cmp18 = icmp slt i32 %conv717, 11174 br i1 %cmp18, label %bb3, label %bb2, !prof !151175 1176bb2:1177 call void @foo()1178 br label %bb31179 1180bb3:1181 ret void1182}1183 1184; Selects + unrelated br only1185define i32 @test_chr_12(ptr %i, i32 %sum0) !prof !14 {1186; CHECK-LABEL: @test_chr_12(1187; CHECK-NEXT: entry:1188; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 41189; CHECK-NEXT: [[DOTFR2:%.*]] = freeze i32 [[TMP0]]1190; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR2]], 2551191; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 01192; CHECK-NEXT: br i1 [[TMP2]], label [[BB3:%.*]], label [[BB0:%.*]], !prof [[PROF16]]1193; CHECK: bb0:1194; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR2]], 11195; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 01196; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[SUM0:%.*]], 421197; CHECK-NEXT: [[SUM1:%.*]] = select i1 [[TMP4]], i32 [[SUM0]], i32 [[TMP5]], !prof [[PROF16]]1198; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR2]], 21199; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 01200; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM1]], 431201; CHECK-NEXT: [[SUM2:%.*]] = select i1 [[TMP7]], i32 [[SUM1]], i32 [[TMP8]], !prof [[PROF16]]1202; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 41203; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[TMP9]]1204; CHECK-NEXT: [[TMP10:%.*]] = icmp ne i32 [[DOTFR]], 01205; CHECK-NEXT: [[TMP11:%.*]] = and i32 [[DOTFR2]], 81206; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 01207; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP10]], [[TMP12]]1208; CHECK-NEXT: br i1 [[TMP13]], label [[BB1:%.*]], label [[BB0_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1209; CHECK: bb1:1210; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[SUM2]], 881211; CHECK-NEXT: br label [[BB3]]1212; CHECK: bb0.split.nonchr:1213; CHECK-NEXT: br i1 [[TMP10]], label [[BB1_NONCHR:%.*]], label [[BB3]], !prof [[PROF18]]1214; CHECK: bb1.nonchr:1215; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[DOTFR2]], 81216; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 01217; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP16]], i32 44, i32 88, !prof [[PROF16]]1218; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2]], [[SUM4_NONCHR_V]]1219; CHECK-NEXT: br label [[BB3]]1220; CHECK: bb3:1221; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[SUM0]], [[ENTRY:%.*]] ], [ [[TMP14]], [[BB1]] ], [ [[SUM2]], [[BB0_SPLIT_NONCHR]] ], [ [[SUM4_NONCHR]], [[BB1_NONCHR]] ]1222; CHECK-NEXT: ret i32 [[SUM6]]1223;1224entry:1225 %0 = load i32, ptr %i1226 %1 = and i32 %0, 2551227 %2 = icmp eq i32 %1, 01228 br i1 %2, label %bb3, label %bb0, !prof !151229 1230bb0:1231 %3 = and i32 %0, 11232 %4 = icmp eq i32 %3, 01233 %5 = add i32 %sum0, 421234 %sum1 = select i1 %4, i32 %sum0, i32 %5, !prof !151235 %6 = and i32 %0, 21236 %7 = icmp eq i32 %6, 01237 %8 = add i32 %sum1, 431238 %sum2 = select i1 %7, i32 %sum1, i32 %8, !prof !151239 %9 = load i32, ptr %i1240 %10 = icmp eq i32 %9, 01241 br i1 %10, label %bb2, label %bb1, !prof !151242 1243bb1:1244 %sum3 = add i32 %sum2, 441245 %11 = and i32 %0, 81246 %12 = icmp eq i32 %11, 01247 %13 = add i32 %sum3, 441248 %sum4 = select i1 %12, i32 %sum3, i32 %13, !prof !151249 br label %bb21250 1251bb2:1252 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]1253 br label %bb31254 1255bb3:1256 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]1257 ret i32 %sum61258}1259 1260; In the second CHR, a condition value depends on a trivial phi that's inserted1261; by the first CHR.1262; Roughly,1263; i0 = *i1264; v2 = (z != 1) ? pred : true // Likely false1265; if (z == 0 & pred) // Likely false1266; foo()1267; j0 = *j1268; sum2 = ((i0 & 2) == j0) ? sum0 : (sum0 + 43) // Likely false1269; sum3 = ((i0 == j0) ? sum0 : (sum0 + 43) // Likely false1270; foo()1271; if ((i0 & 4) == 0) // Unbiased1272; foo()1273; return i0 + sum31274; ->1275; i0 = *i1276; if (z != 1 & (z == 0 & pred)) // First CHR1277; foo()1278; // A trivial phi for i0 is inserted here by the first CHR (which gets removed1279; // later) and the subsequent branch condition (for the second CHR) uses it.1280; j0 = *j1281; if ((i0 & 2) != j0 & i0 != j0) { // Second CHR1282; sum3 = sum0 + 431283; foo()1284; if (i0 & 4) == 0)1285; foo()1286; } else {1287; sum3 = (i0 == j0) ? sum0 : (sum0 + 43)1288; foo()1289; if (i0 & 4) == 0)1290; foo()1291; }1292; return i0 + sum31293define i32 @test_chr_14(ptr %i, ptr %j, i32 %sum0, i1 %pred, i32 %z) !prof !14 {1294; CHECK-LABEL: @test_chr_14(1295; CHECK-NEXT: entry:1296; CHECK-NEXT: [[Z_FR:%.*]] = freeze i32 [[Z:%.*]]1297; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 41298; CHECK-NEXT: [[I0_FR:%.*]] = freeze i32 [[I0]]1299; CHECK-NEXT: [[V1_NOT:%.*]] = icmp eq i32 [[Z_FR]], 11300; CHECK-NEXT: br i1 [[V1_NOT]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1301; CHECK: entry.split.nonchr:1302; CHECK-NEXT: [[PRED_FR:%.*]] = freeze i1 [[PRED:%.*]]1303; CHECK-NEXT: [[V0:%.*]] = icmp eq i32 [[Z_FR]], 01304; CHECK-NEXT: [[V3_NONCHR:%.*]] = and i1 [[V0]], [[PRED_FR]]1305; CHECK-NEXT: br i1 [[V3_NONCHR]], label [[BB0_NONCHR:%.*]], label [[BB1]], !prof [[PROF16]]1306; CHECK: bb0.nonchr:1307; CHECK-NEXT: call void @foo()1308; CHECK-NEXT: br label [[BB1]]1309; CHECK: bb1:1310; CHECK-NEXT: [[J0:%.*]] = load i32, ptr [[J:%.*]], align 41311; CHECK-NEXT: [[J0_FR:%.*]] = freeze i32 [[J0]]1312; CHECK-NEXT: [[V6:%.*]] = and i32 [[I0_FR]], 21313; CHECK-NEXT: [[TMP0:%.*]] = icmp ne i32 [[V6]], [[J0_FR]]1314; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 431315; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[I0_FR]], [[J0_FR]]1316; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP0]], [[TMP1]]1317; CHECK-NEXT: br i1 [[TMP2]], label [[BB1_SPLIT:%.*]], label [[BB1_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1318; CHECK: bb1.split:1319; CHECK-NEXT: call void @foo()1320; CHECK-NEXT: [[V9:%.*]] = and i32 [[I0_FR]], 41321; CHECK-NEXT: [[V10:%.*]] = icmp eq i32 [[V9]], 01322; CHECK-NEXT: br i1 [[V10]], label [[BB3:%.*]], label [[BB2:%.*]]1323; CHECK: bb2:1324; CHECK-NEXT: call void @foo()1325; CHECK-NEXT: br label [[BB3]]1326; CHECK: bb1.split.nonchr:1327; CHECK-NEXT: [[V5_NONCHR:%.*]] = icmp eq i32 [[I0_FR]], [[J0_FR]]1328; CHECK-NEXT: [[SUM3_NONCHR:%.*]] = select i1 [[V5_NONCHR]], i32 [[SUM0]], i32 [[V8]], !prof [[PROF16]]1329; CHECK-NEXT: call void @foo()1330; CHECK-NEXT: [[V9_NONCHR:%.*]] = and i32 [[I0_FR]], 41331; CHECK-NEXT: [[V10_NONCHR:%.*]] = icmp eq i32 [[V9_NONCHR]], 01332; CHECK-NEXT: br i1 [[V10_NONCHR]], label [[BB3]], label [[BB2_NONCHR:%.*]]1333; CHECK: bb2.nonchr:1334; CHECK-NEXT: call void @foo()1335; CHECK-NEXT: br label [[BB3]]1336; CHECK: bb3:1337; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[V8]], [[BB2]] ], [ [[V8]], [[BB1_SPLIT]] ], [ [[SUM3_NONCHR]], [[BB2_NONCHR]] ], [ [[SUM3_NONCHR]], [[BB1_SPLIT_NONCHR]] ]1338; CHECK-NEXT: [[V11:%.*]] = add i32 [[I0_FR]], [[TMP3]]1339; CHECK-NEXT: ret i32 [[V11]]1340;1341entry:1342 %i0 = load i32, ptr %i1343 %v0 = icmp eq i32 %z, 01344 %v1 = icmp ne i32 %z, 11345 %v2 = select i1 %v1, i1 %pred, i1 true, !prof !151346 %v3 = and i1 %v0, %pred1347 br i1 %v3, label %bb0, label %bb1, !prof !151348 1349bb0:1350 call void @foo()1351 br label %bb11352 1353bb1:1354 %j0 = load i32, ptr %j1355 %v6 = and i32 %i0, 21356 %v4 = icmp eq i32 %v6, %j01357 %v8 = add i32 %sum0, 431358 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !151359 %v5 = icmp eq i32 %i0, %j01360 %sum3 = select i1 %v5, i32 %sum0, i32 %v8, !prof !151361 call void @foo()1362 %v9 = and i32 %i0, 41363 %v10 = icmp eq i32 %v9, 01364 br i1 %v10, label %bb3, label %bb21365 1366bb2:1367 call void @foo()1368 br label %bb31369 1370bb3:1371 %v11 = add i32 %i0, %sum31372 ret i32 %v111373}1374 1375; Branch or selects depends on another select. No CHR happens.1376; Roughly,1377; i0 = *i1378; if (z == 0 & ((z != 1) ? pred : true)) { // Likely false1379; foo()1380; j0 = *j1381; sum2 = ((i0 & 2) == j0) ? sum0 : (sum0 + 43) // Likely false1382; sum3 = (i0 == sum2) ? sum2 : (sum0 + 43) // Likely false. This depends on the1383; // previous select.1384; foo()1385; if ((i0 & 4) == 0) // Unbiased1386; foo()1387; return i0 + sum31388; ->1389; (no change)1390define i32 @test_chr_15(ptr %i, ptr %j, i32 %sum0, i1 %pred, i32 %z) !prof !14 {1391; CHECK-LABEL: @test_chr_15(1392; CHECK-NEXT: entry:1393; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 41394; CHECK-NEXT: [[V0:%.*]] = icmp eq i32 [[Z:%.*]], 01395; CHECK-NEXT: [[V3:%.*]] = select i1 [[V0]], i1 [[PRED:%.*]], i1 false1396; CHECK-NEXT: br i1 [[V3]], label [[BB0:%.*]], label [[BB1:%.*]], !prof [[PROF16]]1397; CHECK: bb0:1398; CHECK-NEXT: call void @foo()1399; CHECK-NEXT: br label [[BB1]]1400; CHECK: bb1:1401; CHECK-NEXT: [[J0:%.*]] = load i32, ptr [[J:%.*]], align 41402; CHECK-NEXT: call void @foo()1403; CHECK-NEXT: [[V9:%.*]] = and i32 [[I0]], 41404; CHECK-NEXT: [[V10:%.*]] = icmp eq i32 [[V9]], 01405; CHECK-NEXT: br i1 [[V10]], label [[BB3:%.*]], label [[BB2:%.*]]1406; CHECK: bb2:1407; CHECK-NEXT: call void @foo()1408; CHECK-NEXT: br label [[BB3]]1409; CHECK: bb3:1410; CHECK-NEXT: [[V6:%.*]] = and i32 [[I0]], 21411; CHECK-NEXT: [[V4:%.*]] = icmp eq i32 [[V6]], [[J0]]1412; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 431413; CHECK-NEXT: [[SUM2:%.*]] = select i1 [[V4]], i32 [[SUM0]], i32 [[V8]], !prof [[PROF16]]1414; CHECK-NEXT: [[V5:%.*]] = icmp eq i32 [[I0]], [[SUM2]]1415; CHECK-NEXT: [[SUM3:%.*]] = select i1 [[V5]], i32 [[SUM2]], i32 [[V8]], !prof [[PROF16]]1416; CHECK-NEXT: [[V11:%.*]] = add i32 [[I0]], [[SUM3]]1417; CHECK-NEXT: ret i32 [[V11]]1418;1419entry:1420 %i0 = load i32, ptr %i1421 %v0 = icmp eq i32 %z, 01422 %v1 = icmp ne i32 %z, 11423 %v2 = select i1 %v1, i1 %pred, i1 true, !prof !151424 %v3 = and i1 %v0, %v21425 br i1 %v3, label %bb0, label %bb1, !prof !151426 1427bb0:1428 call void @foo()1429 br label %bb11430 1431bb1:1432 %j0 = load i32, ptr %j1433 %v6 = and i32 %i0, 21434 %v4 = icmp eq i32 %v6, %j01435 %v8 = add i32 %sum0, 431436 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !151437 %v5 = icmp eq i32 %i0, %sum21438 %sum3 = select i1 %v5, i32 %sum2, i32 %v8, !prof !151439 call void @foo()1440 %v9 = and i32 %i0, 41441 %v10 = icmp eq i32 %v9, 01442 br i1 %v10, label %bb3, label %bb21443 1444bb2:1445 call void @foo()1446 br label %bb31447 1448bb3:1449 %v11 = add i32 %i0, %sum31450 ret i32 %v111451}1452 1453; With an existing phi at the exit but a value (%v40) is both alive and is an1454; operand to a phi at the exit block.1455; Roughly,1456; t0 = *i1457; if ((t0 & 1) != 0) // Likely true1458; foo()1459; v40 = t0 + 441460; if ((t0 & 2) != 0) // Likely true1461; v41 = t0 + 991462; foo()1463; }1464; v42 = phi v40, v411465; return v42 + v401466; ->1467; t0 = *i1468; if ((t0 & 3) == 3) // Likely true1469; foo()1470; v40 = t0 + 441471; v41 = t0 + 991472; foo()1473; } else {1474; if ((t0 & 1) != 0) // Likely true1475; foo()1476; v40_nc = t0 + 441477; if ((t0 & 2) != 0) // Likely true1478; v41_nc = t0 + 991479; foo()1480; }1481; }1482; t7 = phi v40, v40_nc1483; v42 = phi v41, v41_nc1484; v43 = v42 + t71485; return v431486define i32 @test_chr_16(ptr %i) !prof !14 {1487; CHECK-LABEL: @test_chr_16(1488; CHECK-NEXT: entry:1489; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 41490; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]1491; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 31492; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 31493; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1494; CHECK: bb0:1495; CHECK-NEXT: call void @foo()1496; CHECK-NEXT: [[V40:%.*]] = add i32 [[DOTFR1]], 441497; CHECK-NEXT: [[V41:%.*]] = add i32 [[DOTFR1]], 991498; CHECK-NEXT: call void @foo()1499; CHECK-NEXT: br label [[BB3:%.*]]1500; CHECK: entry.split.nonchr:1501; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 11502; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 01503; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]1504; CHECK: bb0.nonchr:1505; CHECK-NEXT: call void @foo()1506; CHECK-NEXT: br label [[BB1_NONCHR]]1507; CHECK: bb1.nonchr:1508; CHECK-NEXT: [[V40_NONCHR:%.*]] = add i32 [[DOTFR1]], 441509; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 21510; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 01511; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]1512; CHECK: bb2.nonchr:1513; CHECK-NEXT: [[V41_NONCHR:%.*]] = add i32 [[DOTFR1]], 991514; CHECK-NEXT: call void @foo()1515; CHECK-NEXT: br label [[BB3]]1516; CHECK: bb3:1517; CHECK-NEXT: [[TMP6:%.*]] = phi i32 [ [[V40]], [[BB0]] ], [ [[V40_NONCHR]], [[BB2_NONCHR]] ], [ [[V40_NONCHR]], [[BB1_NONCHR]] ]1518; CHECK-NEXT: [[V42:%.*]] = phi i32 [ [[V41]], [[BB0]] ], [ [[V41_NONCHR]], [[BB2_NONCHR]] ], [ [[V40_NONCHR]], [[BB1_NONCHR]] ]1519; CHECK-NEXT: [[V43:%.*]] = add i32 [[V42]], [[TMP6]]1520; CHECK-NEXT: ret i32 [[V43]]1521;1522entry:1523 %0 = load i32, ptr %i1524 %1 = and i32 %0, 11525 %2 = icmp eq i32 %1, 01526 br i1 %2, label %bb1, label %bb0, !prof !151527 1528bb0:1529 call void @foo()1530 br label %bb11531 1532bb1:1533 %v40 = add i32 %0, 441534 %3 = and i32 %0, 21535 %4 = icmp eq i32 %3, 01536 br i1 %4, label %bb3, label %bb2, !prof !151537 1538bb2:1539 %v41 = add i32 %0, 991540 call void @foo()1541 br label %bb31542 1543bb3:1544 %v42 = phi i32 [ %v41, %bb2 ], [ %v40, %bb1 ]1545 %v43 = add i32 %v42, %v401546 ret i32 %v431547}1548 1549; Two consecutive regions have an entry in the middle of them. No CHR happens.1550; Roughly,1551; if ((i & 4) == 0) {1552; if (!j)1553; goto bb11554; } else {1555; t0 = (i & 1)1556; if (t0 != 0) // Likely true1557; foo()1558; s = (i & 1) + i1559; }1560; bb1:1561; p = phi i, t0, s1562; if ((i & 2) != 0) // Likely true1563; foo()1564; q = p + 21565; }1566; r = phi p, q, i1567; return r1568; ->1569; (no change)1570define i32 @test_chr_17(i32 %i, i1 %j) !prof !14 {1571; CHECK-LABEL: @test_chr_17(1572; CHECK-NEXT: entry:1573; CHECK-NEXT: [[V0:%.*]] = and i32 [[I:%.*]], 41574; CHECK-NEXT: [[V1:%.*]] = icmp eq i32 [[V0]], 01575; CHECK-NEXT: br i1 [[V1]], label [[BBE:%.*]], label [[BBQ:%.*]]1576; CHECK: bbq:1577; CHECK-NEXT: br i1 [[J:%.*]], label [[BB3:%.*]], label [[BB1:%.*]]1578; CHECK: bbe:1579; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[I]], 11580; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 01581; CHECK-NEXT: br i1 [[TMP1]], label [[BB1]], label [[BB0:%.*]], !prof [[PROF16]]1582; CHECK: bb0:1583; CHECK-NEXT: call void @foo()1584; CHECK-NEXT: [[S:%.*]] = add nuw nsw i32 [[TMP0]], [[I]]1585; CHECK-NEXT: br label [[BB1]]1586; CHECK: bb1:1587; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[I]], [[BBQ]] ], [ [[TMP0]], [[BBE]] ], [ [[S]], [[BB0]] ]1588; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[I]], 21589; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 01590; CHECK-NEXT: br i1 [[TMP3]], label [[BB3]], label [[BB2:%.*]], !prof [[PROF16]]1591; CHECK: bb2:1592; CHECK-NEXT: call void @foo()1593; CHECK-NEXT: [[Q:%.*]] = add i32 [[P]], [[TMP2]]1594; CHECK-NEXT: br label [[BB3]]1595; CHECK: bb3:1596; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[P]], [[BB1]] ], [ [[Q]], [[BB2]] ], [ [[I]], [[BBQ]] ]1597; CHECK-NEXT: ret i32 [[R]]1598;1599entry:1600 %v0 = and i32 %i, 41601 %v1 = icmp eq i32 %v0, 01602 br i1 %v1, label %bbe, label %bbq1603 1604bbq:1605 br i1 %j, label %bb3, label %bb11606 1607bbe:1608 %0 = and i32 %i, 11609 %1 = icmp eq i32 %0, 01610 br i1 %1, label %bb1, label %bb0, !prof !151611 1612bb0:1613 call void @foo()1614 %s = add i32 %0, %i1615 br label %bb11616 1617bb1:1618 %p = phi i32 [ %i, %bbq ], [ %0, %bbe ], [ %s, %bb0 ]1619 %2 = and i32 %i, 21620 %3 = icmp eq i32 %2, 01621 br i1 %3, label %bb3, label %bb2, !prof !151622 1623bb2:1624 call void @foo()1625 %q = add i32 %p, %21626 br label %bb31627 1628bb3:1629 %r = phi i32 [ %p, %bb1 ], [ %q, %bb2 ], [ %i, %bbq ]1630 ret i32 %r1631}1632 1633; Select + br, there's a loop and we need to update the user of an inserted phi1634; at the entry block. This is a regression test for a bug that's fixed.1635; Roughly,1636; do {1637; inc1 = phi inc2, 01638; li = *i1639; sum1 = sum0 + 421640; sum2 = ((li & 1) == 0) ? sum0 : sum1 // Likely false1641; inc2 = inc1 + 11642; if ((li & 4) != 0) // Likely true1643; sum3 = sum2 + 441644; sum4 = phi sum1, sum31645; } while (inc2 != 100) // Likely true (loop back)1646; return sum41647; ->1648; do {1649; inc1 = phi tmp2, 0 // The first operand needed to be updated1650; li = *i1651; sum1 = sum0 + 421652; if ((li & 5) == 5) { // Likely true1653; inc2 = inc1 + 11654; sum3 = sum0 + 861655; } else {1656; inc2_nc = inc1 + 11657; if ((li & 4) == 0)1658; sum2_nc = ((li & 1) == 0) ? sum0 : sum11659; sum3_nc = sum2_nc + 441660; }1661; tmp2 = phi inc2, in2c_nc1662; sum4 = phi sum3, sum3_nc, sum11663; } while (tmp2 != 100)1664; return sum41665define i32 @test_chr_18(ptr %i, i32 %sum0) !prof !14 {1666; CHECK-LABEL: @test_chr_18(1667; CHECK-NEXT: entry:1668; CHECK-NEXT: br label [[BB0:%.*]]1669; CHECK: bb0:1670; CHECK-NEXT: [[INC1:%.*]] = phi i32 [ [[TMP2:%.*]], [[BB2:%.*]] ], [ 0, [[ENTRY:%.*]] ]1671; CHECK-NEXT: [[LI:%.*]] = load i32, ptr [[I:%.*]], align 41672; CHECK-NEXT: [[LI_FR:%.*]] = freeze i32 [[LI]]1673; CHECK-NEXT: [[SUM1:%.*]] = add i32 [[SUM0:%.*]], 421674; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[LI_FR]], 51675; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 51676; CHECK-NEXT: br i1 [[TMP1]], label [[BB1:%.*]], label [[BB0_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1677; CHECK: bb1:1678; CHECK-NEXT: [[INC2:%.*]] = add i32 [[INC1]], 11679; CHECK-NEXT: [[SUM3:%.*]] = add i32 [[SUM0]], 861680; CHECK-NEXT: br label [[BB2]]1681; CHECK: bb0.split.nonchr:1682; CHECK-NEXT: [[A4_NONCHR:%.*]] = and i32 [[LI_FR]], 41683; CHECK-NEXT: [[CMP4_NONCHR:%.*]] = icmp eq i32 [[A4_NONCHR]], 01684; CHECK-NEXT: [[INC2_NONCHR:%.*]] = add i32 [[INC1]], 11685; CHECK-NEXT: br i1 [[CMP4_NONCHR]], label [[BB2]], label [[BB1_NONCHR:%.*]], !prof [[PROF16]]1686; CHECK: bb1.nonchr:1687; CHECK-NEXT: [[A1:%.*]] = and i32 [[LI_FR]], 11688; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i32 [[A1]], 01689; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[CMP1_NOT]], i32 [[SUM0]], i32 [[SUM1]], !prof [[PROF16]]1690; CHECK-NEXT: [[SUM3_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], 441691; CHECK-NEXT: br label [[BB2]]1692; CHECK: bb2:1693; CHECK-NEXT: [[TMP2]] = phi i32 [ [[INC2]], [[BB1]] ], [ [[INC2_NONCHR]], [[BB1_NONCHR]] ], [ [[INC2_NONCHR]], [[BB0_SPLIT_NONCHR]] ]1694; CHECK-NEXT: [[SUM4:%.*]] = phi i32 [ [[SUM3]], [[BB1]] ], [ [[SUM3_NONCHR]], [[BB1_NONCHR]] ], [ [[SUM1]], [[BB0_SPLIT_NONCHR]] ]1695; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP2]], 1001696; CHECK-NEXT: br i1 [[CMP]], label [[BB3:%.*]], label [[BB0]], !prof [[PROF16]]1697; CHECK: bb3:1698; CHECK-NEXT: ret i32 [[SUM4]]1699;1700entry:1701 br label %bb01702 1703bb0:1704 %inc1 = phi i32 [ %inc2, %bb2 ], [ 0, %entry ]1705 %li = load i32, ptr %i1706 %a1 = and i32 %li, 11707 %cmp1 = icmp eq i32 %a1, 01708 %sum1 = add i32 %sum0, 421709 %sum2 = select i1 %cmp1, i32 %sum0, i32 %sum1, !prof !151710 %a4 = and i32 %li, 41711 %cmp4 = icmp eq i32 %a4, 01712 %inc2 = add i32 %inc1, 11713 br i1 %cmp4, label %bb2, label %bb1, !prof !151714 1715bb1:1716 %sum3 = add i32 %sum2, 441717 br label %bb21718 1719bb2:1720 %sum4 = phi i32 [ %sum1, %bb0 ], [ %sum3, %bb1 ]1721 %cmp = icmp eq i32 %inc2, 1001722 br i1 %cmp, label %bb3, label %bb0, !prof !151723 1724bb3:1725 ret i32 %sum41726}1727 1728 1729; Selects + Brs. Those share the condition value, which causes the1730; targets/operands of the branch/select to be flipped.1731; Roughly,1732; t0 = *i1733; if ((t0 & 255) != 0) { // Likely true1734; sum1 = ((t0 & 1) == 0) ? sum0 : (sum0 + 42) // Likely false1735; sum2 = ((t0 & 1) == 0) ? sum1 : (sum1 + 42) // Likely false1736; if ((t0 & 1) != 0) { // Likely true1737; sum3 = sum2 + 441738; sum4 = ((t0 & 8) == 0) ? sum3 : (sum3 + 44) // Likely false1739; }1740; sum5 = phi sum2, sum41741; }1742; sum6 = phi sum0, sum51743; return sum61744; ->1745; t0 = *i1746; if ((t0 & 9) == 9) { // Likely true1747; tmp3 = sum0 + 85 // Dead1748; tmp4 = sum0 + 1731749; } else {1750; if ((t0 & 255) != 0) {1751; sum2_nc = ((t0 & 1) == 0) ? sum0 : (sum0 + 85)1752; sum4_nc_v = ((t0 & 8) == 0) ? 44 : 881753; sum4_nc = add sum2_nc + sum4_nc_v1754; }1755; }1756; sum6 = phi tmp4, sum0, sum2_nc, sum4_nc1757; return sum61758define i32 @test_chr_19(ptr %i, i32 %sum0) !prof !14 {1759; CHECK-LABEL: @test_chr_19(1760; CHECK-NEXT: entry:1761; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 41762; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]1763; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 91764; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 91765; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1766; CHECK: bb1:1767; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 1731768; CHECK-NEXT: br label [[BB3:%.*]]1769; CHECK: entry.split.nonchr:1770; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 2551771; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP4]], 01772; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]1773; CHECK: bb0.nonchr:1774; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR1]], 11775; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 01776; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[SUM0]], 851777; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP6]], i32 [[SUM0]], i32 [[TMP7]], !prof [[PROF16]]1778; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[DOTFR1]], 81779; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 01780; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP9]], i32 44, i32 881781; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]1782; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP6]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof [[PROF16]]1783; CHECK-NEXT: br label [[BB3]]1784; CHECK: bb3:1785; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP3]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]1786; CHECK-NEXT: ret i32 [[SUM6]]1787;1788entry:1789 %0 = load i32, ptr %i1790 %1 = and i32 %0, 2551791 %2 = icmp eq i32 %1, 01792 br i1 %2, label %bb3, label %bb0, !prof !151793 1794bb0:1795 %3 = and i32 %0, 11796 %4 = icmp eq i32 %3, 01797 %5 = add i32 %sum0, 421798 %sum1 = select i1 %4, i32 %sum0, i32 %5, !prof !151799 %6 = add i32 %sum1, 431800 %sum2 = select i1 %4, i32 %sum1, i32 %6, !prof !151801 br i1 %4, label %bb2, label %bb1, !prof !151802 1803bb1:1804 %sum3 = add i32 %sum2, 441805 %7 = and i32 %0, 81806 %8 = icmp eq i32 %7, 01807 %9 = add i32 %sum3, 441808 %sum4 = select i1 %8, i32 %sum3, i32 %9, !prof !151809 br label %bb21810 1811bb2:1812 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]1813 br label %bb31814 1815bb3:1816 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]1817 ret i32 %sum61818}1819 1820; Selects. The exit block, which belongs to the top-level region, has a select1821; and causes the top-level region to be the outermost CHR scope with the1822; subscope that includes the entry block with two selects. The outermost CHR1823; scope doesn't see the selects in the entry block as the entry block is in the1824; subscope and incorrectly sets the CHR hoist point to the branch rather than1825; the first select in the entry block and causes the CHR'ed selects ("select i11826; false...") to incorrectly position above the CHR branch. This is testing1827; against a quirk of how the region analysis handles the entry block.1828; Roughly,1829; i0 = *i1830; sum2 = ((i0 & 2) == 0) ? sum0 : (sum0 + 43) // Likely false1831; sum3 = ((i0 & 4) == 0) ? sum2 : (sum2 + 44) // Likely false1832; if (j)1833; foo()1834; i5 = *i1835; v13 = (i5 == 44) ? i5 : sum31836; return v131837; ->1838; i0 = *i1839; if ((i0 & 6) != 6) { // Likely true1840; v9 = sum0 + 871841; if (j)1842; foo()1843; } else {1844; sum2.nc = ((i0 & 2) == 0) ? sum0 : (sum0 + 43)1845; sum3.nc = ((i0 & 4) == 0) ? sum2.nc : (sum2.nc + 44)1846; if (j)1847; foo()1848; }1849; t2 = phi v9, sum3.nc1850; i5 = *i1851; v13 = (i5 == 44) ? 44 : t21852; return v131853define i32 @test_chr_20(ptr %i, i32 %sum0, i1 %j) !prof !14 {1854; CHECK-LABEL: @test_chr_20(1855; CHECK-NEXT: entry:1856; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 41857; CHECK-NEXT: [[I0_FR:%.*]] = freeze i32 [[I0]]1858; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[I0_FR]], 61859; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 61860; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1861; CHECK: entry.split:1862; CHECK-NEXT: [[V9:%.*]] = add i32 [[SUM0:%.*]], 871863; CHECK-NEXT: br i1 [[J:%.*]], label [[BB1:%.*]], label [[BB4:%.*]]1864; CHECK: bb1:1865; CHECK-NEXT: call void @foo()1866; CHECK-NEXT: br label [[BB4]]1867; CHECK: entry.split.nonchr:1868; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0]], 431869; CHECK-NEXT: [[V3:%.*]] = and i32 [[I0_FR]], 21870; CHECK-NEXT: [[V4_NOT:%.*]] = icmp eq i32 [[V3]], 01871; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[V4_NOT]], i32 [[SUM0]], i32 [[V8]], !prof [[PROF16]]1872; CHECK-NEXT: [[V6_NONCHR:%.*]] = and i32 [[I0_FR]], 41873; CHECK-NEXT: [[V5_NONCHR:%.*]] = icmp eq i32 [[V6_NONCHR]], 01874; CHECK-NEXT: [[V9_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], 441875; CHECK-NEXT: [[SUM3_NONCHR:%.*]] = select i1 [[V5_NONCHR]], i32 [[SUM2_NONCHR]], i32 [[V9_NONCHR]], !prof [[PROF16]]1876; CHECK-NEXT: br i1 [[J]], label [[BB1_NONCHR:%.*]], label [[BB4]]1877; CHECK: bb1.nonchr:1878; CHECK-NEXT: call void @foo()1879; CHECK-NEXT: br label [[BB4]]1880; CHECK: bb4:1881; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[V9]], [[BB1]] ], [ [[V9]], [[ENTRY_SPLIT]] ], [ [[SUM3_NONCHR]], [[BB1_NONCHR]] ], [ [[SUM3_NONCHR]], [[ENTRY_SPLIT_NONCHR]] ]1882; CHECK-NEXT: [[I5:%.*]] = load i32, ptr [[I]], align 41883; CHECK-NEXT: [[V12:%.*]] = icmp eq i32 [[I5]], 441884; CHECK-NEXT: [[V13:%.*]] = select i1 [[V12]], i32 44, i32 [[TMP2]], !prof [[PROF16]]1885; CHECK-NEXT: ret i32 [[V13]]1886;1887entry:1888 %i0 = load i32, ptr %i1889 %v3 = and i32 %i0, 21890 %v4 = icmp eq i32 %v3, 01891 %v8 = add i32 %sum0, 431892 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !151893 %v6 = and i32 %i0, 41894 %v5 = icmp eq i32 %v6, 01895 %v9 = add i32 %sum2, 441896 %sum3 = select i1 %v5, i32 %sum2, i32 %v9, !prof !151897 br i1 %j, label %bb1, label %bb41898 1899bb1:1900 call void @foo()1901 br label %bb41902 1903bb4:1904 %i5 = load i32, ptr %i1905 %v12 = icmp eq i32 %i5, 441906 %v13 = select i1 %v12, i32 %i5, i32 %sum3, !prof !151907 ret i32 %v131908}1909 1910; FIXME: This does not currently reach a fix point, because we don't make use1911; of a freeze that is pushed up the instruction chain later.1912 1913; Test the case where two scopes share a common instruction to hoist (%cmp.i).1914; Two scopes would hoist it to their hoist points, but since the outer scope1915; hoists (entry/bb6-9) it first to its hoist point, it'd be wrong (causing bad1916; IR) for the inner scope (bb1-4) to hoist the same instruction to its hoist1917; point.1918; Roughly,1919; if (j != k) {1920; if (i != 2)1921; foo();1922; cmp.i = i == 861923; if (!cmp.i)1924; foo();1925; if (j != i)1926; foo();1927; if (!cmp.i)1928; foo();1929; }1930; return 45;1931define i32 @test_chr_21(i64 %i, i64 %k, i64 %j) "instcombine-no-verify-fixpoint" !prof !14 {1932; CHECK-LABEL: @test_chr_21(1933; CHECK-NEXT: entry:1934; CHECK-NEXT: [[I_FR:%.*]] = freeze i64 [[I:%.*]]1935; CHECK-NEXT: [[J:%.*]] = freeze i64 [[J1:%.*]]1936; CHECK-NEXT: [[K:%.*]] = freeze i64 [[K1:%.*]]1937; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i64 [[J]], [[K]]1938; CHECK-NEXT: [[CMP3:%.*]] = icmp ne i64 [[J]], [[I_FR]]1939; CHECK-NEXT: [[CMP_I:%.*]] = icmp ne i64 [[I_FR]], 861940; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[CMP0]], [[CMP3]]1941; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[CMP_I]]1942; CHECK-NEXT: br i1 [[TMP3]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]1943; CHECK: bb1:1944; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i64 [[I_FR]], 21945; CHECK-NEXT: switch i64 [[I_FR]], label [[BB2:%.*]] [1946; CHECK-NEXT: i64 2, label [[BB3_NONCHR2:%.*]]1947; CHECK-NEXT: i64 86, label [[BB2_NONCHR1:%.*]]1948; CHECK-NEXT: ], !prof [[PROF19:![0-9]+]]1949; CHECK: bb2:1950; CHECK-NEXT: call void @foo()1951; CHECK-NEXT: call void @foo()1952; CHECK-NEXT: br label [[BB7:%.*]]1953; CHECK: bb2.nonchr1:1954; CHECK-NEXT: call void @foo()1955; CHECK-NEXT: br label [[BB3_NONCHR2]]1956; CHECK: bb3.nonchr2:1957; CHECK-NEXT: br i1 [[CMP_I]], label [[BB4_NONCHR3:%.*]], label [[BB7]], !prof [[PROF18]]1958; CHECK: bb4.nonchr3:1959; CHECK-NEXT: call void @foo()1960; CHECK-NEXT: br label [[BB7]]1961; CHECK: bb7:1962; CHECK-NEXT: call void @foo()1963; CHECK-NEXT: call void @foo()1964; CHECK-NEXT: br label [[BB10:%.*]]1965; CHECK: entry.split.nonchr:1966; CHECK-NEXT: br i1 [[CMP0]], label [[BB1_NONCHR:%.*]], label [[BB10]], !prof [[PROF18]]1967; CHECK: bb1.nonchr:1968; CHECK-NEXT: [[CMP2_NONCHR:%.*]] = icmp eq i64 [[I_FR]], 21969; CHECK-NEXT: br i1 [[CMP2_NONCHR]], label [[BB3_NONCHR:%.*]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]1970; CHECK: bb3.nonchr:1971; CHECK-NEXT: [[CMP_I_NONCHR:%.*]] = icmp eq i64 [[I_FR]], 861972; CHECK-NEXT: br i1 [[CMP_I_NONCHR]], label [[BB6_NONCHR:%.*]], label [[BB4_NONCHR:%.*]], !prof [[PROF16]]1973; CHECK: bb6.nonchr:1974; CHECK-NEXT: [[CMP3_NONCHR:%.*]] = icmp eq i64 [[J]], [[I_FR]]1975; CHECK-NEXT: br i1 [[CMP3_NONCHR]], label [[BB8_NONCHR:%.*]], label [[BB7_NONCHR:%.*]], !prof [[PROF16]]1976; CHECK: bb8.nonchr:1977; CHECK-NEXT: br i1 [[CMP_I_NONCHR]], label [[BB10]], label [[BB9_NONCHR:%.*]], !prof [[PROF16]]1978; CHECK: bb9.nonchr:1979; CHECK-NEXT: call void @foo()1980; CHECK-NEXT: br label [[BB10]]1981; CHECK: bb7.nonchr:1982; CHECK-NEXT: call void @foo()1983; CHECK-NEXT: br label [[BB8_NONCHR]]1984; CHECK: bb4.nonchr:1985; CHECK-NEXT: call void @foo()1986; CHECK-NEXT: br label [[BB6_NONCHR]]1987; CHECK: bb2.nonchr:1988; CHECK-NEXT: call void @foo()1989; CHECK-NEXT: br label [[BB3_NONCHR]]1990; CHECK: bb10:1991; CHECK-NEXT: ret i32 451992;1993entry:1994 %cmp0 = icmp eq i64 %j, %k1995 br i1 %cmp0, label %bb10, label %bb1, !prof !151996 1997bb1:1998 %cmp2 = icmp eq i64 %i, 21999 br i1 %cmp2, label %bb3, label %bb2, !prof !152000 2001bb2:2002 call void @foo()2003 br label %bb32004 2005bb3:2006 %cmp.i = icmp eq i64 %i, 862007 br i1 %cmp.i, label %bb5, label %bb4, !prof !152008 2009bb4:2010 call void @foo()2011 br label %bb52012 2013bb5:2014 br label %bb62015 2016bb6:2017 %cmp3 = icmp eq i64 %j, %i2018 br i1 %cmp3, label %bb8, label %bb7, !prof !152019 2020bb7:2021 call void @foo()2022 br label %bb82023 2024bb8:2025 br i1 %cmp.i, label %bb10, label %bb9, !prof !152026 2027bb9:2028 call void @foo()2029 br label %bb102030 2031bb10:2032 ret i32 452033}2034 2035; Test a case with a really long use-def chains. This test checks that it's not2036; really slow and doesn't appear to be hanging.2037define i64 @test_chr_22(i1 %i, ptr %j, i64 %v0) !prof !14 {2038; CHECK-LABEL: @test_chr_22(2039; CHECK-NEXT: bb0:2040; CHECK-NEXT: [[V0_FR:%.*]] = freeze i64 [[V0:%.*]]2041; CHECK-NEXT: [[REASS_ADD:%.*]] = shl i64 [[V0_FR]], 12042; CHECK-NEXT: [[V2:%.*]] = add i64 [[REASS_ADD]], 32043; CHECK-NEXT: [[C1:%.*]] = icmp slt i64 [[V2]], 1002044; CHECK-NEXT: br i1 [[C1]], label [[BB0_SPLIT:%.*]], label [[BB0_SPLIT_NONCHR:%.*]], !prof [[PROF15]]2045; CHECK: common.ret:2046; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i64 [ 99, [[BB0_SPLIT]] ], [ 99, [[BB0_SPLIT_NONCHR]] ]2047; CHECK-NEXT: ret i64 [[COMMON_RET_OP]]2048; CHECK: bb0.split:2049; CHECK-NEXT: [[V299:%.*]] = mul i64 [[V2]], 78600864309770399912050; CHECK-NEXT: store i64 [[V299]], ptr [[J:%.*]], align 42051; CHECK-NEXT: br label [[COMMON_RET:%.*]]2052; CHECK: bb0.split.nonchr:2053; CHECK-NEXT: [[V299_NONCHR:%.*]] = mul i64 [[V2]], 78600864309770399912054; CHECK-NEXT: store i64 [[V299_NONCHR]], ptr [[J]], align 42055; CHECK-NEXT: br label [[COMMON_RET]]2056;2057bb0:2058 %v1 = add i64 %v0, 32059 %v2 = add i64 %v1, %v02060 %c1 = icmp sgt i64 %v2, 992061 %v3 = select i1 %c1, i64 %v1, i64 %v2, !prof !152062 %v4 = add i64 %v2, %v22063 %v5 = add i64 %v4, %v22064 %v6 = add i64 %v5, %v42065 %v7 = add i64 %v6, %v52066 %v8 = add i64 %v7, %v62067 %v9 = add i64 %v8, %v72068 %v10 = add i64 %v9, %v82069 %v11 = add i64 %v10, %v92070 %v12 = add i64 %v11, %v102071 %v13 = add i64 %v12, %v112072 %v14 = add i64 %v13, %v122073 %v15 = add i64 %v14, %v132074 %v16 = add i64 %v15, %v142075 %v17 = add i64 %v16, %v152076 %v18 = add i64 %v17, %v162077 %v19 = add i64 %v18, %v172078 %v20 = add i64 %v19, %v182079 %v21 = add i64 %v20, %v192080 %v22 = add i64 %v21, %v202081 %v23 = add i64 %v22, %v212082 %v24 = add i64 %v23, %v222083 %v25 = add i64 %v24, %v232084 %v26 = add i64 %v25, %v242085 %v27 = add i64 %v26, %v252086 %v28 = add i64 %v27, %v262087 %v29 = add i64 %v28, %v272088 %v30 = add i64 %v29, %v282089 %v31 = add i64 %v30, %v292090 %v32 = add i64 %v31, %v302091 %v33 = add i64 %v32, %v312092 %v34 = add i64 %v33, %v322093 %v35 = add i64 %v34, %v332094 %v36 = add i64 %v35, %v342095 %v37 = add i64 %v36, %v352096 %v38 = add i64 %v37, %v362097 %v39 = add i64 %v38, %v372098 %v40 = add i64 %v39, %v382099 %v41 = add i64 %v40, %v392100 %v42 = add i64 %v41, %v402101 %v43 = add i64 %v42, %v412102 %v44 = add i64 %v43, %v422103 %v45 = add i64 %v44, %v432104 %v46 = add i64 %v45, %v442105 %v47 = add i64 %v46, %v452106 %v48 = add i64 %v47, %v462107 %v49 = add i64 %v48, %v472108 %v50 = add i64 %v49, %v482109 %v51 = add i64 %v50, %v492110 %v52 = add i64 %v51, %v502111 %v53 = add i64 %v52, %v512112 %v54 = add i64 %v53, %v522113 %v55 = add i64 %v54, %v532114 %v56 = add i64 %v55, %v542115 %v57 = add i64 %v56, %v552116 %v58 = add i64 %v57, %v562117 %v59 = add i64 %v58, %v572118 %v60 = add i64 %v59, %v582119 %v61 = add i64 %v60, %v592120 %v62 = add i64 %v61, %v602121 %v63 = add i64 %v62, %v612122 %v64 = add i64 %v63, %v622123 %v65 = add i64 %v64, %v632124 %v66 = add i64 %v65, %v642125 %v67 = add i64 %v66, %v652126 %v68 = add i64 %v67, %v662127 %v69 = add i64 %v68, %v672128 %v70 = add i64 %v69, %v682129 %v71 = add i64 %v70, %v692130 %v72 = add i64 %v71, %v702131 %v73 = add i64 %v72, %v712132 %v74 = add i64 %v73, %v722133 %v75 = add i64 %v74, %v732134 %v76 = add i64 %v75, %v742135 %v77 = add i64 %v76, %v752136 %v78 = add i64 %v77, %v762137 %v79 = add i64 %v78, %v772138 %v80 = add i64 %v79, %v782139 %v81 = add i64 %v80, %v792140 %v82 = add i64 %v81, %v802141 %v83 = add i64 %v82, %v812142 %v84 = add i64 %v83, %v822143 %v85 = add i64 %v84, %v832144 %v86 = add i64 %v85, %v842145 %v87 = add i64 %v86, %v852146 %v88 = add i64 %v87, %v862147 %v89 = add i64 %v88, %v872148 %v90 = add i64 %v89, %v882149 %v91 = add i64 %v90, %v892150 %v92 = add i64 %v91, %v902151 %v93 = add i64 %v92, %v912152 %v94 = add i64 %v93, %v922153 %v95 = add i64 %v94, %v932154 %v96 = add i64 %v95, %v942155 %v97 = add i64 %v96, %v952156 %v98 = add i64 %v97, %v962157 %v99 = add i64 %v98, %v972158 %v100 = add i64 %v99, %v982159 %v101 = add i64 %v100, %v992160 %v102 = add i64 %v101, %v1002161 %v103 = add i64 %v102, %v1012162 %v104 = add i64 %v103, %v1022163 %v105 = add i64 %v104, %v1032164 %v106 = add i64 %v105, %v1042165 %v107 = add i64 %v106, %v1052166 %v108 = add i64 %v107, %v1062167 %v109 = add i64 %v108, %v1072168 %v110 = add i64 %v109, %v1082169 %v111 = add i64 %v110, %v1092170 %v112 = add i64 %v111, %v1102171 %v113 = add i64 %v112, %v1112172 %v114 = add i64 %v113, %v1122173 %v115 = add i64 %v114, %v1132174 %v116 = add i64 %v115, %v1142175 %v117 = add i64 %v116, %v1152176 %v118 = add i64 %v117, %v1162177 %v119 = add i64 %v118, %v1172178 %v120 = add i64 %v119, %v1182179 %v121 = add i64 %v120, %v1192180 %v122 = add i64 %v121, %v1202181 %v123 = add i64 %v122, %v1212182 %v124 = add i64 %v123, %v1222183 %v125 = add i64 %v124, %v1232184 %v126 = add i64 %v125, %v1242185 %v127 = add i64 %v126, %v1252186 %v128 = add i64 %v127, %v1262187 %v129 = add i64 %v128, %v1272188 %v130 = add i64 %v129, %v1282189 %v131 = add i64 %v130, %v1292190 %v132 = add i64 %v131, %v1302191 %v133 = add i64 %v132, %v1312192 %v134 = add i64 %v133, %v1322193 %v135 = add i64 %v134, %v1332194 %v136 = add i64 %v135, %v1342195 %v137 = add i64 %v136, %v1352196 %v138 = add i64 %v137, %v1362197 %v139 = add i64 %v138, %v1372198 %v140 = add i64 %v139, %v1382199 %v141 = add i64 %v140, %v1392200 %v142 = add i64 %v141, %v1402201 %v143 = add i64 %v142, %v1412202 %v144 = add i64 %v143, %v1422203 %v145 = add i64 %v144, %v1432204 %v146 = add i64 %v145, %v1442205 %v147 = add i64 %v146, %v1452206 %v148 = add i64 %v147, %v1462207 %v149 = add i64 %v148, %v1472208 %v150 = add i64 %v149, %v1482209 %v151 = add i64 %v150, %v1492210 %v152 = add i64 %v151, %v1502211 %v153 = add i64 %v152, %v1512212 %v154 = add i64 %v153, %v1522213 %v155 = add i64 %v154, %v1532214 %v156 = add i64 %v155, %v1542215 %v157 = add i64 %v156, %v1552216 %v158 = add i64 %v157, %v1562217 %v159 = add i64 %v158, %v1572218 %v160 = add i64 %v159, %v1582219 %v161 = add i64 %v160, %v1592220 %v162 = add i64 %v161, %v1602221 %v163 = add i64 %v162, %v1612222 %v164 = add i64 %v163, %v1622223 %v165 = add i64 %v164, %v1632224 %v166 = add i64 %v165, %v1642225 %v167 = add i64 %v166, %v1652226 %v168 = add i64 %v167, %v1662227 %v169 = add i64 %v168, %v1672228 %v170 = add i64 %v169, %v1682229 %v171 = add i64 %v170, %v1692230 %v172 = add i64 %v171, %v1702231 %v173 = add i64 %v172, %v1712232 %v174 = add i64 %v173, %v1722233 %v175 = add i64 %v174, %v1732234 %v176 = add i64 %v175, %v1742235 %v177 = add i64 %v176, %v1752236 %v178 = add i64 %v177, %v1762237 %v179 = add i64 %v178, %v1772238 %v180 = add i64 %v179, %v1782239 %v181 = add i64 %v180, %v1792240 %v182 = add i64 %v181, %v1802241 %v183 = add i64 %v182, %v1812242 %v184 = add i64 %v183, %v1822243 %v185 = add i64 %v184, %v1832244 %v186 = add i64 %v185, %v1842245 %v187 = add i64 %v186, %v1852246 %v188 = add i64 %v187, %v1862247 %v189 = add i64 %v188, %v1872248 %v190 = add i64 %v189, %v1882249 %v191 = add i64 %v190, %v1892250 %v192 = add i64 %v191, %v1902251 %v193 = add i64 %v192, %v1912252 %v194 = add i64 %v193, %v1922253 %v195 = add i64 %v194, %v1932254 %v196 = add i64 %v195, %v1942255 %v197 = add i64 %v196, %v1952256 %v198 = add i64 %v197, %v1962257 %v199 = add i64 %v198, %v1972258 %v200 = add i64 %v199, %v1982259 %v201 = add i64 %v200, %v1992260 %v202 = add i64 %v201, %v2002261 %v203 = add i64 %v202, %v2012262 %v204 = add i64 %v203, %v2022263 %v205 = add i64 %v204, %v2032264 %v206 = add i64 %v205, %v2042265 %v207 = add i64 %v206, %v2052266 %v208 = add i64 %v207, %v2062267 %v209 = add i64 %v208, %v2072268 %v210 = add i64 %v209, %v2082269 %v211 = add i64 %v210, %v2092270 %v212 = add i64 %v211, %v2102271 %v213 = add i64 %v212, %v2112272 %v214 = add i64 %v213, %v2122273 %v215 = add i64 %v214, %v2132274 %v216 = add i64 %v215, %v2142275 %v217 = add i64 %v216, %v2152276 %v218 = add i64 %v217, %v2162277 %v219 = add i64 %v218, %v2172278 %v220 = add i64 %v219, %v2182279 %v221 = add i64 %v220, %v2192280 %v222 = add i64 %v221, %v2202281 %v223 = add i64 %v222, %v2212282 %v224 = add i64 %v223, %v2222283 %v225 = add i64 %v224, %v2232284 %v226 = add i64 %v225, %v2242285 %v227 = add i64 %v226, %v2252286 %v228 = add i64 %v227, %v2262287 %v229 = add i64 %v228, %v2272288 %v230 = add i64 %v229, %v2282289 %v231 = add i64 %v230, %v2292290 %v232 = add i64 %v231, %v2302291 %v233 = add i64 %v232, %v2312292 %v234 = add i64 %v233, %v2322293 %v235 = add i64 %v234, %v2332294 %v236 = add i64 %v235, %v2342295 %v237 = add i64 %v236, %v2352296 %v238 = add i64 %v237, %v2362297 %v239 = add i64 %v238, %v2372298 %v240 = add i64 %v239, %v2382299 %v241 = add i64 %v240, %v2392300 %v242 = add i64 %v241, %v2402301 %v243 = add i64 %v242, %v2412302 %v244 = add i64 %v243, %v2422303 %v245 = add i64 %v244, %v2432304 %v246 = add i64 %v245, %v2442305 %v247 = add i64 %v246, %v2452306 %v248 = add i64 %v247, %v2462307 %v249 = add i64 %v248, %v2472308 %v250 = add i64 %v249, %v2482309 %v251 = add i64 %v250, %v2492310 %v252 = add i64 %v251, %v2502311 %v253 = add i64 %v252, %v2512312 %v254 = add i64 %v253, %v2522313 %v255 = add i64 %v254, %v2532314 %v256 = add i64 %v255, %v2542315 %v257 = add i64 %v256, %v2552316 %v258 = add i64 %v257, %v2562317 %v259 = add i64 %v258, %v2572318 %v260 = add i64 %v259, %v2582319 %v261 = add i64 %v260, %v2592320 %v262 = add i64 %v261, %v2602321 %v263 = add i64 %v262, %v2612322 %v264 = add i64 %v263, %v2622323 %v265 = add i64 %v264, %v2632324 %v266 = add i64 %v265, %v2642325 %v267 = add i64 %v266, %v2652326 %v268 = add i64 %v267, %v2662327 %v269 = add i64 %v268, %v2672328 %v270 = add i64 %v269, %v2682329 %v271 = add i64 %v270, %v2692330 %v272 = add i64 %v271, %v2702331 %v273 = add i64 %v272, %v2712332 %v274 = add i64 %v273, %v2722333 %v275 = add i64 %v274, %v2732334 %v276 = add i64 %v275, %v2742335 %v277 = add i64 %v276, %v2752336 %v278 = add i64 %v277, %v2762337 %v279 = add i64 %v278, %v2772338 %v280 = add i64 %v279, %v2782339 %v281 = add i64 %v280, %v2792340 %v282 = add i64 %v281, %v2802341 %v283 = add i64 %v282, %v2812342 %v284 = add i64 %v283, %v2822343 %v285 = add i64 %v284, %v2832344 %v286 = add i64 %v285, %v2842345 %v287 = add i64 %v286, %v2852346 %v288 = add i64 %v287, %v2862347 %v289 = add i64 %v288, %v2872348 %v290 = add i64 %v289, %v2882349 %v291 = add i64 %v290, %v2892350 %v292 = add i64 %v291, %v2902351 %v293 = add i64 %v292, %v2912352 %v294 = add i64 %v293, %v2922353 %v295 = add i64 %v294, %v2932354 %v296 = add i64 %v295, %v2942355 %v297 = add i64 %v296, %v2952356 %v298 = add i64 %v297, %v2962357 %v299 = add i64 %v298, %v2972358 %v300 = add i64 %v299, %v2982359 %v301 = icmp eq i64 %v300, 1002360 %v302 = select i1 %v301, i64 %v298, i64 %v299, !prof !152361 store i64 %v302, ptr %j2362 ret i64 992363}2364 2365; Test a case with a really long use-def chains. This test checks that it's not2366; really slow and doesn't appear to be hanging. This is different from2367; test_chr_22 in that it has nested control structures (multiple scopes) and2368; covers additional code.2369define i64 @test_chr_23(i64 %v0) !prof !14 {2370; CHECK-LABEL: @test_chr_23(2371; CHECK-NEXT: entry:2372; CHECK-NEXT: [[V0_FR:%.*]] = freeze i64 [[V0:%.*]]2373; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[V0_FR]], 502374; CHECK-NEXT: [[V10_NOT:%.*]] = icmp eq i64 [[TMP0]], -502375; CHECK-NEXT: ret i64 992376;2377entry:2378 %v1 = add i64 %v0, 32379 %v2 = add i64 %v1, %v12380 %v3 = add i64 %v2, %v12381 %v4 = add i64 %v2, %v32382 %v5 = add i64 %v4, %v22383 %v6 = add i64 %v5, %v42384 %v7 = add i64 %v6, %v52385 %v8 = add i64 %v7, %v62386 %v9 = add i64 %v8, %v72387 %v10 = icmp eq i64 %v9, 1002388 br i1 %v10, label %body, label %end, !prof !152389 2390body:2391 %v1_0 = add i64 %v9, 32392 %v2_0 = add i64 %v1_0, %v1_02393 %v3_0 = add i64 %v2_0, %v1_02394 %v4_0 = add i64 %v2_0, %v3_02395 %v5_0 = add i64 %v4_0, %v2_02396 %v6_0 = add i64 %v5_0, %v4_02397 %v7_0 = add i64 %v6_0, %v5_02398 %v8_0 = add i64 %v7_0, %v6_02399 %v9_0 = add i64 %v8_0, %v7_02400 %v10_0 = icmp eq i64 %v9_0, 1002401 br i1 %v10_0, label %body.1, label %end, !prof !152402 2403body.1:2404 %v1_1 = add i64 %v9_0, 32405 %v2_1 = add i64 %v1_1, %v1_12406 %v3_1 = add i64 %v2_1, %v1_12407 %v4_1 = add i64 %v2_1, %v3_12408 %v5_1 = add i64 %v4_1, %v2_12409 %v6_1 = add i64 %v5_1, %v4_12410 %v7_1 = add i64 %v6_1, %v5_12411 %v8_1 = add i64 %v7_1, %v6_12412 %v9_1 = add i64 %v8_1, %v7_12413 %v10_1 = icmp eq i64 %v9_1, 1002414 br i1 %v10_1, label %body.2, label %end, !prof !152415 2416body.2:2417 %v1_2 = add i64 %v9_1, 32418 %v2_2 = add i64 %v1_2, %v1_22419 %v3_2 = add i64 %v2_2, %v1_22420 %v4_2 = add i64 %v2_2, %v3_22421 %v5_2 = add i64 %v4_2, %v2_22422 %v6_2 = add i64 %v5_2, %v4_22423 %v7_2 = add i64 %v6_2, %v5_22424 %v8_2 = add i64 %v7_2, %v6_22425 %v9_2 = add i64 %v8_2, %v7_22426 %v10_2 = icmp eq i64 %v9_2, 1002427 br i1 %v10_2, label %body.3, label %end, !prof !152428 2429body.3:2430 %v1_3 = add i64 %v9_2, 32431 %v2_3 = add i64 %v1_3, %v1_32432 %v3_3 = add i64 %v2_3, %v1_32433 %v4_3 = add i64 %v2_3, %v3_32434 %v5_3 = add i64 %v4_3, %v2_32435 %v6_3 = add i64 %v5_3, %v4_32436 %v7_3 = add i64 %v6_3, %v5_32437 %v8_3 = add i64 %v7_3, %v6_32438 %v9_3 = add i64 %v8_3, %v7_32439 %v10_3 = icmp eq i64 %v9_3, 1002440 br i1 %v10_3, label %body.4, label %end, !prof !152441 2442body.4:2443 %v1_4 = add i64 %v9_3, 32444 %v2_4 = add i64 %v1_4, %v1_42445 %v3_4 = add i64 %v2_4, %v1_42446 %v4_4 = add i64 %v2_4, %v3_42447 %v5_4 = add i64 %v4_4, %v2_42448 %v6_4 = add i64 %v5_4, %v4_42449 %v7_4 = add i64 %v6_4, %v5_42450 %v8_4 = add i64 %v7_4, %v6_42451 %v9_4 = add i64 %v8_4, %v7_42452 %v10_4 = icmp eq i64 %v9_4, 1002453 br i1 %v10_4, label %body.5, label %end, !prof !152454 2455body.5:2456 %v1_5 = add i64 %v9_4, 32457 %v2_5 = add i64 %v1_5, %v1_52458 %v3_5 = add i64 %v2_5, %v1_52459 %v4_5 = add i64 %v2_5, %v3_52460 %v5_5 = add i64 %v4_5, %v2_52461 %v6_5 = add i64 %v5_5, %v4_52462 %v7_5 = add i64 %v6_5, %v5_52463 %v8_5 = add i64 %v7_5, %v6_52464 %v9_5 = add i64 %v8_5, %v7_52465 %v10_5 = icmp eq i64 %v9_5, 1002466 br i1 %v10_5, label %body.6, label %end, !prof !152467 2468body.6:2469 %v1_6 = add i64 %v9_5, 32470 %v2_6 = add i64 %v1_6, %v1_62471 %v3_6 = add i64 %v2_6, %v1_62472 %v4_6 = add i64 %v2_6, %v3_62473 %v5_6 = add i64 %v4_6, %v2_62474 %v6_6 = add i64 %v5_6, %v4_62475 %v7_6 = add i64 %v6_6, %v5_62476 %v8_6 = add i64 %v7_6, %v6_62477 %v9_6 = add i64 %v8_6, %v7_62478 %v10_6 = icmp eq i64 %v9_6, 1002479 br i1 %v10_6, label %body.7, label %end, !prof !152480 2481body.7:2482 %v1_7 = add i64 %v9_6, 32483 %v2_7 = add i64 %v1_7, %v1_72484 %v3_7 = add i64 %v2_7, %v1_72485 %v4_7 = add i64 %v2_7, %v3_72486 %v5_7 = add i64 %v4_7, %v2_72487 %v6_7 = add i64 %v5_7, %v4_72488 %v7_7 = add i64 %v6_7, %v5_72489 %v8_7 = add i64 %v7_7, %v6_72490 %v9_7 = add i64 %v8_7, %v7_72491 %v10_7 = icmp eq i64 %v9_7, 1002492 br i1 %v10_7, label %body.8, label %end, !prof !152493 2494body.8:2495 %v1_8 = add i64 %v9_7, 32496 %v2_8 = add i64 %v1_8, %v1_82497 %v3_8 = add i64 %v2_8, %v1_82498 %v4_8 = add i64 %v2_8, %v3_82499 %v5_8 = add i64 %v4_8, %v2_82500 %v6_8 = add i64 %v5_8, %v4_82501 %v7_8 = add i64 %v6_8, %v5_82502 %v8_8 = add i64 %v7_8, %v6_82503 %v9_8 = add i64 %v8_8, %v7_82504 %v10_8 = icmp eq i64 %v9_8, 1002505 br i1 %v10_8, label %body.9, label %end, !prof !152506 2507body.9:2508 %v1_9 = add i64 %v9_8, 32509 %v2_9 = add i64 %v1_9, %v1_92510 %v3_9 = add i64 %v2_9, %v1_92511 %v4_9 = add i64 %v2_9, %v3_92512 %v5_9 = add i64 %v4_9, %v2_92513 %v6_9 = add i64 %v5_9, %v4_92514 %v7_9 = add i64 %v6_9, %v5_92515 %v8_9 = add i64 %v7_9, %v6_92516 %v9_9 = add i64 %v8_9, %v7_92517 br label %end2518 2519end:2520 ret i64 992521}2522 2523; Test to not crash upon a 0:0 branch_weight metadata.2524define void @test_chr_24(ptr %i) !prof !14 {2525; CHECK-LABEL: @test_chr_24(2526; CHECK-NEXT: entry:2527; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 42528; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 12529; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 02530; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[BB0:%.*]], !prof [[PROF20:![0-9]+]]2531; CHECK: bb0:2532; CHECK-NEXT: call void @foo()2533; CHECK-NEXT: br label [[BB1]]2534; CHECK: bb1:2535; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 22536; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 02537; CHECK-NEXT: br i1 [[TMP4]], label [[BB3:%.*]], label [[BB2:%.*]], !prof [[PROF20]]2538; CHECK: bb2:2539; CHECK-NEXT: call void @foo()2540; CHECK-NEXT: br label [[BB3]]2541; CHECK: bb3:2542; CHECK-NEXT: ret void2543;2544entry:2545 %0 = load i32, ptr %i2546 %1 = and i32 %0, 12547 %2 = icmp eq i32 %1, 02548 br i1 %2, label %bb1, label %bb0, !prof !172549 2550bb0:2551 call void @foo()2552 br label %bb12553 2554bb1:2555 %3 = and i32 %0, 22556 %4 = icmp eq i32 %3, 02557 br i1 %4, label %bb3, label %bb2, !prof !172558 2559bb2:2560 call void @foo()2561 br label %bb32562 2563bb3:2564 ret void2565}2566 2567; Test that chr will skip this function when addresses are taken on basic blocks.2568@gototable1 = weak_odr dso_local local_unnamed_addr constant [2 x ptr] [ptr blockaddress(@test_chr_with_bbs_address_taken1, %bb3), ptr blockaddress(@test_chr_with_bbs_address_taken1, %bb3)]2569define void @test_chr_with_bbs_address_taken1(ptr %i) !prof !14 {2570; CHECK-LABEL: @test_chr_with_bbs_address_taken1(2571; CHECK-NEXT: entry:2572; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 42573; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 12574; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 02575; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[BB0:%.*]], !prof [[PROF16]]2576; CHECK: bb0:2577; CHECK-NEXT: call void @foo()2578; CHECK-NEXT: br label [[BB1]]2579; CHECK: bb1:2580; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 22581; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 02582; CHECK-NEXT: br i1 [[TMP4]], label [[BB4:%.*]], label [[BB2:%.*]], !prof [[PROF16]]2583; CHECK: bb2:2584; CHECK-NEXT: call void @foo()2585; CHECK-NEXT: br label [[BB4]]2586; CHECK: bb4:2587; CHECK-NEXT: ret void2588;2589entry:2590 %0 = load i32, ptr %i2591 %1 = and i32 %0, 12592 %2 = icmp eq i32 %1, 02593 br i1 %2, label %bb1, label %bb0, !prof !152594 2595bb0:2596 call void @foo()2597 br label %bb12598 2599bb1:2600 %3 = and i32 %0, 22601 %4 = icmp eq i32 %3, 02602 br i1 %4, label %bb4, label %bb2, !prof !152603 2604bb2:2605 call void @foo()2606 indirectbr ptr %i, [label %bb3, label %bb3]2607 2608bb3:2609 br label %bb42610 2611bb4:2612 ret void2613}2614 2615; Test that chr will still optimize the first 2 regions,2616; but will skip the last one due to basic blocks have address taken.2617@gototable2 = weak_odr dso_local local_unnamed_addr constant [2 x ptr] [ptr blockaddress(@test_chr_with_bbs_address_taken2, %bb5), ptr blockaddress(@test_chr_with_bbs_address_taken2, %bb5)]2618define void @test_chr_with_bbs_address_taken2(ptr %i) !prof !14 {2619; CHECK-LABEL: @test_chr_with_bbs_address_taken2(2620; CHECK-NEXT: entry:2621; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 42622; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]2623; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 32624; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 32625; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]2626; CHECK: bb0:2627; CHECK-NEXT: call void @foo()2628; CHECK-NEXT: call void @foo()2629; CHECK-NEXT: br label [[BB6:%.*]]2630; CHECK: entry.split.nonchr:2631; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 12632; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 02633; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]2634; CHECK: bb0.nonchr:2635; CHECK-NEXT: call void @foo()2636; CHECK-NEXT: br label [[BB1_NONCHR]]2637; CHECK: bb1.nonchr:2638; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 22639; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 02640; CHECK-NEXT: br i1 [[TMP5]], label [[BB6]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]2641; CHECK: bb2.nonchr:2642; CHECK-NEXT: call void @foo()2643; CHECK-NEXT: br label [[BB6]]2644; CHECK: bb6:2645; CHECK-NEXT: ret void2646;2647entry:2648 %0 = load i32, ptr %i2649 %1 = and i32 %0, 12650 %2 = icmp eq i32 %1, 02651 br i1 %2, label %bb1, label %bb0, !prof !152652 2653bb0:2654 call void @foo()2655 br label %bb12656 2657bb1:2658 %3 = and i32 %0, 22659 %4 = icmp eq i32 %3, 02660 br i1 %4, label %bb3, label %bb2, !prof !152661 2662bb2:2663 call void @foo()2664 br label %bb32665 2666bb3:2667 %5 = and i32 %0, 22668 %6 = icmp eq i32 %5, 02669 br i1 %6, label %bb6, label %bb4, !prof !152670 2671bb4:2672 indirectbr ptr %i, [label %bb5, label %bb5]2673 2674bb5:2675 br label %bb62676 2677bb6:2678 ret void2679}2680 2681 2682!llvm.module.flags = !{!0}2683!0 = !{i32 1, !"ProfileSummary", !1}2684!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}2685!2 = !{!"ProfileFormat", !"InstrProf"}2686!3 = !{!"TotalCount", i64 10000}2687!4 = !{!"MaxCount", i64 10}2688!5 = !{!"MaxInternalCount", i64 1}2689!6 = !{!"MaxFunctionCount", i64 1000}2690!7 = !{!"NumCounts", i64 3}2691!8 = !{!"NumFunctions", i64 3}2692!9 = !{!"DetailedSummary", !10}2693!10 = !{!11, !12, !13}2694!11 = !{i32 10000, i64 100, i32 1}2695!12 = !{i32 999000, i64 100, i32 1}2696!13 = !{i32 999999, i64 1, i32 2}2697 2698!14 = !{!"function_entry_count", i64 100}2699!15 = !{!"branch_weights", i32 0, i32 1}2700!16 = !{!"branch_weights", i32 1, i32 1}2701!17 = !{!"branch_weights", i32 0, i32 0}2702; CHECK: !15 = !{!"branch_weights", i32 1000, i32 0}2703; CHECK: !16 = !{!"branch_weights", i32 0, i32 1}2704; CHECK: !17 = !{!"branch_weights", i32 1, i32 1}2705; CHECK: !18 = !{!"branch_weights", i32 1, i32 0}2706