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1; RUN: opt < %s -passes=pgo-instr-gen -pgo-instrument-entry=false -S | FileCheck %s --check-prefixes=GEN,NOTENTRY2; RUN: llvm-profdata merge %S/Inputs/switch.proftext -o %t.profdata3; RUN: opt < %s -passes=pgo-instr-use -pgo-instrument-entry=false -pgo-test-profile-file=%t.profdata -S | FileCheck %s --check-prefix=USE4; RUN: opt < %s -passes=pgo-instr-gen -pgo-instrument-entry=true -S | FileCheck %s --check-prefixes=GEN,ENTRY5; RUN: llvm-profdata merge %S/Inputs/switch_entry.proftext -o %t.profdata6; RUN: opt < %s -passes=pgo-instr-use -pgo-instrument-entry=true -pgo-test-profile-file=%t.profdata -S | FileCheck %s --check-prefix=USE7target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"8target triple = "x86_64-unknown-linux-gnu"9 10; GEN: $__llvm_profile_raw_version = comdat any11; GEN: @__llvm_profile_raw_version = hidden constant i64 {{[0-9]+}}, comdat12; GEN: @__profn_test_switch = private constant [11 x i8] c"test_switch"13 14define void @test_switch(i32 %i) {15entry:16; GEN: entry:17; NOTENTRY-NOT: call void @llvm.instrprof.increment18; ENTRY: call void @llvm.instrprof.increment(ptr @__profn_test_switch, i64 {{[0-9]+}}, i32 4, i32 0)19 switch i32 %i, label %sw.default [20 i32 1, label %sw.bb21 i32 2, label %sw.bb122 i32 3, label %sw.bb223 ]24; USE: ]25; USE-SAME: !prof ![[BW_SWITCH:[0-9]+]]26; USE: ![[BW_SWITCH]] = !{!"branch_weights", i32 3, i32 2, i32 0, i32 5}27 28sw.bb:29; GEN: sw.bb:30; GEN: call void @llvm.instrprof.increment(ptr @__profn_test_switch, i64 {{[0-9]+}}, i32 4, i32 2)31 br label %sw.epilog32 33sw.bb1:34; GEN: sw.bb1:35; NOTENTRY: call void @llvm.instrprof.increment(ptr @__profn_test_switch, i64 {{[0-9]+}}, i32 4, i32 0)36; ENTRY-NOT: call void @llvm.instrprof.increment37 br label %sw.epilog38 39sw.bb2:40; GEN: sw.bb2:41; GEN: call void @llvm.instrprof.increment(ptr @__profn_test_switch, i64 {{[0-9]+}}, i32 4, i32 1)42 br label %sw.epilog43 44sw.default:45; GEN: sw.default:46; GEN: call void @llvm.instrprof.increment(ptr @__profn_test_switch, i64 {{[0-9]+}}, i32 4, i32 3)47 br label %sw.epilog48 49sw.epilog:50; GEN: sw.epilog:51; GEN-NOT: call void @llvm.instrprof.increment52 ret void53; GEN: ret void54}55