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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -passes="default<O3>" -mcpu=neoverse-v2 -S < %s | FileCheck %s3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"5target triple = "aarch64"6 7define void @same_op2(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {8; CHECK-LABEL: define void @same_op2(9; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {10; CHECK-NEXT: [[ENTRY:.*]]:11; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]12; CHECK: [[VECTOR_BODY]]:13; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]14; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 115; CHECK-NEXT: [[TMP0:%.*]] = or disjoint i64 [[OFFSET_IDX]], 816; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[OFFSET_IDX]]17; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[TMP0]]18; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x float>, ptr [[TMP1]], align 419; CHECK-NEXT: [[WIDE_VEC15:%.*]] = load <8 x float>, ptr [[TMP2]], align 420; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[OFFSET_IDX]]21; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[TMP0]]22; CHECK-NEXT: [[WIDE_VEC18:%.*]] = load <8 x float>, ptr [[TMP3]], align 423; CHECK-NEXT: [[WIDE_VEC21:%.*]] = load <8 x float>, ptr [[TMP4]], align 424; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[OFFSET_IDX]]25; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[TMP0]]26; CHECK-NEXT: [[WIDE_VEC24:%.*]] = load <8 x float>, ptr [[TMP5]], align 427; CHECK-NEXT: [[WIDE_VEC27:%.*]] = load <8 x float>, ptr [[TMP6]], align 428; CHECK-NEXT: [[TMP7:%.*]] = fmul fast <8 x float> [[WIDE_VEC18]], [[WIDE_VEC]]29; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = fadd fast <8 x float> [[WIDE_VEC24]], [[TMP7]]30; CHECK-NEXT: store <8 x float> [[INTERLEAVED_VEC]], ptr [[TMP5]], align 431; CHECK-NEXT: [[TMP8:%.*]] = fmul fast <8 x float> [[WIDE_VEC21]], [[WIDE_VEC15]]32; CHECK-NEXT: [[INTERLEAVED_VEC30:%.*]] = fadd fast <8 x float> [[WIDE_VEC27]], [[TMP8]]33; CHECK-NEXT: store <8 x float> [[INTERLEAVED_VEC30]], ptr [[TMP6]], align 434; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 835; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 57636; CHECK-NEXT: br i1 [[TMP9]], label %[[FOR_END13:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]37; CHECK: [[FOR_END13]]:38; CHECK-NEXT: ret void39;40entry:41 %a.addr = alloca ptr, align 842 %b.addr = alloca ptr, align 843 %c.addr = alloca ptr, align 844 %N = alloca i32, align 445 %i = alloca i32, align 446 %j = alloca i32, align 447 store ptr %a, ptr %a.addr, align 848 store ptr %b, ptr %b.addr, align 849 store ptr %c, ptr %c.addr, align 850 store i32 2, ptr %N, align 451 store i32 0, ptr %i, align 452 br label %for.cond53 54for.cond: ; preds = %for.inc11, %entry55 %0 = load i32, ptr %i, align 456 %cmp = icmp slt i32 %0, 115257 br i1 %cmp, label %for.body, label %for.end1358 59for.body: ; preds = %for.cond60 store i32 0, ptr %j, align 461 br label %for.cond162 63for.cond1: ; preds = %for.inc, %for.body64 %1 = load i32, ptr %j, align 465 %cmp2 = icmp slt i32 %1, 266 br i1 %cmp2, label %for.body3, label %for.end67 68for.body3: ; preds = %for.cond169 %2 = load ptr, ptr %c.addr, align 870 %3 = load i32, ptr %i, align 471 %4 = load i32, ptr %j, align 472 %add = add nsw i32 %3, %473 %idxprom = sext i32 %add to i6474 %arrayidx = getelementptr inbounds float, ptr %2, i64 %idxprom75 %5 = load float, ptr %arrayidx, align 476 %6 = load ptr, ptr %b.addr, align 877 %7 = load i32, ptr %i, align 478 %8 = load i32, ptr %j, align 479 %add4 = add nsw i32 %7, %880 %idxprom5 = sext i32 %add4 to i6481 %arrayidx6 = getelementptr inbounds float, ptr %6, i64 %idxprom582 %9 = load float, ptr %arrayidx6, align 483 %mul = fmul fast float %5, %984 %10 = load ptr, ptr %a.addr, align 885 %11 = load i32, ptr %i, align 486 %12 = load i32, ptr %j, align 487 %add7 = add nsw i32 %11, %1288 %idxprom8 = sext i32 %add7 to i6489 %arrayidx9 = getelementptr inbounds float, ptr %10, i64 %idxprom890 %13 = load float, ptr %arrayidx9, align 491 %add10 = fadd fast float %13, %mul92 store float %add10, ptr %arrayidx9, align 493 br label %for.inc94 95for.inc: ; preds = %for.body396 %14 = load i32, ptr %j, align 497 %inc = add nsw i32 %14, 198 store i32 %inc, ptr %j, align 499 br label %for.cond1100 101for.end: ; preds = %for.cond1102 br label %for.inc11103 104for.inc11: ; preds = %for.end105 %15 = load i32, ptr %i, align 4106 %add12 = add nsw i32 %15, 2107 store i32 %add12, ptr %i, align 4108 br label %for.cond109 110for.end13: ; preds = %for.cond111 ret void112}113 114 115define void @same_op2_splat(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {116; CHECK-LABEL: define void @same_op2_splat(117; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0]] {118; CHECK-NEXT: [[ENTRY:.*]]:119; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[C]], align 4120; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0121; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <8 x i32> zeroinitializer122; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <8 x i32> zeroinitializer123; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]124; CHECK: [[VECTOR_BODY]]:125; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]126; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1127; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i64 [[OFFSET_IDX]], 8128; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[OFFSET_IDX]]129; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[TMP3]]130; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x float>, ptr [[TMP4]], align 4131; CHECK-NEXT: [[WIDE_VEC13:%.*]] = load <8 x float>, ptr [[TMP5]], align 4132; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[OFFSET_IDX]]133; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[TMP3]]134; CHECK-NEXT: [[WIDE_VEC16:%.*]] = load <8 x float>, ptr [[TMP6]], align 4135; CHECK-NEXT: [[WIDE_VEC19:%.*]] = load <8 x float>, ptr [[TMP7]], align 4136; CHECK-NEXT: [[TMP8:%.*]] = fmul fast <8 x float> [[WIDE_VEC]], [[TMP1]]137; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = fadd fast <8 x float> [[WIDE_VEC16]], [[TMP8]]138; CHECK-NEXT: store <8 x float> [[INTERLEAVED_VEC]], ptr [[TMP6]], align 4139; CHECK-NEXT: [[TMP9:%.*]] = fmul fast <8 x float> [[WIDE_VEC13]], [[TMP2]]140; CHECK-NEXT: [[INTERLEAVED_VEC22:%.*]] = fadd fast <8 x float> [[WIDE_VEC19]], [[TMP9]]141; CHECK-NEXT: store <8 x float> [[INTERLEAVED_VEC22]], ptr [[TMP7]], align 4142; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8143; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 576144; CHECK-NEXT: br i1 [[TMP10]], label %[[FOR_END11:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]145; CHECK: [[FOR_END11]]:146; CHECK-NEXT: ret void147;148entry:149 %a.addr = alloca ptr, align 8150 %b.addr = alloca ptr, align 8151 %c.addr = alloca ptr, align 8152 %N = alloca i32, align 4153 %i = alloca i32, align 4154 %j = alloca i32, align 4155 store ptr %a, ptr %a.addr, align 8156 store ptr %b, ptr %b.addr, align 8157 store ptr %c, ptr %c.addr, align 8158 store i32 2, ptr %N, align 4159 store i32 0, ptr %i, align 4160 br label %for.cond161 162for.cond: ; preds = %for.inc9, %entry163 %0 = load i32, ptr %i, align 4164 %cmp = icmp slt i32 %0, 1152165 br i1 %cmp, label %for.body, label %for.end11166 167for.body: ; preds = %for.cond168 store i32 0, ptr %j, align 4169 br label %for.cond1170 171for.cond1: ; preds = %for.inc, %for.body172 %1 = load i32, ptr %j, align 4173 %cmp2 = icmp slt i32 %1, 2174 br i1 %cmp2, label %for.body3, label %for.end175 176for.body3: ; preds = %for.cond1177 %2 = load ptr, ptr %c.addr, align 8178 %arrayidx = getelementptr inbounds float, ptr %2, i64 0179 %3 = load float, ptr %arrayidx, align 4180 %4 = load ptr, ptr %b.addr, align 8181 %5 = load i32, ptr %i, align 4182 %6 = load i32, ptr %j, align 4183 %add = add nsw i32 %5, %6184 %idxprom = sext i32 %add to i64185 %arrayidx4 = getelementptr inbounds float, ptr %4, i64 %idxprom186 %7 = load float, ptr %arrayidx4, align 4187 %mul = fmul fast float %3, %7188 %8 = load ptr, ptr %a.addr, align 8189 %9 = load i32, ptr %i, align 4190 %10 = load i32, ptr %j, align 4191 %add5 = add nsw i32 %9, %10192 %idxprom6 = sext i32 %add5 to i64193 %arrayidx7 = getelementptr inbounds float, ptr %8, i64 %idxprom6194 %11 = load float, ptr %arrayidx7, align 4195 %add8 = fadd fast float %11, %mul196 store float %add8, ptr %arrayidx7, align 4197 br label %for.inc198 199for.inc: ; preds = %for.body3200 %12 = load i32, ptr %j, align 4201 %inc = add nsw i32 %12, 1202 store i32 %inc, ptr %j, align 4203 br label %for.cond1204 205for.end: ; preds = %for.cond1206 br label %for.inc9207 208for.inc9: ; preds = %for.end209 %13 = load i32, ptr %i, align 4210 %add10 = add nsw i32 %13, 2211 store i32 %add10, ptr %i, align 4212 br label %for.cond213 214for.end11: ; preds = %for.cond215 ret void216}217 218 219define void @same_op3(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {220; CHECK-LABEL: define void @same_op3(221; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0]] {222; CHECK-NEXT: [[ENTRY:.*]]:223; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]224; CHECK: [[VECTOR_BODY]]:225; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]226; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 3227; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[OFFSET_IDX]]228; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <12 x float>, ptr [[TMP0]], align 4229; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[OFFSET_IDX]]230; CHECK-NEXT: [[WIDE_VEC16:%.*]] = load <12 x float>, ptr [[TMP1]], align 4231; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[OFFSET_IDX]]232; CHECK-NEXT: [[WIDE_VEC20:%.*]] = load <12 x float>, ptr [[TMP2]], align 4233; CHECK-NEXT: [[TMP3:%.*]] = fmul fast <12 x float> [[WIDE_VEC16]], [[WIDE_VEC]]234; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = fadd fast <12 x float> [[WIDE_VEC20]], [[TMP3]]235; CHECK-NEXT: store <12 x float> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 4236; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4237; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 384238; CHECK-NEXT: br i1 [[TMP4]], label %[[FOR_END13:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]239; CHECK: [[FOR_END13]]:240; CHECK-NEXT: ret void241;242entry:243 %a.addr = alloca ptr, align 8244 %b.addr = alloca ptr, align 8245 %c.addr = alloca ptr, align 8246 %N = alloca i32, align 4247 %i = alloca i32, align 4248 %j = alloca i32, align 4249 store ptr %a, ptr %a.addr, align 8250 store ptr %b, ptr %b.addr, align 8251 store ptr %c, ptr %c.addr, align 8252 store i32 3, ptr %N, align 4253 store i32 0, ptr %i, align 4254 br label %for.cond255 256for.cond: ; preds = %for.inc11, %entry257 %0 = load i32, ptr %i, align 4258 %cmp = icmp slt i32 %0, 1152259 br i1 %cmp, label %for.body, label %for.end13260 261for.body: ; preds = %for.cond262 store i32 0, ptr %j, align 4263 br label %for.cond1264 265for.cond1: ; preds = %for.inc, %for.body266 %1 = load i32, ptr %j, align 4267 %cmp2 = icmp slt i32 %1, 3268 br i1 %cmp2, label %for.body3, label %for.end269 270for.body3: ; preds = %for.cond1271 %2 = load ptr, ptr %c.addr, align 8272 %3 = load i32, ptr %i, align 4273 %4 = load i32, ptr %j, align 4274 %add = add nsw i32 %3, %4275 %idxprom = sext i32 %add to i64276 %arrayidx = getelementptr inbounds float, ptr %2, i64 %idxprom277 %5 = load float, ptr %arrayidx, align 4278 %6 = load ptr, ptr %b.addr, align 8279 %7 = load i32, ptr %i, align 4280 %8 = load i32, ptr %j, align 4281 %add4 = add nsw i32 %7, %8282 %idxprom5 = sext i32 %add4 to i64283 %arrayidx6 = getelementptr inbounds float, ptr %6, i64 %idxprom5284 %9 = load float, ptr %arrayidx6, align 4285 %mul = fmul fast float %5, %9286 %10 = load ptr, ptr %a.addr, align 8287 %11 = load i32, ptr %i, align 4288 %12 = load i32, ptr %j, align 4289 %add7 = add nsw i32 %11, %12290 %idxprom8 = sext i32 %add7 to i64291 %arrayidx9 = getelementptr inbounds float, ptr %10, i64 %idxprom8292 %13 = load float, ptr %arrayidx9, align 4293 %add10 = fadd fast float %13, %mul294 store float %add10, ptr %arrayidx9, align 4295 br label %for.inc296 297for.inc: ; preds = %for.body3298 %14 = load i32, ptr %j, align 4299 %inc = add nsw i32 %14, 1300 store i32 %inc, ptr %j, align 4301 br label %for.cond1302 303for.end: ; preds = %for.cond1304 br label %for.inc11305 306for.inc11: ; preds = %for.end307 %15 = load i32, ptr %i, align 4308 %add12 = add nsw i32 %15, 3309 store i32 %add12, ptr %i, align 4310 br label %for.cond311 312for.end13: ; preds = %for.cond313 ret void314}315 316 317define void @same_op3_splat(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {318; CHECK-LABEL: define void @same_op3_splat(319; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0]] {320; CHECK-NEXT: [[ENTRY:.*]]:321; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[C]], align 4322; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0323; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <12 x i32> zeroinitializer324; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]325; CHECK: [[VECTOR_BODY]]:326; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]327; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 3328; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[OFFSET_IDX]]329; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <12 x float>, ptr [[TMP1]], align 4330; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[OFFSET_IDX]]331; CHECK-NEXT: [[WIDE_VEC14:%.*]] = load <12 x float>, ptr [[TMP3]], align 4332; CHECK-NEXT: [[TMP4:%.*]] = fmul fast <12 x float> [[WIDE_VEC]], [[TMP2]]333; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = fadd fast <12 x float> [[WIDE_VEC14]], [[TMP4]]334; CHECK-NEXT: store <12 x float> [[INTERLEAVED_VEC]], ptr [[TMP3]], align 4335; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4336; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], 384337; CHECK-NEXT: br i1 [[TMP12]], label %[[FOR_END11:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]338; CHECK: [[FOR_END11]]:339; CHECK-NEXT: ret void340;341entry:342 %a.addr = alloca ptr, align 8343 %b.addr = alloca ptr, align 8344 %c.addr = alloca ptr, align 8345 %N = alloca i32, align 4346 %i = alloca i32, align 4347 %j = alloca i32, align 4348 store ptr %a, ptr %a.addr, align 8349 store ptr %b, ptr %b.addr, align 8350 store ptr %c, ptr %c.addr, align 8351 store i32 3, ptr %N, align 4352 store i32 0, ptr %i, align 4353 br label %for.cond354 355for.cond: ; preds = %for.inc9, %entry356 %0 = load i32, ptr %i, align 4357 %cmp = icmp slt i32 %0, 1152358 br i1 %cmp, label %for.body, label %for.end11359 360for.body: ; preds = %for.cond361 store i32 0, ptr %j, align 4362 br label %for.cond1363 364for.cond1: ; preds = %for.inc, %for.body365 %1 = load i32, ptr %j, align 4366 %cmp2 = icmp slt i32 %1, 3367 br i1 %cmp2, label %for.body3, label %for.end368 369for.body3: ; preds = %for.cond1370 %2 = load ptr, ptr %c.addr, align 8371 %arrayidx = getelementptr inbounds float, ptr %2, i64 0372 %3 = load float, ptr %arrayidx, align 4373 %4 = load ptr, ptr %b.addr, align 8374 %5 = load i32, ptr %i, align 4375 %6 = load i32, ptr %j, align 4376 %add = add nsw i32 %5, %6377 %idxprom = sext i32 %add to i64378 %arrayidx4 = getelementptr inbounds float, ptr %4, i64 %idxprom379 %7 = load float, ptr %arrayidx4, align 4380 %mul = fmul fast float %3, %7381 %8 = load ptr, ptr %a.addr, align 8382 %9 = load i32, ptr %i, align 4383 %10 = load i32, ptr %j, align 4384 %add5 = add nsw i32 %9, %10385 %idxprom6 = sext i32 %add5 to i64386 %arrayidx7 = getelementptr inbounds float, ptr %8, i64 %idxprom6387 %11 = load float, ptr %arrayidx7, align 4388 %add8 = fadd fast float %11, %mul389 store float %add8, ptr %arrayidx7, align 4390 br label %for.inc391 392for.inc: ; preds = %for.body3393 %12 = load i32, ptr %j, align 4394 %inc = add nsw i32 %12, 1395 store i32 %inc, ptr %j, align 4396 br label %for.cond1397 398for.end: ; preds = %for.cond1399 br label %for.inc9400 401for.inc9: ; preds = %for.end402 %13 = load i32, ptr %i, align 4403 %add10 = add nsw i32 %13, 3404 store i32 %add10, ptr %i, align 4405 br label %for.cond406 407for.end11: ; preds = %for.cond408 ret void409}410 411 412define void @same_op4(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {413; CHECK-LABEL: define void @same_op4(414; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0]] {415; CHECK-NEXT: [[ENTRY:.*]]:416; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]417; CHECK: [[VECTOR_BODY]]:418; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]419; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 2420; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[OFFSET_IDX]]421; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <16 x float>, ptr [[TMP0]], align 4422; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[OFFSET_IDX]]423; CHECK-NEXT: [[WIDE_VEC17:%.*]] = load <16 x float>, ptr [[TMP1]], align 4424; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[OFFSET_IDX]]425; CHECK-NEXT: [[WIDE_VEC22:%.*]] = load <16 x float>, ptr [[TMP2]], align 4426; CHECK-NEXT: [[TMP3:%.*]] = fmul fast <16 x float> [[WIDE_VEC17]], [[WIDE_VEC]]427; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = fadd fast <16 x float> [[WIDE_VEC22]], [[TMP3]]428; CHECK-NEXT: store <16 x float> [[INTERLEAVED_VEC]], ptr [[TMP2]], align 4429; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4430; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 288431; CHECK-NEXT: br i1 [[TMP4]], label %[[FOR_END13:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]432; CHECK: [[FOR_END13]]:433; CHECK-NEXT: ret void434;435entry:436 %a.addr = alloca ptr, align 8437 %b.addr = alloca ptr, align 8438 %c.addr = alloca ptr, align 8439 %N = alloca i32, align 4440 %i = alloca i32, align 4441 %j = alloca i32, align 4442 store ptr %a, ptr %a.addr, align 8443 store ptr %b, ptr %b.addr, align 8444 store ptr %c, ptr %c.addr, align 8445 store i32 4, ptr %N, align 4446 store i32 0, ptr %i, align 4447 br label %for.cond448 449for.cond: ; preds = %for.inc11, %entry450 %0 = load i32, ptr %i, align 4451 %cmp = icmp slt i32 %0, 1152452 br i1 %cmp, label %for.body, label %for.end13453 454for.body: ; preds = %for.cond455 store i32 0, ptr %j, align 4456 br label %for.cond1457 458for.cond1: ; preds = %for.inc, %for.body459 %1 = load i32, ptr %j, align 4460 %cmp2 = icmp slt i32 %1, 4461 br i1 %cmp2, label %for.body3, label %for.end462 463for.body3: ; preds = %for.cond1464 %2 = load ptr, ptr %c.addr, align 8465 %3 = load i32, ptr %i, align 4466 %4 = load i32, ptr %j, align 4467 %add = add nsw i32 %3, %4468 %idxprom = sext i32 %add to i64469 %arrayidx = getelementptr inbounds float, ptr %2, i64 %idxprom470 %5 = load float, ptr %arrayidx, align 4471 %6 = load ptr, ptr %b.addr, align 8472 %7 = load i32, ptr %i, align 4473 %8 = load i32, ptr %j, align 4474 %add4 = add nsw i32 %7, %8475 %idxprom5 = sext i32 %add4 to i64476 %arrayidx6 = getelementptr inbounds float, ptr %6, i64 %idxprom5477 %9 = load float, ptr %arrayidx6, align 4478 %mul = fmul fast float %5, %9479 %10 = load ptr, ptr %a.addr, align 8480 %11 = load i32, ptr %i, align 4481 %12 = load i32, ptr %j, align 4482 %add7 = add nsw i32 %11, %12483 %idxprom8 = sext i32 %add7 to i64484 %arrayidx9 = getelementptr inbounds float, ptr %10, i64 %idxprom8485 %13 = load float, ptr %arrayidx9, align 4486 %add10 = fadd fast float %13, %mul487 store float %add10, ptr %arrayidx9, align 4488 br label %for.inc489 490for.inc: ; preds = %for.body3491 %14 = load i32, ptr %j, align 4492 %inc = add nsw i32 %14, 1493 store i32 %inc, ptr %j, align 4494 br label %for.cond1495 496for.end: ; preds = %for.cond1497 br label %for.inc11498 499for.inc11: ; preds = %for.end500 %15 = load i32, ptr %i, align 4501 %add12 = add nsw i32 %15, 4502 store i32 %add12, ptr %i, align 4503 br label %for.cond504 505for.end13: ; preds = %for.cond506 ret void507}508 509 510define void @same_op4_splat(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {511; CHECK-LABEL: define void @same_op4_splat(512; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0]] {513; CHECK-NEXT: [[ENTRY:.*]]:514; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[C]], align 4515; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0516; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <16 x i32> zeroinitializer517; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]518; CHECK: [[VECTOR_BODY]]:519; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]520; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 2521; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[OFFSET_IDX]]522; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <16 x float>, ptr [[TMP2]], align 4523; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[OFFSET_IDX]]524; CHECK-NEXT: [[WIDE_VEC15:%.*]] = load <16 x float>, ptr [[TMP3]], align 4525; CHECK-NEXT: [[TMP4:%.*]] = fmul fast <16 x float> [[WIDE_VEC]], [[TMP1]]526; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = fadd fast <16 x float> [[WIDE_VEC15]], [[TMP4]]527; CHECK-NEXT: store <16 x float> [[INTERLEAVED_VEC]], ptr [[TMP3]], align 4528; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4529; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 288530; CHECK-NEXT: br i1 [[TMP5]], label %[[FOR_END11:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]531; CHECK: [[FOR_END11]]:532; CHECK-NEXT: ret void533;534entry:535 %a.addr = alloca ptr, align 8536 %b.addr = alloca ptr, align 8537 %c.addr = alloca ptr, align 8538 %N = alloca i32, align 4539 %i = alloca i32, align 4540 %j = alloca i32, align 4541 store ptr %a, ptr %a.addr, align 8542 store ptr %b, ptr %b.addr, align 8543 store ptr %c, ptr %c.addr, align 8544 store i32 4, ptr %N, align 4545 store i32 0, ptr %i, align 4546 br label %for.cond547 548for.cond: ; preds = %for.inc9, %entry549 %0 = load i32, ptr %i, align 4550 %cmp = icmp slt i32 %0, 1152551 br i1 %cmp, label %for.body, label %for.end11552 553for.body: ; preds = %for.cond554 store i32 0, ptr %j, align 4555 br label %for.cond1556 557for.cond1: ; preds = %for.inc, %for.body558 %1 = load i32, ptr %j, align 4559 %cmp2 = icmp slt i32 %1, 4560 br i1 %cmp2, label %for.body3, label %for.end561 562for.body3: ; preds = %for.cond1563 %2 = load ptr, ptr %c.addr, align 8564 %arrayidx = getelementptr inbounds float, ptr %2, i64 0565 %3 = load float, ptr %arrayidx, align 4566 %4 = load ptr, ptr %b.addr, align 8567 %5 = load i32, ptr %i, align 4568 %6 = load i32, ptr %j, align 4569 %add = add nsw i32 %5, %6570 %idxprom = sext i32 %add to i64571 %arrayidx4 = getelementptr inbounds float, ptr %4, i64 %idxprom572 %7 = load float, ptr %arrayidx4, align 4573 %mul = fmul fast float %3, %7574 %8 = load ptr, ptr %a.addr, align 8575 %9 = load i32, ptr %i, align 4576 %10 = load i32, ptr %j, align 4577 %add5 = add nsw i32 %9, %10578 %idxprom6 = sext i32 %add5 to i64579 %arrayidx7 = getelementptr inbounds float, ptr %8, i64 %idxprom6580 %11 = load float, ptr %arrayidx7, align 4581 %add8 = fadd fast float %11, %mul582 store float %add8, ptr %arrayidx7, align 4583 br label %for.inc584 585for.inc: ; preds = %for.body3586 %12 = load i32, ptr %j, align 4587 %inc = add nsw i32 %12, 1588 store i32 %inc, ptr %j, align 4589 br label %for.cond1590 591for.end: ; preds = %for.cond1592 br label %for.inc9593 594for.inc9: ; preds = %for.end595 %13 = load i32, ptr %i, align 4596 %add10 = add nsw i32 %13, 4597 store i32 %add10, ptr %i, align 4598 br label %for.cond599 600for.end11: ; preds = %for.cond601 ret void602}603 604 605define void @same_op6(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {606; CHECK-LABEL: define void @same_op6(607; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0]] {608; CHECK-NEXT: [[ENTRY:.*]]:609; CHECK-NEXT: br label %[[FOR_COND1_PREHEADER:.*]]610; CHECK: [[FOR_COND1_PREHEADER]]:611; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_COND1_PREHEADER]] ]612; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[INDVARS_IV]]613; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]614; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]615; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4616; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[ARRAYIDX6]], align 4617; CHECK-NEXT: [[TMP2:%.*]] = fmul fast <4 x float> [[TMP1]], [[TMP0]]618; CHECK-NEXT: [[TMP3:%.*]] = load <4 x float>, ptr [[ARRAYIDX9]], align 4619; CHECK-NEXT: [[TMP4:%.*]] = fadd fast <4 x float> [[TMP3]], [[TMP2]]620; CHECK-NEXT: store <4 x float> [[TMP4]], ptr [[ARRAYIDX9]], align 4621; CHECK-NEXT: [[TMP5:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 4622; CHECK-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[TMP5]]623; CHECK-NEXT: [[ARRAYIDX6_4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[TMP5]]624; CHECK-NEXT: [[ARRAYIDX9_4:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[TMP5]]625; CHECK-NEXT: [[TMP6:%.*]] = load <2 x float>, ptr [[ARRAYIDX_4]], align 4626; CHECK-NEXT: [[TMP7:%.*]] = load <2 x float>, ptr [[ARRAYIDX6_4]], align 4627; CHECK-NEXT: [[TMP8:%.*]] = fmul fast <2 x float> [[TMP7]], [[TMP6]]628; CHECK-NEXT: [[TMP9:%.*]] = load <2 x float>, ptr [[ARRAYIDX9_4]], align 4629; CHECK-NEXT: [[TMP10:%.*]] = fadd fast <2 x float> [[TMP9]], [[TMP8]]630; CHECK-NEXT: store <2 x float> [[TMP10]], ptr [[ARRAYIDX9_4]], align 4631; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 6632; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 1146633; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_COND1_PREHEADER]], label %[[FOR_END13:.*]]634; CHECK: [[FOR_END13]]:635; CHECK-NEXT: ret void636;637entry:638 %a.addr = alloca ptr, align 8639 %b.addr = alloca ptr, align 8640 %c.addr = alloca ptr, align 8641 %N = alloca i32, align 4642 %i = alloca i32, align 4643 %j = alloca i32, align 4644 store ptr %a, ptr %a.addr, align 8645 store ptr %b, ptr %b.addr, align 8646 store ptr %c, ptr %c.addr, align 8647 store i32 6, ptr %N, align 4648 store i32 0, ptr %i, align 4649 br label %for.cond650 651for.cond: ; preds = %for.inc11, %entry652 %0 = load i32, ptr %i, align 4653 %cmp = icmp slt i32 %0, 1152654 br i1 %cmp, label %for.body, label %for.end13655 656for.body: ; preds = %for.cond657 store i32 0, ptr %j, align 4658 br label %for.cond1659 660for.cond1: ; preds = %for.inc, %for.body661 %1 = load i32, ptr %j, align 4662 %cmp2 = icmp slt i32 %1, 6663 br i1 %cmp2, label %for.body3, label %for.end664 665for.body3: ; preds = %for.cond1666 %2 = load ptr, ptr %c.addr, align 8667 %3 = load i32, ptr %i, align 4668 %4 = load i32, ptr %j, align 4669 %add = add nsw i32 %3, %4670 %idxprom = sext i32 %add to i64671 %arrayidx = getelementptr inbounds float, ptr %2, i64 %idxprom672 %5 = load float, ptr %arrayidx, align 4673 %6 = load ptr, ptr %b.addr, align 8674 %7 = load i32, ptr %i, align 4675 %8 = load i32, ptr %j, align 4676 %add4 = add nsw i32 %7, %8677 %idxprom5 = sext i32 %add4 to i64678 %arrayidx6 = getelementptr inbounds float, ptr %6, i64 %idxprom5679 %9 = load float, ptr %arrayidx6, align 4680 %mul = fmul fast float %5, %9681 %10 = load ptr, ptr %a.addr, align 8682 %11 = load i32, ptr %i, align 4683 %12 = load i32, ptr %j, align 4684 %add7 = add nsw i32 %11, %12685 %idxprom8 = sext i32 %add7 to i64686 %arrayidx9 = getelementptr inbounds float, ptr %10, i64 %idxprom8687 %13 = load float, ptr %arrayidx9, align 4688 %add10 = fadd fast float %13, %mul689 store float %add10, ptr %arrayidx9, align 4690 br label %for.inc691 692for.inc: ; preds = %for.body3693 %14 = load i32, ptr %j, align 4694 %inc = add nsw i32 %14, 1695 store i32 %inc, ptr %j, align 4696 br label %for.cond1697 698for.end: ; preds = %for.cond1699 br label %for.inc11700 701for.inc11: ; preds = %for.end702 %15 = load i32, ptr %i, align 4703 %add12 = add nsw i32 %15, 6704 store i32 %add12, ptr %i, align 4705 br label %for.cond706 707for.end13: ; preds = %for.cond708 ret void709}710 711 712define void @same_op6_splat(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {713; CHECK-LABEL: define void @same_op6_splat(714; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0]] {715; CHECK-NEXT: [[ENTRY:.*]]:716; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[C]], align 4717; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0718; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> zeroinitializer719; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i64 0720; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x float> [[TMP3]], <2 x float> poison, <2 x i32> zeroinitializer721; CHECK-NEXT: br label %[[FOR_COND1_PREHEADER:.*]]722; CHECK: [[FOR_COND1_PREHEADER]]:723; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_COND1_PREHEADER]] ]724; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]725; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]726; CHECK-NEXT: [[TMP5:%.*]] = load <4 x float>, ptr [[ARRAYIDX4]], align 4727; CHECK-NEXT: [[TMP6:%.*]] = fmul fast <4 x float> [[TMP5]], [[TMP2]]728; CHECK-NEXT: [[TMP7:%.*]] = load <4 x float>, ptr [[ARRAYIDX7]], align 4729; CHECK-NEXT: [[TMP8:%.*]] = fadd fast <4 x float> [[TMP7]], [[TMP6]]730; CHECK-NEXT: store <4 x float> [[TMP8]], ptr [[ARRAYIDX7]], align 4731; CHECK-NEXT: [[TMP9:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 4732; CHECK-NEXT: [[ARRAYIDX4_4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[TMP9]]733; CHECK-NEXT: [[ARRAYIDX7_4:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[TMP9]]734; CHECK-NEXT: [[TMP10:%.*]] = load <2 x float>, ptr [[ARRAYIDX4_4]], align 4735; CHECK-NEXT: [[TMP11:%.*]] = fmul fast <2 x float> [[TMP10]], [[TMP4]]736; CHECK-NEXT: [[TMP12:%.*]] = load <2 x float>, ptr [[ARRAYIDX7_4]], align 4737; CHECK-NEXT: [[TMP13:%.*]] = fadd fast <2 x float> [[TMP12]], [[TMP11]]738; CHECK-NEXT: store <2 x float> [[TMP13]], ptr [[ARRAYIDX7_4]], align 4739; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 6740; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 1146741; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_COND1_PREHEADER]], label %[[FOR_END11:.*]]742; CHECK: [[FOR_END11]]:743; CHECK-NEXT: ret void744;745entry:746 %a.addr = alloca ptr, align 8747 %b.addr = alloca ptr, align 8748 %c.addr = alloca ptr, align 8749 %N = alloca i32, align 4750 %i = alloca i32, align 4751 %j = alloca i32, align 4752 store ptr %a, ptr %a.addr, align 8753 store ptr %b, ptr %b.addr, align 8754 store ptr %c, ptr %c.addr, align 8755 store i32 6, ptr %N, align 4756 store i32 0, ptr %i, align 4757 br label %for.cond758 759for.cond: ; preds = %for.inc9, %entry760 %0 = load i32, ptr %i, align 4761 %cmp = icmp slt i32 %0, 1152762 br i1 %cmp, label %for.body, label %for.end11763 764for.body: ; preds = %for.cond765 store i32 0, ptr %j, align 4766 br label %for.cond1767 768for.cond1: ; preds = %for.inc, %for.body769 %1 = load i32, ptr %j, align 4770 %cmp2 = icmp slt i32 %1, 6771 br i1 %cmp2, label %for.body3, label %for.end772 773for.body3: ; preds = %for.cond1774 %2 = load ptr, ptr %c.addr, align 8775 %arrayidx = getelementptr inbounds float, ptr %2, i64 0776 %3 = load float, ptr %arrayidx, align 4777 %4 = load ptr, ptr %b.addr, align 8778 %5 = load i32, ptr %i, align 4779 %6 = load i32, ptr %j, align 4780 %add = add nsw i32 %5, %6781 %idxprom = sext i32 %add to i64782 %arrayidx4 = getelementptr inbounds float, ptr %4, i64 %idxprom783 %7 = load float, ptr %arrayidx4, align 4784 %mul = fmul fast float %3, %7785 %8 = load ptr, ptr %a.addr, align 8786 %9 = load i32, ptr %i, align 4787 %10 = load i32, ptr %j, align 4788 %add5 = add nsw i32 %9, %10789 %idxprom6 = sext i32 %add5 to i64790 %arrayidx7 = getelementptr inbounds float, ptr %8, i64 %idxprom6791 %11 = load float, ptr %arrayidx7, align 4792 %add8 = fadd fast float %11, %mul793 store float %add8, ptr %arrayidx7, align 4794 br label %for.inc795 796for.inc: ; preds = %for.body3797 %12 = load i32, ptr %j, align 4798 %inc = add nsw i32 %12, 1799 store i32 %inc, ptr %j, align 4800 br label %for.cond1801 802for.end: ; preds = %for.cond1803 br label %for.inc9804 805for.inc9: ; preds = %for.end806 %13 = load i32, ptr %i, align 4807 %add10 = add nsw i32 %13, 6808 store i32 %add10, ptr %i, align 4809 br label %for.cond810 811for.end11: ; preds = %for.cond812 ret void813}814 815 816define void @same_op8(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {817; CHECK-LABEL: define void @same_op8(818; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0]] {819; CHECK-NEXT: [[ENTRY:.*]]:820; CHECK-NEXT: br label %[[FOR_COND1_PREHEADER:.*]]821; CHECK: [[FOR_COND1_PREHEADER]]:822; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_COND1_PREHEADER]] ]823; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[INDVARS_IV]]824; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[INDVARS_IV]]825; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[INDVARS_IV]]826; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4827; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[ARRAYIDX6]], align 4828; CHECK-NEXT: [[TMP2:%.*]] = fmul fast <4 x float> [[TMP1]], [[TMP0]]829; CHECK-NEXT: [[TMP3:%.*]] = load <4 x float>, ptr [[ARRAYIDX9]], align 4830; CHECK-NEXT: [[TMP4:%.*]] = fadd fast <4 x float> [[TMP3]], [[TMP2]]831; CHECK-NEXT: store <4 x float> [[TMP4]], ptr [[ARRAYIDX9]], align 4832; CHECK-NEXT: [[TMP5:%.*]] = or disjoint i64 [[INDVARS_IV]], 4833; CHECK-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[TMP5]]834; CHECK-NEXT: [[ARRAYIDX6_4:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[TMP5]]835; CHECK-NEXT: [[ARRAYIDX9_4:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[TMP5]]836; CHECK-NEXT: [[TMP6:%.*]] = load <4 x float>, ptr [[ARRAYIDX_4]], align 4837; CHECK-NEXT: [[TMP7:%.*]] = load <4 x float>, ptr [[ARRAYIDX6_4]], align 4838; CHECK-NEXT: [[TMP8:%.*]] = fmul fast <4 x float> [[TMP7]], [[TMP6]]839; CHECK-NEXT: [[TMP9:%.*]] = load <4 x float>, ptr [[ARRAYIDX9_4]], align 4840; CHECK-NEXT: [[TMP10:%.*]] = fadd fast <4 x float> [[TMP9]], [[TMP8]]841; CHECK-NEXT: store <4 x float> [[TMP10]], ptr [[ARRAYIDX9_4]], align 4842; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 8843; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 1144844; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_COND1_PREHEADER]], label %[[FOR_END13:.*]]845; CHECK: [[FOR_END13]]:846; CHECK-NEXT: ret void847;848entry:849 %a.addr = alloca ptr, align 8850 %b.addr = alloca ptr, align 8851 %c.addr = alloca ptr, align 8852 %N = alloca i32, align 4853 %i = alloca i32, align 4854 %j = alloca i32, align 4855 store ptr %a, ptr %a.addr, align 8856 store ptr %b, ptr %b.addr, align 8857 store ptr %c, ptr %c.addr, align 8858 store i32 8, ptr %N, align 4859 store i32 0, ptr %i, align 4860 br label %for.cond861 862for.cond: ; preds = %for.inc11, %entry863 %0 = load i32, ptr %i, align 4864 %cmp = icmp slt i32 %0, 1152865 br i1 %cmp, label %for.body, label %for.end13866 867for.body: ; preds = %for.cond868 store i32 0, ptr %j, align 4869 br label %for.cond1870 871for.cond1: ; preds = %for.inc, %for.body872 %1 = load i32, ptr %j, align 4873 %cmp2 = icmp slt i32 %1, 8874 br i1 %cmp2, label %for.body3, label %for.end875 876for.body3: ; preds = %for.cond1877 %2 = load ptr, ptr %c.addr, align 8878 %3 = load i32, ptr %i, align 4879 %4 = load i32, ptr %j, align 4880 %add = add nsw i32 %3, %4881 %idxprom = sext i32 %add to i64882 %arrayidx = getelementptr inbounds float, ptr %2, i64 %idxprom883 %5 = load float, ptr %arrayidx, align 4884 %6 = load ptr, ptr %b.addr, align 8885 %7 = load i32, ptr %i, align 4886 %8 = load i32, ptr %j, align 4887 %add4 = add nsw i32 %7, %8888 %idxprom5 = sext i32 %add4 to i64889 %arrayidx6 = getelementptr inbounds float, ptr %6, i64 %idxprom5890 %9 = load float, ptr %arrayidx6, align 4891 %mul = fmul fast float %5, %9892 %10 = load ptr, ptr %a.addr, align 8893 %11 = load i32, ptr %i, align 4894 %12 = load i32, ptr %j, align 4895 %add7 = add nsw i32 %11, %12896 %idxprom8 = sext i32 %add7 to i64897 %arrayidx9 = getelementptr inbounds float, ptr %10, i64 %idxprom8898 %13 = load float, ptr %arrayidx9, align 4899 %add10 = fadd fast float %13, %mul900 store float %add10, ptr %arrayidx9, align 4901 br label %for.inc902 903for.inc: ; preds = %for.body3904 %14 = load i32, ptr %j, align 4905 %inc = add nsw i32 %14, 1906 store i32 %inc, ptr %j, align 4907 br label %for.cond1908 909for.end: ; preds = %for.cond1910 br label %for.inc11911 912for.inc11: ; preds = %for.end913 %15 = load i32, ptr %i, align 4914 %add12 = add nsw i32 %15, 8915 store i32 %add12, ptr %i, align 4916 br label %for.cond917 918for.end13: ; preds = %for.cond919 ret void920}921 922 923define void @same_op8_splat(ptr noalias noundef %a, ptr noundef %b, ptr noundef %c) {924; CHECK-LABEL: define void @same_op8_splat(925; CHECK-SAME: ptr noalias noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]], ptr noundef readonly captures(none) [[C:%.*]]) local_unnamed_addr #[[ATTR0]] {926; CHECK-NEXT: [[ENTRY:.*]]:927; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[C]], align 4928; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i64 0929; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <16 x i32> zeroinitializer930; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]931; CHECK: [[VECTOR_BODY]]:932; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]933; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 3934; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[OFFSET_IDX]]935; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <16 x float>, ptr [[TMP5]], align 4936; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[OFFSET_IDX]]937; CHECK-NEXT: [[WIDE_VEC19:%.*]] = load <16 x float>, ptr [[TMP6]], align 4938; CHECK-NEXT: [[TMP4:%.*]] = fmul fast <16 x float> [[WIDE_VEC]], [[TMP1]]939; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = fadd fast <16 x float> [[WIDE_VEC19]], [[TMP4]]940; CHECK-NEXT: store <16 x float> [[INTERLEAVED_VEC]], ptr [[TMP6]], align 4941; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2942; CHECK-NEXT: [[TMP25:%.*]] = icmp eq i64 [[INDEX_NEXT]], 144943; CHECK-NEXT: br i1 [[TMP25]], label %[[FOR_END11:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]944; CHECK: [[FOR_END11]]:945; CHECK-NEXT: ret void946;947entry:948 %a.addr = alloca ptr, align 8949 %b.addr = alloca ptr, align 8950 %c.addr = alloca ptr, align 8951 %N = alloca i32, align 4952 %i = alloca i32, align 4953 %j = alloca i32, align 4954 store ptr %a, ptr %a.addr, align 8955 store ptr %b, ptr %b.addr, align 8956 store ptr %c, ptr %c.addr, align 8957 store i32 8, ptr %N, align 4958 store i32 0, ptr %i, align 4959 br label %for.cond960 961for.cond: ; preds = %for.inc9, %entry962 %0 = load i32, ptr %i, align 4963 %cmp = icmp slt i32 %0, 1152964 br i1 %cmp, label %for.body, label %for.end11965 966for.body: ; preds = %for.cond967 store i32 0, ptr %j, align 4968 br label %for.cond1969 970for.cond1: ; preds = %for.inc, %for.body971 %1 = load i32, ptr %j, align 4972 %cmp2 = icmp slt i32 %1, 8973 br i1 %cmp2, label %for.body3, label %for.end974 975for.body3: ; preds = %for.cond1976 %2 = load ptr, ptr %c.addr, align 8977 %arrayidx = getelementptr inbounds float, ptr %2, i64 0978 %3 = load float, ptr %arrayidx, align 4979 %4 = load ptr, ptr %b.addr, align 8980 %5 = load i32, ptr %i, align 4981 %6 = load i32, ptr %j, align 4982 %add = add nsw i32 %5, %6983 %idxprom = sext i32 %add to i64984 %arrayidx4 = getelementptr inbounds float, ptr %4, i64 %idxprom985 %7 = load float, ptr %arrayidx4, align 4986 %mul = fmul fast float %3, %7987 %8 = load ptr, ptr %a.addr, align 8988 %9 = load i32, ptr %i, align 4989 %10 = load i32, ptr %j, align 4990 %add5 = add nsw i32 %9, %10991 %idxprom6 = sext i32 %add5 to i64992 %arrayidx7 = getelementptr inbounds float, ptr %8, i64 %idxprom6993 %11 = load float, ptr %arrayidx7, align 4994 %add8 = fadd fast float %11, %mul995 store float %add8, ptr %arrayidx7, align 4996 br label %for.inc997 998for.inc: ; preds = %for.body3999 %12 = load i32, ptr %j, align 41000 %inc = add nsw i32 %12, 11001 store i32 %inc, ptr %j, align 41002 br label %for.cond11003 1004for.end: ; preds = %for.cond11005 br label %for.inc91006 1007for.inc9: ; preds = %for.end1008 %13 = load i32, ptr %i, align 41009 %add10 = add nsw i32 %13, 81010 store i32 %add10, ptr %i, align 41011 br label %for.cond1012 1013for.end11: ; preds = %for.cond1014 ret void1015}1016 1017; This test contains an example of a SAXPY loop manually unrolled by five:1018;1019; void saxpy(long n, float a, float *x, float *y) {1020; for (int i = 0; i < n; i += 5) {1021; y[i] += a * x[i];1022; y[i + 1] += a * x[i + 1];1023; y[i + 2] += a * x[i + 2];1024; y[i + 3] += a * x[i + 3];1025; y[i + 4] += a * x[i + 4];1026; }1027; }1028;1029define void @saxpy_5(i64 %n, float %a, ptr readonly %x, ptr noalias %y) {1030; CHECK-LABEL: define void @saxpy_5(1031; CHECK-SAME: i64 [[N:%.*]], float [[A:%.*]], ptr readonly captures(none) [[X:%.*]], ptr noalias captures(none) [[Y:%.*]]) local_unnamed_addr #[[ATTR0]] {1032; CHECK-NEXT: [[ENTRY:.*:]]1033; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i64 [[N]], 01034; CHECK-NEXT: br i1 [[TMP0]], label %[[LOOP_PREHEADER:.*]], label %[[EXIT:.*]]1035; CHECK: [[LOOP_PREHEADER]]:1036; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[N]], -11037; CHECK-NEXT: [[TMP2:%.*]] = udiv i64 [[TMP1]], 51038; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 11039; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 61040; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[LOOP_PREHEADER11:.*]], label %[[VECTOR_PH:.*]]1041; CHECK: [[VECTOR_PH]]:1042; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP3]], 92233720368547758061043; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[N_VEC]], 51044; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[A]], i64 01045; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <10 x i32> zeroinitializer1046; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]1047; CHECK: [[VECTOR_BODY]]:1048; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]1049; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 51050; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw float, ptr [[X]], i64 [[OFFSET_IDX]]1051; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <10 x float>, ptr [[TMP6]], align 41052; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw float, ptr [[Y]], i64 [[OFFSET_IDX]]1053; CHECK-NEXT: [[WIDE_VEC5:%.*]] = load <10 x float>, ptr [[TMP7]], align 41054; CHECK-NEXT: [[TMP8:%.*]] = fmul fast <10 x float> [[WIDE_VEC]], [[TMP5]]1055; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = fadd fast <10 x float> [[WIDE_VEC5]], [[TMP8]]1056; CHECK-NEXT: store <10 x float> [[INTERLEAVED_VEC]], ptr [[TMP7]], align 41057; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 21058; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]1059; CHECK-NEXT: br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]1060; CHECK: [[MIDDLE_BLOCK]]:1061; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]1062; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT]], label %[[LOOP_PREHEADER11]]1063; CHECK: [[LOOP_PREHEADER11]]:1064; CHECK-NEXT: [[I1_PH:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ [[TMP4]], %[[MIDDLE_BLOCK]] ]1065; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x float> poison, float [[A]], i64 01066; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <4 x float> [[TMP10]], <4 x float> poison, <4 x i32> zeroinitializer1067; CHECK-NEXT: br label %[[LOOP:.*]]1068; CHECK: [[LOOP]]:1069; CHECK-NEXT: [[I1:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[LOOP]] ], [ [[I1_PH]], %[[LOOP_PREHEADER11]] ]1070; CHECK-NEXT: [[XGEP1:%.*]] = getelementptr inbounds nuw float, ptr [[X]], i64 [[I1]]1071; CHECK-NEXT: [[YGEP1:%.*]] = getelementptr inbounds nuw float, ptr [[Y]], i64 [[I1]]1072; CHECK-NEXT: [[TMP12:%.*]] = load <4 x float>, ptr [[XGEP1]], align 41073; CHECK-NEXT: [[TMP13:%.*]] = fmul fast <4 x float> [[TMP12]], [[TMP11]]1074; CHECK-NEXT: [[TMP14:%.*]] = load <4 x float>, ptr [[YGEP1]], align 41075; CHECK-NEXT: [[TMP15:%.*]] = fadd fast <4 x float> [[TMP14]], [[TMP13]]1076; CHECK-NEXT: store <4 x float> [[TMP15]], ptr [[YGEP1]], align 41077; CHECK-NEXT: [[I5:%.*]] = add nuw nsw i64 [[I1]], 41078; CHECK-NEXT: [[XGEP5:%.*]] = getelementptr inbounds nuw float, ptr [[X]], i64 [[I5]]1079; CHECK-NEXT: [[X5:%.*]] = load float, ptr [[XGEP5]], align 41080; CHECK-NEXT: [[AX5:%.*]] = fmul fast float [[X5]], [[A]]1081; CHECK-NEXT: [[YGEP5:%.*]] = getelementptr inbounds nuw float, ptr [[Y]], i64 [[I5]]1082; CHECK-NEXT: [[Y5:%.*]] = load float, ptr [[YGEP5]], align 41083; CHECK-NEXT: [[AXPY5:%.*]] = fadd fast float [[Y5]], [[AX5]]1084; CHECK-NEXT: store float [[AXPY5]], ptr [[YGEP5]], align 41085; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I1]], 51086; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[N]], [[I_NEXT]]1087; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[EXIT]], !llvm.loop [[LOOP10:![0-9]+]]1088; CHECK: [[EXIT]]:1089; CHECK-NEXT: ret void1090;1091entry:1092 %0 = icmp sgt i64 %n, 01093 br i1 %0, label %loop, label %exit1094 1095loop:1096 %i1 = phi i64 [ %i.next, %loop ], [ 0, %entry ]1097 %xgep1 = getelementptr inbounds nuw float, ptr %x, i64 %i11098 %x1 = load float, ptr %xgep1, align 41099 %ax1 = fmul fast float %x1, %a1100 %ygep1 = getelementptr inbounds nuw float, ptr %y, i64 %i11101 %y1 = load float, ptr %ygep1, align 41102 %axpy1 = fadd fast float %y1, %ax11103 store float %axpy1, ptr %ygep1, align 41104 %i2 = add nuw nsw i64 %i1, 11105 %xgep2 = getelementptr inbounds nuw float, ptr %x, i64 %i21106 %x2 = load float, ptr %xgep2, align 41107 %ax2 = fmul fast float %x2, %a1108 %ygep2 = getelementptr inbounds nuw float, ptr %y, i64 %i21109 %y2 = load float, ptr %ygep2, align 41110 %axpy2 = fadd fast float %y2, %ax21111 store float %axpy2, ptr %ygep2, align 41112 %i3 = add nuw nsw i64 %i1, 21113 %xgep3 = getelementptr inbounds nuw float, ptr %x, i64 %i31114 %x3 = load float, ptr %xgep3, align 41115 %ax3 = fmul fast float %x3, %a1116 %ygep3 = getelementptr inbounds nuw float, ptr %y, i64 %i31117 %y3 = load float, ptr %ygep3, align 41118 %axpy3 = fadd fast float %y3, %ax31119 store float %axpy3, ptr %ygep3, align 41120 %i4 = add nuw nsw i64 %i1, 31121 %xgep4 = getelementptr inbounds nuw float, ptr %x, i64 %i41122 %x4 = load float, ptr %xgep4, align 41123 %ax4 = fmul fast float %x4, %a1124 %ygep4 = getelementptr inbounds nuw float, ptr %y, i64 %i41125 %y4 = load float, ptr %ygep4, align 41126 %axpy4 = fadd fast float %y4, %ax41127 store float %axpy4, ptr %ygep4, align 41128 %i5 = add nuw nsw i64 %i1, 41129 %xgep5 = getelementptr inbounds nuw float, ptr %x, i64 %i51130 %x5 = load float, ptr %xgep5, align 41131 %ax5 = fmul fast float %x5, %a1132 %ygep5 = getelementptr inbounds nuw float, ptr %y, i64 %i51133 %y5 = load float, ptr %ygep5, align 41134 %axpy5 = fadd fast float %y5, %ax51135 store float %axpy5, ptr %ygep5, align 41136 %i.next = add nuw nsw i64 %i1, 51137 %cmp = icmp sgt i64 %n, %i.next1138 br i1 %cmp, label %loop, label %exit1139 1140exit:1141 ret void1142}1143;.1144; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}1145; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}1146; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}1147; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}1148; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}1149; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}1150; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}1151; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}1152; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}1153; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}1154; CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META2]], [[META1]]}1155;.1156