472 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes="default<O3>" -enable-matrix -S %s | FileCheck %s3 4target triple = "arm64-apple-ios"5 6define void @matrix_extract_insert_scalar(i32 %i, i32 %k, i32 %j, ptr nonnull align 8 dereferenceable(1800) %A, ptr nonnull align 8 dereferenceable(1800) %B) #0 {7; CHECK-LABEL: @matrix_extract_insert_scalar(8; CHECK-NEXT: entry:9; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[K:%.*]] to i6410; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[J:%.*]] to i6411; CHECK-NEXT: [[TMP0:%.*]] = mul nuw nsw i64 [[CONV1]], 1512; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[TMP0]], [[CONV]]13; CHECK-NEXT: [[TMP2:%.*]] = icmp samesign ult i64 [[TMP1]], 22514; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP2]])15; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw double, ptr [[A:%.*]], i64 [[TMP1]]16; CHECK-NEXT: [[MATRIXEXT:%.*]] = load double, ptr [[TMP3]], align 817; CHECK-NEXT: [[CONV2:%.*]] = zext i32 [[I:%.*]] to i6418; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP0]], [[CONV2]]19; CHECK-NEXT: [[TMP5:%.*]] = icmp samesign ult i64 [[TMP4]], 22520; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP5]])21; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw double, ptr [[B:%.*]], i64 [[TMP4]]22; CHECK-NEXT: [[MATRIXEXT4:%.*]] = load double, ptr [[TMP6]], align 823; CHECK-NEXT: [[MUL:%.*]] = fmul double [[MATRIXEXT]], [[MATRIXEXT4]]24; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[TMP1]]25; CHECK-NEXT: [[MATRIXEXT7:%.*]] = load double, ptr [[TMP7]], align 826; CHECK-NEXT: [[SUB:%.*]] = fsub double [[MATRIXEXT7]], [[MUL]]27; CHECK-NEXT: store double [[SUB]], ptr [[TMP7]], align 828; CHECK-NEXT: ret void29;30entry:31 %i.addr = alloca i32, align 432 %k.addr = alloca i32, align 433 %j.addr = alloca i32, align 434 %A.addr = alloca ptr, align 835 %B.addr = alloca ptr, align 836 store i32 %i, ptr %i.addr, align 437 store i32 %k, ptr %k.addr, align 438 store i32 %j, ptr %j.addr, align 439 store ptr %A, ptr %A.addr, align 840 store ptr %B, ptr %B.addr, align 841 %0 = load i32, ptr %k.addr, align 442 %conv = zext i32 %0 to i6443 %1 = load i32, ptr %j.addr, align 444 %conv1 = zext i32 %1 to i6445 %2 = mul i64 %conv1, 1546 %3 = add i64 %2, %conv47 %4 = icmp ult i64 %3, 22548 call void @llvm.assume(i1 %4)49 %5 = load ptr, ptr %A.addr, align 850 %6 = load <225 x double>, ptr %5, align 851 %matrixext = extractelement <225 x double> %6, i64 %352 %7 = load i32, ptr %i.addr, align 453 %conv2 = zext i32 %7 to i6454 %8 = load i32, ptr %j.addr, align 455 %conv3 = zext i32 %8 to i6456 %9 = mul i64 %conv3, 1557 %10 = add i64 %9, %conv258 %11 = icmp ult i64 %10, 22559 call void @llvm.assume(i1 %11)60 %12 = load ptr, ptr %B.addr, align 861 %13 = load <225 x double>, ptr %12, align 862 %matrixext4 = extractelement <225 x double> %13, i64 %1063 %mul = fmul double %matrixext, %matrixext464 %14 = load ptr, ptr %B.addr, align 865 %15 = load i32, ptr %k.addr, align 466 %conv5 = zext i32 %15 to i6467 %16 = load i32, ptr %j.addr, align 468 %conv6 = zext i32 %16 to i6469 %17 = mul i64 %conv6, 1570 %18 = add i64 %17, %conv571 %19 = icmp ult i64 %18, 22572 call void @llvm.assume(i1 %19)73 %20 = load <225 x double>, ptr %14, align 874 %matrixext7 = extractelement <225 x double> %20, i64 %1875 %sub = fsub double %matrixext7, %mul76 %21 = icmp ult i64 %18, 22577 call void @llvm.assume(i1 %21)78 %22 = load <225 x double>, ptr %14, align 879 %matins = insertelement <225 x double> %22, double %sub, i64 %1880 store <225 x double> %matins, ptr %14, align 881 ret void82}83define void @matrix_extract_insert_loop(i32 %i, ptr nonnull align 8 dereferenceable(1800) %A, ptr nonnull align 8 dereferenceable(1800) %B) {84; CHECK-LABEL: @matrix_extract_insert_loop(85; CHECK-NEXT: entry:86; CHECK-NEXT: [[CMP210_NOT:%.*]] = icmp eq i32 [[I:%.*]], 087; CHECK-NEXT: [[CONV6:%.*]] = zext i32 [[I]] to i6488; CHECK-NEXT: br i1 [[CMP210_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[VECTOR_MEMCHECK:%.*]]89; CHECK: for.cond1.preheader.us.preheader:90; CHECK-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[CONV6]], 391; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[TMP0]], 36092; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B:%.*]], i64 [[TMP1]]93; CHECK-NEXT: [[SCEVGEP20:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 [[TMP1]]94; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[I]], 22595; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP2]])96; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[CONV6]]97; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[I]], 498; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY4_US_PREHEADER:%.*]], label [[FOR_COND1_PREHEADER_US_PREHEADER:%.*]]99; CHECK: vector.memcheck:100; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP20]]101; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]102; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]103; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[FOR_BODY4_US_PREHEADER]], label [[VECTOR_PH:%.*]]104; CHECK: vector.ph:105; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[CONV6]], 252106; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]107; CHECK: vector.body:108; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]109; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw double, ptr [[A]], i64 [[INDEX]]110; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP17]], i64 16111; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP17]], align 8, !alias.scope [[META0:![0-9]+]]112; CHECK-NEXT: [[WIDE_LOAD21:%.*]] = load <2 x double>, ptr [[TMP18]], align 8, !alias.scope [[META0]]113; CHECK-NEXT: [[TMP19:%.*]] = load double, ptr [[TMP3]], align 8, !alias.scope [[META3:![0-9]+]]114; CHECK-NEXT: [[BROADCAST_SPLATINSERT22:%.*]] = insertelement <2 x double> poison, double [[TMP19]], i64 0115; CHECK-NEXT: [[BROADCAST_SPLAT23:%.*]] = shufflevector <2 x double> [[BROADCAST_SPLATINSERT22]], <2 x double> poison, <2 x i32> zeroinitializer116; CHECK-NEXT: [[TMP20:%.*]] = fmul <2 x double> [[WIDE_LOAD]], [[BROADCAST_SPLAT23]]117; CHECK-NEXT: [[TMP21:%.*]] = fmul <2 x double> [[WIDE_LOAD21]], [[BROADCAST_SPLAT23]]118; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[INDEX]]119; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP22]], i64 16120; CHECK-NEXT: [[WIDE_LOAD24:%.*]] = load <2 x double>, ptr [[TMP22]], align 8, !alias.scope [[META5:![0-9]+]], !noalias [[META0]]121; CHECK-NEXT: [[WIDE_LOAD25:%.*]] = load <2 x double>, ptr [[TMP23]], align 8, !alias.scope [[META5]], !noalias [[META0]]122; CHECK-NEXT: [[TMP24:%.*]] = fsub <2 x double> [[WIDE_LOAD24]], [[TMP20]]123; CHECK-NEXT: [[TMP25:%.*]] = fsub <2 x double> [[WIDE_LOAD25]], [[TMP21]]124; CHECK-NEXT: store <2 x double> [[TMP24]], ptr [[TMP22]], align 8, !alias.scope [[META5]], !noalias [[META0]]125; CHECK-NEXT: store <2 x double> [[TMP25]], ptr [[TMP23]], align 8, !alias.scope [[META5]], !noalias [[META0]]126; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4127; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]128; CHECK-NEXT: br i1 [[TMP26]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]129; CHECK: middle.block:130; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[CONV6]]131; CHECK-NEXT: br i1 [[CMP_N]], label [[VECTOR_MEMCHECK_1:%.*]], label [[FOR_BODY4_US_PREHEADER]]132; CHECK: for.body4.us.preheader:133; CHECK-NEXT: [[INDVARS_IV_PH:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]134; CHECK-NEXT: br label [[FOR_BODY4_US:%.*]]135; CHECK: for.body4.us:136; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY4_US]] ], [ [[INDVARS_IV_PH]], [[FOR_BODY4_US_PREHEADER]] ]137; CHECK-NEXT: [[TMP27:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 225138; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP27]])139; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw double, ptr [[A]], i64 [[INDVARS_IV]]140; CHECK-NEXT: [[MATRIXEXT_US:%.*]] = load double, ptr [[TMP28]], align 8141; CHECK-NEXT: [[MATRIXEXT8_US:%.*]] = load double, ptr [[TMP3]], align 8142; CHECK-NEXT: [[MUL_US:%.*]] = fmul double [[MATRIXEXT_US]], [[MATRIXEXT8_US]]143; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[INDVARS_IV]]144; CHECK-NEXT: [[MATRIXEXT11_US:%.*]] = load double, ptr [[TMP29]], align 8145; CHECK-NEXT: [[SUB_US:%.*]] = fsub double [[MATRIXEXT11_US]], [[MUL_US]]146; CHECK-NEXT: store double [[SUB_US]], ptr [[TMP29]], align 8147; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1148; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[CONV6]]149; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[VECTOR_MEMCHECK_1]], label [[FOR_BODY4_US]], !llvm.loop [[LOOP10:![0-9]+]]150; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us:151; CHECK-NEXT: [[TMP31:%.*]] = icmp samesign ult i32 [[I]], 210152; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP31]])153; CHECK-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[CONV6]]154; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP61]], i64 120155; CHECK-NEXT: [[MIN_ITERS_CHECK_1:%.*]] = icmp samesign ult i32 [[I]], 4156; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK_1]], label [[FOR_BODY4_US_PREHEADER_1:%.*]], label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US:%.*]]157; CHECK: vector.memcheck.1:158; CHECK-NEXT: [[BOUND0_1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP20]]159; CHECK-NEXT: [[BOUND1_1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]160; CHECK-NEXT: [[FOUND_CONFLICT_1:%.*]] = and i1 [[BOUND0_1]], [[BOUND1_1]]161; CHECK-NEXT: br i1 [[FOUND_CONFLICT_1]], label [[FOR_BODY4_US_PREHEADER_1]], label [[VECTOR_PH_1:%.*]]162; CHECK: vector.ph.1:163; CHECK-NEXT: [[N_VEC_1:%.*]] = and i64 [[CONV6]], 252164; CHECK-NEXT: br label [[VECTOR_BODY_1:%.*]]165; CHECK: vector.body.1:166; CHECK-NEXT: [[INDEX_1:%.*]] = phi i64 [ 0, [[VECTOR_PH_1]] ], [ [[INDEX_NEXT_1:%.*]], [[VECTOR_BODY_1]] ]167; CHECK-NEXT: [[TMP33:%.*]] = add nuw nsw i64 [[INDEX_1]], 15168; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw double, ptr [[A]], i64 [[TMP33]]169; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP47]], i64 16170; CHECK-NEXT: [[WIDE_LOAD_1:%.*]] = load <2 x double>, ptr [[TMP47]], align 8, !alias.scope [[META0]]171; CHECK-NEXT: [[WIDE_LOAD21_1:%.*]] = load <2 x double>, ptr [[TMP48]], align 8, !alias.scope [[META0]]172; CHECK-NEXT: [[TMP49:%.*]] = load double, ptr [[TMP32]], align 8, !alias.scope [[META3]]173; CHECK-NEXT: [[BROADCAST_SPLATINSERT22_1:%.*]] = insertelement <2 x double> poison, double [[TMP49]], i64 0174; CHECK-NEXT: [[BROADCAST_SPLAT23_1:%.*]] = shufflevector <2 x double> [[BROADCAST_SPLATINSERT22_1]], <2 x double> poison, <2 x i32> zeroinitializer175; CHECK-NEXT: [[TMP50:%.*]] = fmul <2 x double> [[WIDE_LOAD_1]], [[BROADCAST_SPLAT23_1]]176; CHECK-NEXT: [[TMP51:%.*]] = fmul <2 x double> [[WIDE_LOAD21_1]], [[BROADCAST_SPLAT23_1]]177; CHECK-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[TMP33]]178; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP52]], i64 16179; CHECK-NEXT: [[WIDE_LOAD24_1:%.*]] = load <2 x double>, ptr [[TMP52]], align 8, !alias.scope [[META5]], !noalias [[META0]]180; CHECK-NEXT: [[WIDE_LOAD25_1:%.*]] = load <2 x double>, ptr [[TMP53]], align 8, !alias.scope [[META5]], !noalias [[META0]]181; CHECK-NEXT: [[TMP54:%.*]] = fsub <2 x double> [[WIDE_LOAD24_1]], [[TMP50]]182; CHECK-NEXT: [[TMP55:%.*]] = fsub <2 x double> [[WIDE_LOAD25_1]], [[TMP51]]183; CHECK-NEXT: store <2 x double> [[TMP54]], ptr [[TMP52]], align 8, !alias.scope [[META5]], !noalias [[META0]]184; CHECK-NEXT: store <2 x double> [[TMP55]], ptr [[TMP53]], align 8, !alias.scope [[META5]], !noalias [[META0]]185; CHECK-NEXT: [[INDEX_NEXT_1]] = add nuw i64 [[INDEX_1]], 4186; CHECK-NEXT: [[TMP56:%.*]] = icmp eq i64 [[INDEX_NEXT_1]], [[N_VEC_1]]187; CHECK-NEXT: br i1 [[TMP56]], label [[MIDDLE_BLOCK_1:%.*]], label [[VECTOR_BODY_1]], !llvm.loop [[LOOP7]]188; CHECK: middle.block.1:189; CHECK-NEXT: [[CMP_N_1:%.*]] = icmp eq i64 [[N_VEC_1]], [[CONV6]]190; CHECK-NEXT: br i1 [[CMP_N_1]], label [[VECTOR_MEMCHECK_2:%.*]], label [[FOR_BODY4_US_PREHEADER_1]]191; CHECK: for.body4.us.preheader.1:192; CHECK-NEXT: [[INDVARS_IV_PH_1:%.*]] = phi i64 [ 0, [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]] ], [ 0, [[VECTOR_MEMCHECK_1]] ], [ [[N_VEC_1]], [[MIDDLE_BLOCK_1]] ]193; CHECK-NEXT: br label [[FOR_BODY4_US_1:%.*]]194; CHECK: for.body4.us.1:195; CHECK-NEXT: [[INDVARS_IV_1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_1:%.*]], [[FOR_BODY4_US_1]] ], [ [[INDVARS_IV_PH_1]], [[FOR_BODY4_US_PREHEADER_1]] ]196; CHECK-NEXT: [[TMP57:%.*]] = add nuw nsw i64 [[INDVARS_IV_1]], 15197; CHECK-NEXT: [[TMP58:%.*]] = icmp samesign ult i64 [[INDVARS_IV_1]], 210198; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP58]])199; CHECK-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw double, ptr [[A]], i64 [[TMP57]]200; CHECK-NEXT: [[MATRIXEXT_US_1:%.*]] = load double, ptr [[TMP59]], align 8201; CHECK-NEXT: [[MATRIXEXT8_US_1:%.*]] = load double, ptr [[TMP32]], align 8202; CHECK-NEXT: [[MUL_US_1:%.*]] = fmul double [[MATRIXEXT_US_1]], [[MATRIXEXT8_US_1]]203; CHECK-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[TMP57]]204; CHECK-NEXT: [[MATRIXEXT11_US_1:%.*]] = load double, ptr [[TMP60]], align 8205; CHECK-NEXT: [[SUB_US_1:%.*]] = fsub double [[MATRIXEXT11_US_1]], [[MUL_US_1]]206; CHECK-NEXT: store double [[SUB_US_1]], ptr [[TMP60]], align 8207; CHECK-NEXT: [[INDVARS_IV_NEXT_1]] = add nuw nsw i64 [[INDVARS_IV_1]], 1208; CHECK-NEXT: [[EXITCOND_NOT_1:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_1]], [[CONV6]]209; CHECK-NEXT: br i1 [[EXITCOND_NOT_1]], label [[VECTOR_MEMCHECK_2]], label [[FOR_BODY4_US_1]], !llvm.loop [[LOOP10]]210; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us.1:211; CHECK-NEXT: [[TMP62:%.*]] = icmp samesign ult i32 [[I]], 195212; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP62]])213; CHECK-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[CONV6]]214; CHECK-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP92]], i64 240215; CHECK-NEXT: [[MIN_ITERS_CHECK_2:%.*]] = icmp samesign ult i32 [[I]], 4216; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK_2]], label [[FOR_BODY4_US_PREHEADER_2:%.*]], label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US_1:%.*]]217; CHECK: vector.memcheck.2:218; CHECK-NEXT: [[BOUND0_2:%.*]] = icmp ult ptr [[B]], [[SCEVGEP20]]219; CHECK-NEXT: [[BOUND1_2:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]220; CHECK-NEXT: [[FOUND_CONFLICT_2:%.*]] = and i1 [[BOUND0_2]], [[BOUND1_2]]221; CHECK-NEXT: br i1 [[FOUND_CONFLICT_2]], label [[FOR_BODY4_US_PREHEADER_2]], label [[VECTOR_PH_2:%.*]]222; CHECK: vector.ph.2:223; CHECK-NEXT: [[N_VEC_2:%.*]] = and i64 [[CONV6]], 252224; CHECK-NEXT: br label [[VECTOR_BODY_2:%.*]]225; CHECK: vector.body.2:226; CHECK-NEXT: [[INDEX_2:%.*]] = phi i64 [ 0, [[VECTOR_PH_2]] ], [ [[INDEX_NEXT_2:%.*]], [[VECTOR_BODY_2]] ]227; CHECK-NEXT: [[TMP64:%.*]] = add nuw nsw i64 [[INDEX_2]], 30228; CHECK-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw double, ptr [[A]], i64 [[TMP64]]229; CHECK-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP78]], i64 16230; CHECK-NEXT: [[WIDE_LOAD_2:%.*]] = load <2 x double>, ptr [[TMP78]], align 8, !alias.scope [[META0]]231; CHECK-NEXT: [[WIDE_LOAD21_2:%.*]] = load <2 x double>, ptr [[TMP79]], align 8, !alias.scope [[META0]]232; CHECK-NEXT: [[TMP80:%.*]] = load double, ptr [[TMP63]], align 8, !alias.scope [[META3]]233; CHECK-NEXT: [[BROADCAST_SPLATINSERT22_2:%.*]] = insertelement <2 x double> poison, double [[TMP80]], i64 0234; CHECK-NEXT: [[BROADCAST_SPLAT23_2:%.*]] = shufflevector <2 x double> [[BROADCAST_SPLATINSERT22_2]], <2 x double> poison, <2 x i32> zeroinitializer235; CHECK-NEXT: [[TMP81:%.*]] = fmul <2 x double> [[WIDE_LOAD_2]], [[BROADCAST_SPLAT23_2]]236; CHECK-NEXT: [[TMP82:%.*]] = fmul <2 x double> [[WIDE_LOAD21_2]], [[BROADCAST_SPLAT23_2]]237; CHECK-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[TMP64]]238; CHECK-NEXT: [[TMP84:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP83]], i64 16239; CHECK-NEXT: [[WIDE_LOAD24_2:%.*]] = load <2 x double>, ptr [[TMP83]], align 8, !alias.scope [[META5]], !noalias [[META0]]240; CHECK-NEXT: [[WIDE_LOAD25_2:%.*]] = load <2 x double>, ptr [[TMP84]], align 8, !alias.scope [[META5]], !noalias [[META0]]241; CHECK-NEXT: [[TMP85:%.*]] = fsub <2 x double> [[WIDE_LOAD24_2]], [[TMP81]]242; CHECK-NEXT: [[TMP86:%.*]] = fsub <2 x double> [[WIDE_LOAD25_2]], [[TMP82]]243; CHECK-NEXT: store <2 x double> [[TMP85]], ptr [[TMP83]], align 8, !alias.scope [[META5]], !noalias [[META0]]244; CHECK-NEXT: store <2 x double> [[TMP86]], ptr [[TMP84]], align 8, !alias.scope [[META5]], !noalias [[META0]]245; CHECK-NEXT: [[INDEX_NEXT_2]] = add nuw i64 [[INDEX_2]], 4246; CHECK-NEXT: [[TMP87:%.*]] = icmp eq i64 [[INDEX_NEXT_2]], [[N_VEC_2]]247; CHECK-NEXT: br i1 [[TMP87]], label [[MIDDLE_BLOCK_2:%.*]], label [[VECTOR_BODY_2]], !llvm.loop [[LOOP7]]248; CHECK: middle.block.2:249; CHECK-NEXT: [[CMP_N_2:%.*]] = icmp eq i64 [[N_VEC_2]], [[CONV6]]250; CHECK-NEXT: br i1 [[CMP_N_2]], label [[VECTOR_MEMCHECK_3:%.*]], label [[FOR_BODY4_US_PREHEADER_2]]251; CHECK: for.body4.us.preheader.2:252; CHECK-NEXT: [[INDVARS_IV_PH_2:%.*]] = phi i64 [ 0, [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US_1]] ], [ 0, [[VECTOR_MEMCHECK_2]] ], [ [[N_VEC_2]], [[MIDDLE_BLOCK_2]] ]253; CHECK-NEXT: br label [[FOR_BODY4_US_2:%.*]]254; CHECK: for.body4.us.2:255; CHECK-NEXT: [[INDVARS_IV_2:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_2:%.*]], [[FOR_BODY4_US_2]] ], [ [[INDVARS_IV_PH_2]], [[FOR_BODY4_US_PREHEADER_2]] ]256; CHECK-NEXT: [[TMP88:%.*]] = add nuw nsw i64 [[INDVARS_IV_2]], 30257; CHECK-NEXT: [[TMP89:%.*]] = icmp samesign ult i64 [[INDVARS_IV_2]], 195258; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP89]])259; CHECK-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw double, ptr [[A]], i64 [[TMP88]]260; CHECK-NEXT: [[MATRIXEXT_US_2:%.*]] = load double, ptr [[TMP90]], align 8261; CHECK-NEXT: [[MATRIXEXT8_US_2:%.*]] = load double, ptr [[TMP63]], align 8262; CHECK-NEXT: [[MUL_US_2:%.*]] = fmul double [[MATRIXEXT_US_2]], [[MATRIXEXT8_US_2]]263; CHECK-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[TMP88]]264; CHECK-NEXT: [[MATRIXEXT11_US_2:%.*]] = load double, ptr [[TMP91]], align 8265; CHECK-NEXT: [[SUB_US_2:%.*]] = fsub double [[MATRIXEXT11_US_2]], [[MUL_US_2]]266; CHECK-NEXT: store double [[SUB_US_2]], ptr [[TMP91]], align 8267; CHECK-NEXT: [[INDVARS_IV_NEXT_2]] = add nuw nsw i64 [[INDVARS_IV_2]], 1268; CHECK-NEXT: [[EXITCOND_NOT_2:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_2]], [[CONV6]]269; CHECK-NEXT: br i1 [[EXITCOND_NOT_2]], label [[VECTOR_MEMCHECK_3]], label [[FOR_BODY4_US_2]], !llvm.loop [[LOOP10]]270; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us.2:271; CHECK-NEXT: [[TMP93:%.*]] = icmp samesign ult i32 [[I]], 180272; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP93]])273; CHECK-NEXT: [[TMP123:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[CONV6]]274; CHECK-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP123]], i64 360275; CHECK-NEXT: [[MIN_ITERS_CHECK_3:%.*]] = icmp samesign ult i32 [[I]], 4276; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK_3]], label [[FOR_BODY4_US_PREHEADER_3:%.*]], label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US_2:%.*]]277; CHECK: vector.memcheck.3:278; CHECK-NEXT: [[BOUND0_3:%.*]] = icmp ult ptr [[B]], [[SCEVGEP20]]279; CHECK-NEXT: [[BOUND1_3:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]]280; CHECK-NEXT: [[FOUND_CONFLICT_3:%.*]] = and i1 [[BOUND0_3]], [[BOUND1_3]]281; CHECK-NEXT: br i1 [[FOUND_CONFLICT_3]], label [[FOR_BODY4_US_PREHEADER_3]], label [[VECTOR_PH_3:%.*]]282; CHECK: vector.ph.3:283; CHECK-NEXT: [[N_VEC_3:%.*]] = and i64 [[CONV6]], 252284; CHECK-NEXT: br label [[VECTOR_BODY_3:%.*]]285; CHECK: vector.body.3:286; CHECK-NEXT: [[INDEX_3:%.*]] = phi i64 [ 0, [[VECTOR_PH_3]] ], [ [[INDEX_NEXT_3:%.*]], [[VECTOR_BODY_3]] ]287; CHECK-NEXT: [[TMP95:%.*]] = add nuw nsw i64 [[INDEX_3]], 45288; CHECK-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw double, ptr [[A]], i64 [[TMP95]]289; CHECK-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP109]], i64 16290; CHECK-NEXT: [[WIDE_LOAD_3:%.*]] = load <2 x double>, ptr [[TMP109]], align 8, !alias.scope [[META0]]291; CHECK-NEXT: [[WIDE_LOAD21_3:%.*]] = load <2 x double>, ptr [[TMP110]], align 8, !alias.scope [[META0]]292; CHECK-NEXT: [[TMP111:%.*]] = load double, ptr [[TMP94]], align 8, !alias.scope [[META3]]293; CHECK-NEXT: [[BROADCAST_SPLATINSERT22_3:%.*]] = insertelement <2 x double> poison, double [[TMP111]], i64 0294; CHECK-NEXT: [[BROADCAST_SPLAT23_3:%.*]] = shufflevector <2 x double> [[BROADCAST_SPLATINSERT22_3]], <2 x double> poison, <2 x i32> zeroinitializer295; CHECK-NEXT: [[TMP112:%.*]] = fmul <2 x double> [[WIDE_LOAD_3]], [[BROADCAST_SPLAT23_3]]296; CHECK-NEXT: [[TMP113:%.*]] = fmul <2 x double> [[WIDE_LOAD21_3]], [[BROADCAST_SPLAT23_3]]297; CHECK-NEXT: [[TMP114:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[TMP95]]298; CHECK-NEXT: [[TMP115:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP114]], i64 16299; CHECK-NEXT: [[WIDE_LOAD24_3:%.*]] = load <2 x double>, ptr [[TMP114]], align 8, !alias.scope [[META5]], !noalias [[META0]]300; CHECK-NEXT: [[WIDE_LOAD25_3:%.*]] = load <2 x double>, ptr [[TMP115]], align 8, !alias.scope [[META5]], !noalias [[META0]]301; CHECK-NEXT: [[TMP116:%.*]] = fsub <2 x double> [[WIDE_LOAD24_3]], [[TMP112]]302; CHECK-NEXT: [[TMP117:%.*]] = fsub <2 x double> [[WIDE_LOAD25_3]], [[TMP113]]303; CHECK-NEXT: store <2 x double> [[TMP116]], ptr [[TMP114]], align 8, !alias.scope [[META5]], !noalias [[META0]]304; CHECK-NEXT: store <2 x double> [[TMP117]], ptr [[TMP115]], align 8, !alias.scope [[META5]], !noalias [[META0]]305; CHECK-NEXT: [[INDEX_NEXT_3]] = add nuw i64 [[INDEX_3]], 4306; CHECK-NEXT: [[TMP118:%.*]] = icmp eq i64 [[INDEX_NEXT_3]], [[N_VEC_3]]307; CHECK-NEXT: br i1 [[TMP118]], label [[MIDDLE_BLOCK_3:%.*]], label [[VECTOR_BODY_3]], !llvm.loop [[LOOP7]]308; CHECK: middle.block.3:309; CHECK-NEXT: [[CMP_N_3:%.*]] = icmp eq i64 [[N_VEC_3]], [[CONV6]]310; CHECK-NEXT: br i1 [[CMP_N_3]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY4_US_PREHEADER_3]]311; CHECK: for.body4.us.preheader.3:312; CHECK-NEXT: [[INDVARS_IV_PH_3:%.*]] = phi i64 [ 0, [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US_2]] ], [ 0, [[VECTOR_MEMCHECK_3]] ], [ [[N_VEC_3]], [[MIDDLE_BLOCK_3]] ]313; CHECK-NEXT: br label [[FOR_BODY4_US_3:%.*]]314; CHECK: for.body4.us.3:315; CHECK-NEXT: [[INDVARS_IV_3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_3:%.*]], [[FOR_BODY4_US_3]] ], [ [[INDVARS_IV_PH_3]], [[FOR_BODY4_US_PREHEADER_3]] ]316; CHECK-NEXT: [[TMP119:%.*]] = add nuw nsw i64 [[INDVARS_IV_3]], 45317; CHECK-NEXT: [[TMP120:%.*]] = icmp samesign ult i64 [[INDVARS_IV_3]], 180318; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP120]])319; CHECK-NEXT: [[TMP121:%.*]] = getelementptr inbounds nuw double, ptr [[A]], i64 [[TMP119]]320; CHECK-NEXT: [[MATRIXEXT_US_3:%.*]] = load double, ptr [[TMP121]], align 8321; CHECK-NEXT: [[MATRIXEXT8_US_3:%.*]] = load double, ptr [[TMP94]], align 8322; CHECK-NEXT: [[MUL_US_3:%.*]] = fmul double [[MATRIXEXT_US_3]], [[MATRIXEXT8_US_3]]323; CHECK-NEXT: [[TMP122:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[TMP119]]324; CHECK-NEXT: [[MATRIXEXT11_US_3:%.*]] = load double, ptr [[TMP122]], align 8325; CHECK-NEXT: [[SUB_US_3:%.*]] = fsub double [[MATRIXEXT11_US_3]], [[MUL_US_3]]326; CHECK-NEXT: store double [[SUB_US_3]], ptr [[TMP122]], align 8327; CHECK-NEXT: [[INDVARS_IV_NEXT_3]] = add nuw nsw i64 [[INDVARS_IV_3]], 1328; CHECK-NEXT: [[EXITCOND_NOT_3:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_3]], [[CONV6]]329; CHECK-NEXT: br i1 [[EXITCOND_NOT_3]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY4_US_3]], !llvm.loop [[LOOP10]]330; CHECK: for.cond.cleanup:331; CHECK-NEXT: ret void332;333entry:334 %i.addr = alloca i32, align 4335 %A.addr = alloca ptr, align 8336 %B.addr = alloca ptr, align 8337 %j = alloca i32, align 4338 %cleanup.dest.slot = alloca i32, align 4339 %k = alloca i32, align 4340 store i32 %i, ptr %i.addr, align 4341 store ptr %A, ptr %A.addr, align 8342 store ptr %B, ptr %B.addr, align 8343 call void @llvm.lifetime.start.p0(ptr %j) #3344 store i32 0, ptr %j, align 4345 br label %for.cond346 347for.cond: ; preds = %for.inc12, %entry348 %0 = load i32, ptr %j, align 4349 %cmp = icmp ult i32 %0, 4350 br i1 %cmp, label %for.body, label %for.cond.cleanup351 352for.cond.cleanup: ; preds = %for.cond353 store i32 2, ptr %cleanup.dest.slot, align 4354 call void @llvm.lifetime.end.p0(ptr %j) #3355 br label %for.end14356 357for.body: ; preds = %for.cond358 call void @llvm.lifetime.start.p0(ptr %k) #3359 store i32 0, ptr %k, align 4360 br label %for.cond1361 362for.cond1: ; preds = %for.inc, %for.body363 %1 = load i32, ptr %k, align 4364 %2 = load i32, ptr %i.addr, align 4365 %cmp2 = icmp ult i32 %1, %2366 br i1 %cmp2, label %for.body4, label %for.cond.cleanup3367 368for.cond.cleanup3: ; preds = %for.cond1369 store i32 5, ptr %cleanup.dest.slot, align 4370 call void @llvm.lifetime.end.p0(ptr %k) #3371 br label %for.end372 373for.body4: ; preds = %for.cond1374 %3 = load i32, ptr %k, align 4375 %conv = zext i32 %3 to i64376 %4 = load i32, ptr %j, align 4377 %conv5 = zext i32 %4 to i64378 %5 = mul i64 %conv5, 15379 %6 = add i64 %5, %conv380 %7 = icmp ult i64 %6, 225381 call void @llvm.assume(i1 %7)382 %8 = load ptr, ptr %A.addr, align 8383 %9 = load <225 x double>, ptr %8, align 8384 %matrixext = extractelement <225 x double> %9, i64 %6385 %10 = load i32, ptr %i.addr, align 4386 %conv6 = zext i32 %10 to i64387 %11 = load i32, ptr %j, align 4388 %conv7 = zext i32 %11 to i64389 %12 = mul i64 %conv7, 15390 %13 = add i64 %12, %conv6391 %14 = icmp ult i64 %13, 225392 call void @llvm.assume(i1 %14)393 %15 = load ptr, ptr %B.addr, align 8394 %16 = load <225 x double>, ptr %15, align 8395 %matrixext8 = extractelement <225 x double> %16, i64 %13396 %mul = fmul double %matrixext, %matrixext8397 %17 = load ptr, ptr %B.addr, align 8398 %18 = load i32, ptr %k, align 4399 %conv9 = zext i32 %18 to i64400 %19 = load i32, ptr %j, align 4401 %conv10 = zext i32 %19 to i64402 %20 = mul i64 %conv10, 15403 %21 = add i64 %20, %conv9404 %22 = icmp ult i64 %21, 225405 call void @llvm.assume(i1 %22)406 %23 = load <225 x double>, ptr %17, align 8407 %matrixext11 = extractelement <225 x double> %23, i64 %21408 %sub = fsub double %matrixext11, %mul409 %24 = icmp ult i64 %21, 225410 call void @llvm.assume(i1 %24)411 %25 = load <225 x double>, ptr %17, align 8412 %matins = insertelement <225 x double> %25, double %sub, i64 %21413 store <225 x double> %matins, ptr %17, align 8414 br label %for.inc415 416for.inc: ; preds = %for.body4417 %26 = load i32, ptr %k, align 4418 %inc = add i32 %26, 1419 store i32 %inc, ptr %k, align 4420 br label %for.cond1421 422for.end: ; preds = %for.cond.cleanup3423 br label %for.inc12424 425for.inc12: ; preds = %for.end426 %27 = load i32, ptr %j, align 4427 %inc13 = add i32 %27, 1428 store i32 %inc13, ptr %j, align 4429 br label %for.cond430 431for.end14: ; preds = %for.cond.cleanup432 ret void433}434 435; Function Attrs: argmemonly nofree nosync nounwind willreturn436declare void @llvm.lifetime.start.p0(ptr nocapture) #1437 438; Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn439declare void @llvm.assume(i1 noundef) #2440 441; Function Attrs: argmemonly nofree nosync nounwind willreturn442declare void @llvm.lifetime.end.p0(ptr nocapture) #1443 444; Function Attrs: nounwind ssp uwtable mustprogress445 446define <4 x float> @reverse_hadd_v4f32(<4 x float> %a, <4 x float> %b) {447; CHECK-LABEL: @reverse_hadd_v4f32(448; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[B:%.*]], <4 x float> [[A:%.*]], <4 x i32> <i32 2, i32 0, i32 6, i32 4>449; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[B]], <4 x float> [[A]], <4 x i32> <i32 3, i32 1, i32 7, i32 5>450; CHECK-NEXT: [[TMP3:%.*]] = fadd <4 x float> [[TMP1]], [[TMP2]]451; CHECK-NEXT: ret <4 x float> [[TMP3]]452;453 %vecext = extractelement <4 x float> %a, i32 0454 %vecext1 = extractelement <4 x float> %a, i32 1455 %add = fadd float %vecext, %vecext1456 %vecinit = insertelement <4 x float> undef, float %add, i32 0457 %vecext2 = extractelement <4 x float> %a, i32 2458 %vecext3 = extractelement <4 x float> %a, i32 3459 %add4 = fadd float %vecext2, %vecext3460 %vecinit5 = insertelement <4 x float> %vecinit, float %add4, i32 1461 %vecext6 = extractelement <4 x float> %b, i32 0462 %vecext7 = extractelement <4 x float> %b, i32 1463 %add8 = fadd float %vecext6, %vecext7464 %vecinit9 = insertelement <4 x float> %vecinit5, float %add8, i32 2465 %vecext10 = extractelement <4 x float> %b, i32 2466 %vecext11 = extractelement <4 x float> %b, i32 3467 %add12 = fadd float %vecext10, %vecext11468 %vecinit13 = insertelement <4 x float> %vecinit9, float %add12, i32 3469 %shuffle = shufflevector <4 x float> %vecinit13, <4 x float> %a, <4 x i32> <i32 3, i32 2, i32 1, i32 0>470 ret <4 x float> %shuffle471}472