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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -passes="default<O3>" -S < %s | FileCheck %s3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"5target triple = "aarch64"6 7define nofpclass(nan inf) double @monte_simple(i32 noundef %nblocks, i32 noundef %RAND_BLOCK_LENGTH, ptr noundef %samples, double noundef nofpclass(nan inf) %Y, double noundef nofpclass(nan inf) %Z) {8; CHECK-LABEL: define nofpclass(nan inf) double @monte_simple(9; CHECK-SAME: i32 noundef [[NBLOCKS:%.*]], i32 noundef [[RAND_BLOCK_LENGTH:%.*]], ptr noundef readonly captures(none) [[SAMPLES:%.*]], double noundef nofpclass(nan inf) [[Y:%.*]], double noundef nofpclass(nan inf) [[Z:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {10; CHECK-NEXT: [[ENTRY:.*]]:11; CHECK-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[RAND_BLOCK_LENGTH]], 012; CHECK-NEXT: br i1 [[CMP8]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]]13; CHECK: [[FOR_BODY_PREHEADER]]:14; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext nneg i32 [[RAND_BLOCK_LENGTH]] to i6415; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[RAND_BLOCK_LENGTH]], 816; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[FOR_BODY_PREHEADER22:.*]], label %[[VECTOR_PH:.*]]17; CHECK: [[VECTOR_PH]]:18; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 214748364019; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[Y]], i64 020; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer21; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x double> poison, double [[Z]], i64 022; CHECK-NEXT: [[BROADCAST_SPLAT15:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT14]], <4 x double> poison, <4 x i32> zeroinitializer23; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]24; CHECK: [[VECTOR_BODY]]:25; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]26; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x double> [ <double 0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %[[VECTOR_PH]] ], [ [[TMP18:%.*]], %[[VECTOR_BODY]] ]27; CHECK-NEXT: [[VEC_PHI16:%.*]] = phi <4 x double> [ splat (double -0.000000e+00), %[[VECTOR_PH]] ], [ [[TMP19:%.*]], %[[VECTOR_BODY]] ]28; CHECK-NEXT: [[VEC_PHI17:%.*]] = phi <4 x double> [ <double 0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %[[VECTOR_PH]] ], [ [[TMP14:%.*]], %[[VECTOR_BODY]] ]29; CHECK-NEXT: [[VEC_PHI18:%.*]] = phi <4 x double> [ splat (double -0.000000e+00), %[[VECTOR_PH]] ], [ [[TMP15:%.*]], %[[VECTOR_BODY]] ]30; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[SAMPLES]], i64 [[INDVARS_IV]]31; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX]], i64 1632; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 433; CHECK-NEXT: [[WIDE_LOAD19:%.*]] = load <4 x float>, ptr [[TMP1]], align 434; CHECK-NEXT: [[TMP2:%.*]] = fpext <4 x float> [[WIDE_LOAD]] to <4 x double>35; CHECK-NEXT: [[TMP3:%.*]] = fpext <4 x float> [[WIDE_LOAD19]] to <4 x double>36; CHECK-NEXT: [[TMP4:%.*]] = fmul fast <4 x double> [[BROADCAST_SPLAT]], [[TMP2]]37; CHECK-NEXT: [[TMP5:%.*]] = fmul fast <4 x double> [[BROADCAST_SPLAT]], [[TMP3]]38; CHECK-NEXT: [[TMP6:%.*]] = fsub fast <4 x double> [[TMP4]], [[BROADCAST_SPLAT15]]39; CHECK-NEXT: [[TMP7:%.*]] = fsub fast <4 x double> [[TMP5]], [[BROADCAST_SPLAT15]]40; CHECK-NEXT: [[TMP8:%.*]] = fcmp fast ogt <4 x double> [[TMP6]], zeroinitializer41; CHECK-NEXT: [[TMP9:%.*]] = fcmp fast ogt <4 x double> [[TMP7]], zeroinitializer42; CHECK-NEXT: [[TMP10:%.*]] = fmul fast <4 x double> [[TMP6]], [[TMP6]]43; CHECK-NEXT: [[TMP11:%.*]] = fmul fast <4 x double> [[TMP7]], [[TMP7]]44; CHECK-NEXT: [[TMP12:%.*]] = select ninf <4 x i1> [[TMP8]], <4 x double> [[TMP6]], <4 x double> splat (double -0.000000e+00)45; CHECK-NEXT: [[TMP13:%.*]] = select ninf <4 x i1> [[TMP9]], <4 x double> [[TMP7]], <4 x double> splat (double -0.000000e+00)46; CHECK-NEXT: [[TMP14]] = fadd reassoc arcp contract afn <4 x double> [[VEC_PHI17]], [[TMP12]]47; CHECK-NEXT: [[TMP15]] = fadd reassoc arcp contract afn <4 x double> [[VEC_PHI18]], [[TMP13]]48; CHECK-NEXT: [[TMP16:%.*]] = select ninf <4 x i1> [[TMP8]], <4 x double> [[TMP10]], <4 x double> splat (double -0.000000e+00)49; CHECK-NEXT: [[TMP17:%.*]] = select ninf <4 x i1> [[TMP9]], <4 x double> [[TMP11]], <4 x double> splat (double -0.000000e+00)50; CHECK-NEXT: [[TMP18]] = fadd reassoc arcp contract afn <4 x double> [[VEC_PHI]], [[TMP16]]51; CHECK-NEXT: [[TMP19]] = fadd reassoc arcp contract afn <4 x double> [[VEC_PHI16]], [[TMP17]]52; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDVARS_IV]], 853; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]54; CHECK-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]55; CHECK: [[MIDDLE_BLOCK]]:56; CHECK-NEXT: [[BIN_RDX:%.*]] = fadd reassoc arcp contract afn <4 x double> [[TMP19]], [[TMP18]]57; CHECK-NEXT: [[TMP21:%.*]] = tail call reassoc arcp contract afn double @llvm.vector.reduce.fadd.v4f64(double -0.000000e+00, <4 x double> [[BIN_RDX]])58; CHECK-NEXT: [[BIN_RDX20:%.*]] = fadd reassoc arcp contract afn <4 x double> [[TMP15]], [[TMP14]]59; CHECK-NEXT: [[TMP22:%.*]] = tail call reassoc arcp contract afn double @llvm.vector.reduce.fadd.v4f64(double -0.000000e+00, <4 x double> [[BIN_RDX20]])60; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[WIDE_TRIP_COUNT]]61; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[FOR_BODY_PREHEADER22]]62; CHECK: [[FOR_BODY_PREHEADER22]]:63; CHECK-NEXT: [[INDVARS_IV_PH:%.*]] = phi i64 [ 0, %[[FOR_BODY_PREHEADER]] ], [ [[N_VEC]], %[[MIDDLE_BLOCK]] ]64; CHECK-NEXT: [[V1_011_PH:%.*]] = phi double [ 0.000000e+00, %[[FOR_BODY_PREHEADER]] ], [ [[TMP21]], %[[MIDDLE_BLOCK]] ]65; CHECK-NEXT: [[V0_010_PH:%.*]] = phi double [ 0.000000e+00, %[[FOR_BODY_PREHEADER]] ], [ [[TMP22]], %[[MIDDLE_BLOCK]] ]66; CHECK-NEXT: br label %[[FOR_BODY:.*]]67; CHECK: [[FOR_BODY]]:68; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[INDVARS_IV_PH]], %[[FOR_BODY_PREHEADER22]] ]69; CHECK-NEXT: [[V1_012:%.*]] = phi double [ [[V1_2:%.*]], %[[FOR_BODY]] ], [ [[V1_011_PH]], %[[FOR_BODY_PREHEADER22]] ]70; CHECK-NEXT: [[V0_011:%.*]] = phi double [ [[V0_2:%.*]], %[[FOR_BODY]] ], [ [[V0_010_PH]], %[[FOR_BODY_PREHEADER22]] ]71; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw float, ptr [[SAMPLES]], i64 [[INDVARS_IV1]]72; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX1]], align 473; CHECK-NEXT: [[CONV:%.*]] = fpext float [[TMP0]] to double74; CHECK-NEXT: [[MUL:%.*]] = fmul fast double [[Y]], [[CONV]]75; CHECK-NEXT: [[SUB:%.*]] = fsub fast double [[MUL]], [[Z]]76; CHECK-NEXT: [[CMP1:%.*]] = fcmp fast ogt double [[SUB]], 0.000000e+0077; CHECK-NEXT: [[MUL3:%.*]] = fmul fast double [[SUB]], [[SUB]]78; CHECK-NEXT: [[ADD8:%.*]] = select ninf i1 [[CMP1]], double [[SUB]], double -0.000000e+0079; CHECK-NEXT: [[V0_2]] = fadd reassoc arcp contract afn double [[V0_011]], [[ADD8]]80; CHECK-NEXT: [[ADD4:%.*]] = select ninf i1 [[CMP1]], double [[MUL3]], double -0.000000e+0081; CHECK-NEXT: [[V1_2]] = fadd reassoc arcp contract afn double [[V1_012]], [[ADD4]]82; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 183; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]84; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]85; CHECK: [[FOR_END_LOOPEXIT]]:86; CHECK-NEXT: [[V0_1_LCSSA:%.*]] = phi double [ [[TMP22]], %[[MIDDLE_BLOCK]] ], [ [[V0_2]], %[[FOR_BODY]] ]87; CHECK-NEXT: [[V1_1_LCSSA:%.*]] = phi double [ [[TMP21]], %[[MIDDLE_BLOCK]] ], [ [[V1_2]], %[[FOR_BODY]] ]88; CHECK-NEXT: [[TMP24:%.*]] = fadd fast double [[V1_1_LCSSA]], [[V0_1_LCSSA]]89; CHECK-NEXT: br label %[[FOR_END]]90; CHECK: [[FOR_END]]:91; CHECK-NEXT: [[ADD5:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[TMP24]], %[[FOR_END_LOOPEXIT]] ]92; CHECK-NEXT: ret double [[ADD5]]93;94entry:95 %nblocks.addr = alloca i32, align 496 %RAND_BLOCK_LENGTH.addr = alloca i32, align 497 %samples.addr = alloca ptr, align 898 %Y.addr = alloca double, align 899 %Z.addr = alloca double, align 8100 %i = alloca i32, align 4101 %block = alloca i32, align 4102 %rngVal = alloca double, align 8103 %callValue = alloca double, align 8104 %v0 = alloca double, align 8105 %v1 = alloca double, align 8106 store i32 %nblocks, ptr %nblocks.addr, align 4107 store i32 %RAND_BLOCK_LENGTH, ptr %RAND_BLOCK_LENGTH.addr, align 4108 store ptr %samples, ptr %samples.addr, align 8109 store double %Y, ptr %Y.addr, align 8110 store double %Z, ptr %Z.addr, align 8111 call void @llvm.lifetime.start.p0(ptr %i) #2112 call void @llvm.lifetime.start.p0(ptr %block) #2113 call void @llvm.lifetime.start.p0(ptr %rngVal) #2114 call void @llvm.lifetime.start.p0(ptr %callValue) #2115 call void @llvm.lifetime.start.p0(ptr %v0) #2116 store double 0.000000e+00, ptr %v0, align 8117 call void @llvm.lifetime.start.p0(ptr %v1) #2118 store double 0.000000e+00, ptr %v1, align 8119 store i32 0, ptr %i, align 4120 br label %for.cond121 122for.cond: ; preds = %for.inc, %entry123 %0 = load i32, ptr %i, align 4124 %1 = load i32, ptr %RAND_BLOCK_LENGTH.addr, align 4125 %cmp = icmp slt i32 %0, %1126 br i1 %cmp, label %for.body, label %for.end127 128for.body: ; preds = %for.cond129 %2 = load ptr, ptr %samples.addr, align 8130 %3 = load i32, ptr %i, align 4131 %idxprom = sext i32 %3 to i64132 %arrayidx = getelementptr inbounds float, ptr %2, i64 %idxprom133 %4 = load float, ptr %arrayidx, align 4134 %conv = fpext float %4 to double135 store double %conv, ptr %rngVal, align 8136 %5 = load double, ptr %Y.addr, align 8137 %6 = load double, ptr %rngVal, align 8138 %mul = fmul fast double %5, %6139 %7 = load double, ptr %Z.addr, align 8140 %sub = fsub fast double %mul, %7141 store double %sub, ptr %callValue, align 8142 %8 = load double, ptr %callValue, align 8143 %cmp1 = fcmp fast ogt double %8, 0.000000e+00144 br i1 %cmp1, label %if.then, label %if.end145 146if.then: ; preds = %for.body147 %9 = load double, ptr %callValue, align 8148 %10 = load double, ptr %v0, align 8149 %add = fadd fast double %10, %9150 store double %add, ptr %v0, align 8151 %11 = load double, ptr %callValue, align 8152 %12 = load double, ptr %callValue, align 8153 %mul3 = fmul fast double %11, %12154 %13 = load double, ptr %v1, align 8155 %add4 = fadd fast double %13, %mul3156 store double %add4, ptr %v1, align 8157 br label %if.end158 159if.end: ; preds = %if.then, %for.body160 br label %for.inc161 162for.inc: ; preds = %if.end163 %14 = load i32, ptr %i, align 4164 %inc = add nsw i32 %14, 1165 store i32 %inc, ptr %i, align 4166 br label %for.cond167 168for.end: ; preds = %for.cond169 %15 = load double, ptr %v0, align 8170 %16 = load double, ptr %v1, align 8171 %add5 = fadd fast double %15, %16172 call void @llvm.lifetime.end.p0(ptr %v1) #2173 call void @llvm.lifetime.end.p0(ptr %v0) #2174 call void @llvm.lifetime.end.p0(ptr %callValue) #2175 call void @llvm.lifetime.end.p0(ptr %rngVal) #2176 call void @llvm.lifetime.end.p0(ptr %block) #2177 call void @llvm.lifetime.end.p0(ptr %i) #2178 ret double %add5179}180 181define nofpclass(nan inf) double @monte_exp(i32 noundef %nblocks, i32 noundef %RAND_BLOCK_LENGTH, ptr noundef %samples, double noundef nofpclass(nan inf) %Y, double noundef nofpclass(nan inf) %Z) {182; CHECK-LABEL: define nofpclass(nan inf) double @monte_exp(183; CHECK-SAME: i32 noundef [[NBLOCKS:%.*]], i32 noundef [[RAND_BLOCK_LENGTH:%.*]], ptr noundef [[SAMPLES:%.*]], double noundef nofpclass(nan inf) [[Y:%.*]], double noundef nofpclass(nan inf) [[Z:%.*]]) local_unnamed_addr {184; CHECK-NEXT: [[ENTRY:.*]]:185; CHECK-NEXT: [[CMP16:%.*]] = icmp sgt i32 [[NBLOCKS]], 0186; CHECK-NEXT: br i1 [[CMP16]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END10:.*]]187; CHECK: [[FOR_BODY_LR_PH]]:188; CHECK-NEXT: [[CMP211:%.*]] = icmp sgt i32 [[RAND_BLOCK_LENGTH]], 0189; CHECK-NEXT: br i1 [[CMP211]], label %[[FOR_BODY_US_PREHEADER:.*]], label %[[FOR_BODY:.*]]190; CHECK: [[FOR_BODY_US_PREHEADER]]:191; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext nneg i32 [[RAND_BLOCK_LENGTH]] to i64192; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[RAND_BLOCK_LENGTH]], 8193; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 2147483640194; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[Y]], i64 0195; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer196; CHECK-NEXT: [[BROADCAST_SPLATINSERT29:%.*]] = insertelement <4 x double> poison, double [[Z]], i64 0197; CHECK-NEXT: [[BROADCAST_SPLAT30:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT29]], <4 x double> poison, <4 x i32> zeroinitializer198; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[WIDE_TRIP_COUNT]]199; CHECK-NEXT: br label %[[FOR_BODY_US:.*]]200; CHECK: [[FOR_BODY_US]]:201; CHECK-NEXT: [[V1_019_US:%.*]] = phi double [ [[V1_2_US_LCSSA:%.*]], %[[FOR_COND1_FOR_INC8_CRIT_EDGE_US:.*]] ], [ 0.000000e+00, %[[FOR_BODY_US_PREHEADER]] ]202; CHECK-NEXT: [[V0_018_US:%.*]] = phi double [ [[V0_2_US_LCSSA:%.*]], %[[FOR_COND1_FOR_INC8_CRIT_EDGE_US]] ], [ 0.000000e+00, %[[FOR_BODY_US_PREHEADER]] ]203; CHECK-NEXT: [[BLOCK_017_US:%.*]] = phi i32 [ [[INC9_US:%.*]], %[[FOR_COND1_FOR_INC8_CRIT_EDGE_US]] ], [ 0, %[[FOR_BODY_US_PREHEADER]] ]204; CHECK-NEXT: tail call void @resample(i32 noundef [[RAND_BLOCK_LENGTH]], ptr noundef [[SAMPLES]])205; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[FOR_BODY3_US_PREHEADER:.*]], label %[[VECTOR_PH:.*]]206; CHECK: [[VECTOR_PH]]:207; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x double> <double poison, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, double [[V1_019_US]], i64 0208; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x double> <double poison, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, double [[V0_018_US]], i64 0209; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]210; CHECK: [[VECTOR_BODY]]:211; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]212; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x double> [ [[TMP2]], %[[VECTOR_PH]] ], [ [[TMP22:%.*]], %[[VECTOR_BODY]] ]213; CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x double> [ splat (double -0.000000e+00), %[[VECTOR_PH]] ], [ [[TMP23:%.*]], %[[VECTOR_BODY]] ]214; CHECK-NEXT: [[VEC_PHI32:%.*]] = phi <4 x double> [ [[TMP27]], %[[VECTOR_PH]] ], [ [[TMP18:%.*]], %[[VECTOR_BODY]] ]215; CHECK-NEXT: [[VEC_PHI33:%.*]] = phi <4 x double> [ splat (double -0.000000e+00), %[[VECTOR_PH]] ], [ [[TMP19:%.*]], %[[VECTOR_BODY]] ]216; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds nuw float, ptr [[SAMPLES]], i64 [[INDVARS_IV]]217; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX_US]], i64 16218; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[ARRAYIDX_US]], align 4219; CHECK-NEXT: [[WIDE_LOAD34:%.*]] = load <4 x float>, ptr [[TMP3]], align 4220; CHECK-NEXT: [[TMP4:%.*]] = fpext <4 x float> [[WIDE_LOAD]] to <4 x double>221; CHECK-NEXT: [[TMP5:%.*]] = fpext <4 x float> [[WIDE_LOAD34]] to <4 x double>222; CHECK-NEXT: [[TMP6:%.*]] = tail call fast <4 x double> @llvm.exp2.v4f64(<4 x double> [[TMP4]])223; CHECK-NEXT: [[TMP7:%.*]] = tail call fast <4 x double> @llvm.exp2.v4f64(<4 x double> [[TMP5]])224; CHECK-NEXT: [[TMP8:%.*]] = fmul fast <4 x double> [[TMP6]], [[BROADCAST_SPLAT]]225; CHECK-NEXT: [[TMP9:%.*]] = fmul fast <4 x double> [[TMP7]], [[BROADCAST_SPLAT]]226; CHECK-NEXT: [[TMP10:%.*]] = fsub fast <4 x double> [[TMP8]], [[BROADCAST_SPLAT30]]227; CHECK-NEXT: [[TMP11:%.*]] = fsub fast <4 x double> [[TMP9]], [[BROADCAST_SPLAT30]]228; CHECK-NEXT: [[TMP12:%.*]] = fcmp fast ogt <4 x double> [[TMP10]], zeroinitializer229; CHECK-NEXT: [[TMP13:%.*]] = fcmp fast ogt <4 x double> [[TMP11]], zeroinitializer230; CHECK-NEXT: [[TMP14:%.*]] = fmul fast <4 x double> [[TMP10]], [[TMP10]]231; CHECK-NEXT: [[TMP15:%.*]] = fmul fast <4 x double> [[TMP11]], [[TMP11]]232; CHECK-NEXT: [[TMP16:%.*]] = select ninf <4 x i1> [[TMP12]], <4 x double> [[TMP10]], <4 x double> splat (double -0.000000e+00)233; CHECK-NEXT: [[TMP17:%.*]] = select ninf <4 x i1> [[TMP13]], <4 x double> [[TMP11]], <4 x double> splat (double -0.000000e+00)234; CHECK-NEXT: [[TMP18]] = fadd reassoc arcp contract afn <4 x double> [[VEC_PHI32]], [[TMP16]]235; CHECK-NEXT: [[TMP19]] = fadd reassoc arcp contract afn <4 x double> [[VEC_PHI33]], [[TMP17]]236; CHECK-NEXT: [[TMP20:%.*]] = select ninf <4 x i1> [[TMP12]], <4 x double> [[TMP14]], <4 x double> splat (double -0.000000e+00)237; CHECK-NEXT: [[TMP21:%.*]] = select ninf <4 x i1> [[TMP13]], <4 x double> [[TMP15]], <4 x double> splat (double -0.000000e+00)238; CHECK-NEXT: [[TMP22]] = fadd reassoc arcp contract afn <4 x double> [[VEC_PHI]], [[TMP20]]239; CHECK-NEXT: [[TMP23]] = fadd reassoc arcp contract afn <4 x double> [[VEC_PHI31]], [[TMP21]]240; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDVARS_IV]], 8241; CHECK-NEXT: [[TMP24:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]242; CHECK-NEXT: br i1 [[TMP24]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]243; CHECK: [[MIDDLE_BLOCK]]:244; CHECK-NEXT: [[BIN_RDX:%.*]] = fadd reassoc arcp contract afn <4 x double> [[TMP23]], [[TMP22]]245; CHECK-NEXT: [[TMP25:%.*]] = tail call reassoc arcp contract afn double @llvm.vector.reduce.fadd.v4f64(double -0.000000e+00, <4 x double> [[BIN_RDX]])246; CHECK-NEXT: [[BIN_RDX35:%.*]] = fadd reassoc arcp contract afn <4 x double> [[TMP19]], [[TMP18]]247; CHECK-NEXT: [[TMP26:%.*]] = tail call reassoc arcp contract afn double @llvm.vector.reduce.fadd.v4f64(double -0.000000e+00, <4 x double> [[BIN_RDX35]])248; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND1_FOR_INC8_CRIT_EDGE_US]], label %[[FOR_BODY3_US_PREHEADER]]249; CHECK: [[FOR_BODY3_US_PREHEADER]]:250; CHECK-NEXT: [[INDVARS_IV_PH:%.*]] = phi i64 [ 0, %[[FOR_BODY_US]] ], [ [[N_VEC]], %[[MIDDLE_BLOCK]] ]251; CHECK-NEXT: [[V1_114_US_PH:%.*]] = phi double [ [[V1_019_US]], %[[FOR_BODY_US]] ], [ [[TMP25]], %[[MIDDLE_BLOCK]] ]252; CHECK-NEXT: [[V0_113_US_PH:%.*]] = phi double [ [[V0_018_US]], %[[FOR_BODY_US]] ], [ [[TMP26]], %[[MIDDLE_BLOCK]] ]253; CHECK-NEXT: br label %[[FOR_BODY3_US:.*]]254; CHECK: [[FOR_BODY3_US]]:255; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY3_US]] ], [ [[INDVARS_IV_PH]], %[[FOR_BODY3_US_PREHEADER]] ]256; CHECK-NEXT: [[V1_116_US:%.*]] = phi double [ [[V1_2_US:%.*]], %[[FOR_BODY3_US]] ], [ [[V1_114_US_PH]], %[[FOR_BODY3_US_PREHEADER]] ]257; CHECK-NEXT: [[V0_115_US:%.*]] = phi double [ [[V0_2_US:%.*]], %[[FOR_BODY3_US]] ], [ [[V0_113_US_PH]], %[[FOR_BODY3_US_PREHEADER]] ]258; CHECK-NEXT: [[ARRAYIDX_US1:%.*]] = getelementptr inbounds nuw float, ptr [[SAMPLES]], i64 [[INDVARS_IV1]]259; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX_US1]], align 4260; CHECK-NEXT: [[CONV_US:%.*]] = fpext float [[TMP0]] to double261; CHECK-NEXT: [[TMP1:%.*]] = tail call fast double @llvm.exp2.f64(double [[CONV_US]])262; CHECK-NEXT: [[MUL_US:%.*]] = fmul fast double [[TMP1]], [[Y]]263; CHECK-NEXT: [[SUB_US:%.*]] = fsub fast double [[MUL_US]], [[Z]]264; CHECK-NEXT: [[CMP4_US:%.*]] = fcmp fast ogt double [[SUB_US]], 0.000000e+00265; CHECK-NEXT: [[ADD7_US:%.*]] = fmul fast double [[SUB_US]], [[SUB_US]]266; CHECK-NEXT: [[ADD12_US:%.*]] = select ninf i1 [[CMP4_US]], double [[SUB_US]], double -0.000000e+00267; CHECK-NEXT: [[V0_2_US]] = fadd reassoc arcp contract afn double [[V0_115_US]], [[ADD12_US]]268; CHECK-NEXT: [[ADD7_US1:%.*]] = select ninf i1 [[CMP4_US]], double [[ADD7_US]], double -0.000000e+00269; CHECK-NEXT: [[V1_2_US]] = fadd reassoc arcp contract afn double [[V1_116_US]], [[ADD7_US1]]270; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1271; CHECK-NEXT: [[EXITCOND25_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]272; CHECK-NEXT: br i1 [[EXITCOND25_NOT]], label %[[FOR_COND1_FOR_INC8_CRIT_EDGE_US]], label %[[FOR_BODY3_US]], !llvm.loop [[LOOP5:![0-9]+]]273; CHECK: [[FOR_COND1_FOR_INC8_CRIT_EDGE_US]]:274; CHECK-NEXT: [[V0_2_US_LCSSA]] = phi double [ [[TMP26]], %[[MIDDLE_BLOCK]] ], [ [[V0_2_US]], %[[FOR_BODY3_US]] ]275; CHECK-NEXT: [[V1_2_US_LCSSA]] = phi double [ [[TMP25]], %[[MIDDLE_BLOCK]] ], [ [[V1_2_US]], %[[FOR_BODY3_US]] ]276; CHECK-NEXT: [[INC9_US]] = add nuw nsw i32 [[BLOCK_017_US]], 1277; CHECK-NEXT: [[EXITCOND26_NOT:%.*]] = icmp eq i32 [[INC9_US]], [[NBLOCKS]]278; CHECK-NEXT: br i1 [[EXITCOND26_NOT]], label %[[FOR_END10_LOOPEXIT:.*]], label %[[FOR_BODY_US]]279; CHECK: [[FOR_BODY]]:280; CHECK-NEXT: [[BLOCK_017:%.*]] = phi i32 [ [[INC9:%.*]], %[[FOR_BODY]] ], [ 0, %[[FOR_BODY_LR_PH]] ]281; CHECK-NEXT: tail call void @resample(i32 noundef [[RAND_BLOCK_LENGTH]], ptr noundef [[SAMPLES]])282; CHECK-NEXT: [[INC9]] = add nuw nsw i32 [[BLOCK_017]], 1283; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INC9]], [[NBLOCKS]]284; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_END10]], label %[[FOR_BODY]]285; CHECK: [[FOR_END10_LOOPEXIT]]:286; CHECK-NEXT: [[TMP29:%.*]] = fadd fast double [[V1_2_US_LCSSA]], [[V0_2_US_LCSSA]]287; CHECK-NEXT: br label %[[FOR_END10]]288; CHECK: [[FOR_END10]]:289; CHECK-NEXT: [[ADD11:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[TMP29]], %[[FOR_END10_LOOPEXIT]] ], [ 0.000000e+00, %[[FOR_BODY]] ]290; CHECK-NEXT: ret double [[ADD11]]291;292entry:293 %nblocks.addr = alloca i32, align 4294 %RAND_BLOCK_LENGTH.addr = alloca i32, align 4295 %samples.addr = alloca ptr, align 8296 %Y.addr = alloca double, align 8297 %Z.addr = alloca double, align 8298 %i = alloca i32, align 4299 %block = alloca i32, align 4300 %rngVal = alloca double, align 8301 %callValue = alloca double, align 8302 %v0 = alloca double, align 8303 %v1 = alloca double, align 8304 store i32 %nblocks, ptr %nblocks.addr, align 4305 store i32 %RAND_BLOCK_LENGTH, ptr %RAND_BLOCK_LENGTH.addr, align 4306 store ptr %samples, ptr %samples.addr, align 8307 store double %Y, ptr %Y.addr, align 8308 store double %Z, ptr %Z.addr, align 8309 call void @llvm.lifetime.start.p0(ptr %i) #4310 call void @llvm.lifetime.start.p0(ptr %block) #4311 call void @llvm.lifetime.start.p0(ptr %rngVal) #4312 call void @llvm.lifetime.start.p0(ptr %callValue) #4313 call void @llvm.lifetime.start.p0(ptr %v0) #4314 store double 0.000000e+00, ptr %v0, align 8315 call void @llvm.lifetime.start.p0(ptr %v1) #4316 store double 0.000000e+00, ptr %v1, align 8317 store i32 0, ptr %block, align 4318 br label %for.cond319 320for.cond: ; preds = %for.inc8, %entry321 %0 = load i32, ptr %block, align 4322 %1 = load i32, ptr %nblocks.addr, align 4323 %cmp = icmp slt i32 %0, %1324 br i1 %cmp, label %for.body, label %for.end10325 326for.body: ; preds = %for.cond327 %2 = load i32, ptr %RAND_BLOCK_LENGTH.addr, align 4328 %3 = load ptr, ptr %samples.addr, align 8329 call void @resample(i32 noundef %2, ptr noundef %3)330 store i32 0, ptr %i, align 4331 br label %for.cond1332 333for.cond1: ; preds = %for.inc, %for.body334 %4 = load i32, ptr %i, align 4335 %5 = load i32, ptr %RAND_BLOCK_LENGTH.addr, align 4336 %cmp2 = icmp slt i32 %4, %5337 br i1 %cmp2, label %for.body3, label %for.end338 339for.body3: ; preds = %for.cond1340 %6 = load ptr, ptr %samples.addr, align 8341 %7 = load i32, ptr %i, align 4342 %idxprom = sext i32 %7 to i64343 %arrayidx = getelementptr inbounds float, ptr %6, i64 %idxprom344 %8 = load float, ptr %arrayidx, align 4345 %conv = fpext float %8 to double346 store double %conv, ptr %rngVal, align 8347 %9 = load double, ptr %Y.addr, align 8348 %10 = load double, ptr %rngVal, align 8349 %11 = call fast double @llvm.exp2.f64(double %10)350 %mul = fmul fast double %9, %11351 %12 = load double, ptr %Z.addr, align 8352 %sub = fsub fast double %mul, %12353 store double %sub, ptr %callValue, align 8354 %13 = load double, ptr %callValue, align 8355 %cmp4 = fcmp fast ogt double %13, 0.000000e+00356 br i1 %cmp4, label %if.then, label %if.end357 358if.then: ; preds = %for.body3359 %14 = load double, ptr %callValue, align 8360 %15 = load double, ptr %v0, align 8361 %add = fadd fast double %15, %14362 store double %add, ptr %v0, align 8363 %16 = load double, ptr %callValue, align 8364 %17 = load double, ptr %callValue, align 8365 %mul6 = fmul fast double %16, %17366 %18 = load double, ptr %v1, align 8367 %add7 = fadd fast double %18, %mul6368 store double %add7, ptr %v1, align 8369 br label %if.end370 371if.end: ; preds = %if.then, %for.body3372 br label %for.inc373 374for.inc: ; preds = %if.end375 %19 = load i32, ptr %i, align 4376 %inc = add nsw i32 %19, 1377 store i32 %inc, ptr %i, align 4378 br label %for.cond1379 380for.end: ; preds = %for.cond1381 br label %for.inc8382 383for.inc8: ; preds = %for.end384 %20 = load i32, ptr %block, align 4385 %inc9 = add nsw i32 %20, 1386 store i32 %inc9, ptr %block, align 4387 br label %for.cond388 389for.end10: ; preds = %for.cond390 %21 = load double, ptr %v0, align 8391 %22 = load double, ptr %v1, align 8392 %add11 = fadd fast double %21, %22393 call void @llvm.lifetime.end.p0(ptr %v1) #4394 call void @llvm.lifetime.end.p0(ptr %v0) #4395 call void @llvm.lifetime.end.p0(ptr %callValue) #4396 call void @llvm.lifetime.end.p0(ptr %rngVal) #4397 call void @llvm.lifetime.end.p0(ptr %block) #4398 call void @llvm.lifetime.end.p0(ptr %i) #4399 ret double %add11400}401 402declare void @llvm.lifetime.start.p0(ptr nocapture)403declare void @resample(i32 noundef, ptr noundef)404declare double @llvm.exp2.f64(double)405declare void @llvm.lifetime.end.p0(ptr nocapture)406;.407; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}408; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}409; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}410; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}411; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}412; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]}413;.414