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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -O3 -S -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,SSE,SSE23; RUN: opt < %s -O3 -S -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE44; RUN: opt < %s -O3 -S -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX_FMA,AVX_FMA45; RUN: opt < %s -O3 -S -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,AVX,AVX_FMA,AVX_FMA36; RUN: opt < %s -O3 -S -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,AVX,AVX5127; RUN: opt < %s -passes="default<O3>" -S -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,SSE,SSE28; RUN: opt < %s -passes="default<O3>" -S -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE49; RUN: opt < %s -passes="default<O3>" -S -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX_FMA,AVX_FMA410; RUN: opt < %s -passes="default<O3>" -S -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,AVX,AVX_FMA,AVX_FMA311; RUN: opt < %s -passes="default<O3>" -S -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,AVX,AVX51212 13; This test checks the vectorisation of FMUL+ADDSUB/FMADDSUB patterns, including cases with undef elements.14 15; Ideally, this should reach the backend with 1 fmul, 1 fsub, 1 fadd, and 1 shuffle.16; That may require some coordination between VectorCombine, SLP, and other passes.17 18define <4 x float> @buildvector_mul_addsub_ps128(<4 x float> %C, <4 x float> %D, <4 x float> %B) {19; CHECK-LABEL: @buildvector_mul_addsub_ps128(20; CHECK-NEXT: [[A:%.*]] = fmul <4 x float> [[C:%.*]], [[D:%.*]]21; CHECK-NEXT: [[TMP0:%.*]] = fsub <4 x float> [[A]], [[B:%.*]]22; CHECK-NEXT: [[TMP1:%.*]] = fadd <4 x float> [[A]], [[B]]23; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>24; CHECK-NEXT: ret <4 x float> [[TMP2]]25;26 %A = fmul <4 x float> %C, %D27 %A0 = extractelement <4 x float> %A, i32 028 %B0 = extractelement <4 x float> %B, i32 029 %sub0 = fsub float %A0, %B030 %A2 = extractelement <4 x float> %A, i32 231 %B2 = extractelement <4 x float> %B, i32 232 %sub2 = fsub float %A2, %B233 %A1 = extractelement <4 x float> %A, i32 134 %B1 = extractelement <4 x float> %B, i32 135 %add1 = fadd float %A1, %B136 %A3 = extractelement <4 x float> %A, i32 337 %B3 = extractelement <4 x float> %B, i32 338 %add3 = fadd float %A3, %B339 %vecinsert1 = insertelement <4 x float> undef, float %sub0, i32 040 %vecinsert2 = insertelement <4 x float> %vecinsert1, float %add1, i32 141 %vecinsert3 = insertelement <4 x float> %vecinsert2, float %sub2, i32 242 %vecinsert4 = insertelement <4 x float> %vecinsert3, float %add3, i32 343 ret <4 x float> %vecinsert444}45 46define <2 x double> @buildvector_mul_addsub_pd128(<2 x double> %C, <2 x double> %D, <2 x double> %B) {47; CHECK-LABEL: @buildvector_mul_addsub_pd128(48; CHECK-NEXT: [[A:%.*]] = fmul <2 x double> [[C:%.*]], [[D:%.*]]49; CHECK-NEXT: [[TMP0:%.*]] = fsub <2 x double> [[A]], [[B:%.*]]50; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x double> [[A]], [[B]]51; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> [[TMP1]], <2 x i32> <i32 0, i32 3>52; CHECK-NEXT: ret <2 x double> [[TMP2]]53;54 %A = fmul <2 x double> %C, %D55 %A0 = extractelement <2 x double> %A, i32 056 %B0 = extractelement <2 x double> %B, i32 057 %sub0 = fsub double %A0, %B058 %A1 = extractelement <2 x double> %A, i32 159 %B1 = extractelement <2 x double> %B, i32 160 %add1 = fadd double %A1, %B161 %vecinsert1 = insertelement <2 x double> undef, double %sub0, i32 062 %vecinsert2 = insertelement <2 x double> %vecinsert1, double %add1, i32 163 ret <2 x double> %vecinsert264}65 66define <8 x float> @buildvector_mul_addsub_ps256(<8 x float> %C, <8 x float> %D, <8 x float> %B) {67; SSE2-LABEL: @buildvector_mul_addsub_ps256(68; SSE2-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]69; SSE2-NEXT: [[TMP0:%.*]] = fsub <8 x float> [[A]], [[B:%.*]]70; SSE2-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>71; SSE2-NEXT: [[TMP2:%.*]] = fadd <8 x float> [[A]], [[B]]72; SSE2-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>73; SSE2-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP3]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>74; SSE2-NEXT: ret <8 x float> [[TMP4]]75;76; SSE4-LABEL: @buildvector_mul_addsub_ps256(77; SSE4-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]78; SSE4-NEXT: [[TMP0:%.*]] = fsub <8 x float> [[A]], [[B:%.*]]79; SSE4-NEXT: [[TMP1:%.*]] = fadd <8 x float> [[A]], [[B]]80; SSE4-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>81; SSE4-NEXT: ret <8 x float> [[TMP2]]82;83; AVX-LABEL: @buildvector_mul_addsub_ps256(84; AVX-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]85; AVX-NEXT: [[TMP0:%.*]] = fsub <8 x float> [[A]], [[B:%.*]]86; AVX-NEXT: [[TMP1:%.*]] = fadd <8 x float> [[A]], [[B]]87; AVX-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>88; AVX-NEXT: ret <8 x float> [[TMP2]]89;90 %A = fmul <8 x float> %C, %D91 %A0 = extractelement <8 x float> %A, i32 092 %B0 = extractelement <8 x float> %B, i32 093 %sub0 = fsub float %A0, %B094 %A2 = extractelement <8 x float> %A, i32 295 %B2 = extractelement <8 x float> %B, i32 296 %sub2 = fsub float %A2, %B297 %A4 = extractelement <8 x float> %A, i32 498 %B4 = extractelement <8 x float> %B, i32 499 %sub4 = fsub float %A4, %B4100 %A6 = extractelement <8 x float> %A, i32 6101 %B6 = extractelement <8 x float> %B, i32 6102 %sub6 = fsub float %A6, %B6103 %A1 = extractelement <8 x float> %A, i32 1104 %B1 = extractelement <8 x float> %B, i32 1105 %add1 = fadd float %A1, %B1106 %A3 = extractelement <8 x float> %A, i32 3107 %B3 = extractelement <8 x float> %B, i32 3108 %add3 = fadd float %A3, %B3109 %A5 = extractelement <8 x float> %A, i32 5110 %B5 = extractelement <8 x float> %B, i32 5111 %add5 = fadd float %A5, %B5112 %A7 = extractelement <8 x float> %A, i32 7113 %B7 = extractelement <8 x float> %B, i32 7114 %add7 = fadd float %A7, %B7115 %vecinsert1 = insertelement <8 x float> undef, float %sub0, i32 0116 %vecinsert2 = insertelement <8 x float> %vecinsert1, float %add1, i32 1117 %vecinsert3 = insertelement <8 x float> %vecinsert2, float %sub2, i32 2118 %vecinsert4 = insertelement <8 x float> %vecinsert3, float %add3, i32 3119 %vecinsert5 = insertelement <8 x float> %vecinsert4, float %sub4, i32 4120 %vecinsert6 = insertelement <8 x float> %vecinsert5, float %add5, i32 5121 %vecinsert7 = insertelement <8 x float> %vecinsert6, float %sub6, i32 6122 %vecinsert8 = insertelement <8 x float> %vecinsert7, float %add7, i32 7123 ret <8 x float> %vecinsert8124}125 126define <4 x double> @buildvector_mul_addsub_pd256(<4 x double> %C, <4 x double> %D, <4 x double> %B) {127; CHECK-LABEL: @buildvector_mul_addsub_pd256(128; CHECK-NEXT: [[A:%.*]] = fmul <4 x double> [[C:%.*]], [[D:%.*]]129; CHECK-NEXT: [[TMP0:%.*]] = fsub <4 x double> [[A]], [[B:%.*]]130; CHECK-NEXT: [[TMP1:%.*]] = fadd <4 x double> [[A]], [[B]]131; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[TMP0]], <4 x double> [[TMP1]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>132; CHECK-NEXT: ret <4 x double> [[TMP2]]133;134 %A = fmul <4 x double> %C, %D135 %A0 = extractelement <4 x double> %A, i32 0136 %B0 = extractelement <4 x double> %B, i32 0137 %sub0 = fsub double %A0, %B0138 %A2 = extractelement <4 x double> %A, i32 2139 %B2 = extractelement <4 x double> %B, i32 2140 %sub2 = fsub double %A2, %B2141 %A1 = extractelement <4 x double> %A, i32 1142 %B1 = extractelement <4 x double> %B, i32 1143 %add1 = fadd double %A1, %B1144 %A3 = extractelement <4 x double> %A, i32 3145 %B3 = extractelement <4 x double> %B, i32 3146 %add3 = fadd double %A3, %B3147 %vecinsert1 = insertelement <4 x double> undef, double %sub0, i32 0148 %vecinsert2 = insertelement <4 x double> %vecinsert1, double %add1, i32 1149 %vecinsert3 = insertelement <4 x double> %vecinsert2, double %sub2, i32 2150 %vecinsert4 = insertelement <4 x double> %vecinsert3, double %add3, i32 3151 ret <4 x double> %vecinsert4152}153 154define <16 x float> @buildvector_mul_addsub_ps512(<16 x float> %C, <16 x float> %D, <16 x float> %B) {155; SSE2-LABEL: @buildvector_mul_addsub_ps512(156; SSE2-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]157; SSE2-NEXT: [[TMP1:%.*]] = fsub <16 x float> [[A]], [[B:%.*]]158; SSE2-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[TMP1]], <16 x float> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>159; SSE2-NEXT: [[TMP3:%.*]] = fadd <16 x float> [[A]], [[B]]160; SSE2-NEXT: [[TMP4:%.*]] = shufflevector <16 x float> [[TMP3]], <16 x float> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>161; SSE2-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> [[TMP4]], <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>162; SSE2-NEXT: ret <16 x float> [[TMP5]]163;164; SSE4-LABEL: @buildvector_mul_addsub_ps512(165; SSE4-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]166; SSE4-NEXT: [[TMP1:%.*]] = fsub <16 x float> [[A]], [[B:%.*]]167; SSE4-NEXT: [[TMP2:%.*]] = fadd <16 x float> [[A]], [[B]]168; SSE4-NEXT: [[TMP3:%.*]] = shufflevector <16 x float> [[TMP1]], <16 x float> [[TMP2]], <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>169; SSE4-NEXT: ret <16 x float> [[TMP3]]170;171; AVX-LABEL: @buildvector_mul_addsub_ps512(172; AVX-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]173; AVX-NEXT: [[TMP1:%.*]] = fsub <16 x float> [[A]], [[B:%.*]]174; AVX-NEXT: [[TMP2:%.*]] = fadd <16 x float> [[A]], [[B]]175; AVX-NEXT: [[VECINSERT162:%.*]] = shufflevector <16 x float> [[TMP1]], <16 x float> [[TMP2]], <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>176; AVX-NEXT: ret <16 x float> [[VECINSERT162]]177;178 %A = fmul <16 x float> %C, %D179 %A0 = extractelement <16 x float> %A, i32 0180 %B0 = extractelement <16 x float> %B, i32 0181 %sub0 = fsub float %A0, %B0182 %A2 = extractelement <16 x float> %A, i32 2183 %B2 = extractelement <16 x float> %B, i32 2184 %sub2 = fsub float %A2, %B2185 %A4 = extractelement <16 x float> %A, i32 4186 %B4 = extractelement <16 x float> %B, i32 4187 %sub4 = fsub float %A4, %B4188 %A6 = extractelement <16 x float> %A, i32 6189 %B6 = extractelement <16 x float> %B, i32 6190 %sub6 = fsub float %A6, %B6191 %A8 = extractelement <16 x float> %A, i32 8192 %B8 = extractelement <16 x float> %B, i32 8193 %sub8 = fsub float %A8, %B8194 %A10 = extractelement <16 x float> %A, i32 10195 %B10 = extractelement <16 x float> %B, i32 10196 %sub10 = fsub float %A10, %B10197 %A12 = extractelement <16 x float> %A, i32 12198 %B12 = extractelement <16 x float> %B, i32 12199 %sub12 = fsub float %A12, %B12200 %A14 = extractelement <16 x float> %A, i32 14201 %B14 = extractelement <16 x float> %B, i32 14202 %sub14 = fsub float %A14, %B14203 %A1 = extractelement <16 x float> %A, i32 1204 %B1 = extractelement <16 x float> %B, i32 1205 %add1 = fadd float %A1, %B1206 %A3 = extractelement <16 x float> %A, i32 3207 %B3 = extractelement <16 x float> %B, i32 3208 %add3 = fadd float %A3, %B3209 %A5 = extractelement <16 x float> %A, i32 5210 %B5 = extractelement <16 x float> %B, i32 5211 %add5 = fadd float %A5, %B5212 %A7 = extractelement <16 x float> %A, i32 7213 %B7 = extractelement <16 x float> %B, i32 7214 %add7 = fadd float %A7, %B7215 %A9 = extractelement <16 x float> %A, i32 9216 %B9 = extractelement <16 x float> %B, i32 9217 %add9 = fadd float %A9, %B9218 %A11 = extractelement <16 x float> %A, i32 11219 %B11 = extractelement <16 x float> %B, i32 11220 %add11 = fadd float %A11, %B11221 %A13 = extractelement <16 x float> %A, i32 13222 %B13 = extractelement <16 x float> %B, i32 13223 %add13 = fadd float %A13, %B13224 %A15 = extractelement <16 x float> %A, i32 15225 %B15 = extractelement <16 x float> %B, i32 15226 %add15 = fadd float %A15, %B15227 %vecinsert1 = insertelement <16 x float> undef, float %sub0, i32 0228 %vecinsert2 = insertelement <16 x float> %vecinsert1, float %add1, i32 1229 %vecinsert3 = insertelement <16 x float> %vecinsert2, float %sub2, i32 2230 %vecinsert4 = insertelement <16 x float> %vecinsert3, float %add3, i32 3231 %vecinsert5 = insertelement <16 x float> %vecinsert4, float %sub4, i32 4232 %vecinsert6 = insertelement <16 x float> %vecinsert5, float %add5, i32 5233 %vecinsert7 = insertelement <16 x float> %vecinsert6, float %sub6, i32 6234 %vecinsert8 = insertelement <16 x float> %vecinsert7, float %add7, i32 7235 %vecinsert9 = insertelement <16 x float> %vecinsert8, float %sub8, i32 8236 %vecinsert10 = insertelement <16 x float> %vecinsert9, float %add9, i32 9237 %vecinsert11 = insertelement <16 x float> %vecinsert10, float %sub10, i32 10238 %vecinsert12 = insertelement <16 x float> %vecinsert11, float %add11, i32 11239 %vecinsert13 = insertelement <16 x float> %vecinsert12, float %sub12, i32 12240 %vecinsert14 = insertelement <16 x float> %vecinsert13, float %add13, i32 13241 %vecinsert15 = insertelement <16 x float> %vecinsert14, float %sub14, i32 14242 %vecinsert16 = insertelement <16 x float> %vecinsert15, float %add15, i32 15243 ret <16 x float> %vecinsert16244}245 246define <16 x float> @buildvector_mul_addsub_ps512_partial(<16 x float> %C, <16 x float> %D, <16 x float> %B) {247; SSE-LABEL: @buildvector_mul_addsub_ps512_partial(248; SSE-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]249; SSE-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 13>250; SSE-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[B:%.*]], <16 x float> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 13>251; SSE-NEXT: [[TMP3:%.*]] = fsub <12 x float> [[TMP1]], [[TMP2]]252; SSE-NEXT: [[TMP4:%.*]] = fadd <12 x float> [[TMP1]], [[TMP2]]253; SSE-NEXT: [[TMP5:%.*]] = shufflevector <12 x float> [[TMP3]], <12 x float> [[TMP4]], <12 x i32> <i32 0, i32 13, i32 2, i32 15, i32 4, i32 5, i32 18, i32 7, i32 20, i32 9, i32 22, i32 23>254; SSE-NEXT: [[TMP6:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <2 x i32> <i32 14, i32 15>255; SSE-NEXT: [[TMP7:%.*]] = shufflevector <16 x float> [[B]], <16 x float> poison, <2 x i32> <i32 14, i32 15>256; SSE-NEXT: [[TMP8:%.*]] = fsub <2 x float> [[TMP6]], [[TMP7]]257; SSE-NEXT: [[TMP9:%.*]] = fadd <2 x float> [[TMP6]], [[TMP7]]258; SSE-NEXT: [[TMP10:%.*]] = shufflevector <12 x float> [[TMP5]], <12 x float> <float undef, float undef, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 12, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 13, i32 11, i32 poison, i32 poison>259; SSE-NEXT: [[TMP11:%.*]] = shufflevector <2 x float> [[TMP8]], <2 x float> [[TMP9]], <16 x i32> <i32 0, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>260; SSE-NEXT: [[VECINSERT161:%.*]] = shufflevector <16 x float> [[TMP10]], <16 x float> [[TMP11]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 16, i32 17>261; SSE-NEXT: ret <16 x float> [[VECINSERT161]]262;263; AVX-LABEL: @buildvector_mul_addsub_ps512_partial(264; AVX-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]265; AVX-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 7, i32 8>266; AVX-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[B:%.*]], <16 x float> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 7, i32 8>267; AVX-NEXT: [[TMP3:%.*]] = fsub <8 x float> [[TMP1]], [[TMP2]]268; AVX-NEXT: [[TMP4:%.*]] = fadd <8 x float> [[TMP1]], [[TMP2]]269; AVX-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[TMP3]], <8 x float> [[TMP4]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 5, i32 14, i32 7>270; AVX-NEXT: [[TMP6:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <4 x i32> <i32 9, i32 10, i32 11, i32 13>271; AVX-NEXT: [[TMP7:%.*]] = shufflevector <16 x float> [[B]], <16 x float> poison, <4 x i32> <i32 9, i32 10, i32 11, i32 13>272; AVX-NEXT: [[TMP8:%.*]] = fadd <4 x float> [[TMP6]], [[TMP7]]273; AVX-NEXT: [[TMP9:%.*]] = fsub <4 x float> [[TMP6]], [[TMP7]]274; AVX-NEXT: [[TMP10:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <2 x i32> <i32 14, i32 15>275; AVX-NEXT: [[TMP11:%.*]] = shufflevector <16 x float> [[B]], <16 x float> poison, <2 x i32> <i32 14, i32 15>276; AVX-NEXT: [[TMP12:%.*]] = fsub <2 x float> [[TMP10]], [[TMP11]]277; AVX-NEXT: [[TMP13:%.*]] = fadd <2 x float> [[TMP10]], [[TMP11]]278; AVX-NEXT: [[TMP14:%.*]] = shufflevector <8 x float> [[TMP5]], <8 x float> <float undef, float undef, float poison, float poison, float poison, float poison, float poison, float poison>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 9, i32 poison, i32 poison, i32 poison>279; AVX-NEXT: [[TMP15:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> [[TMP9]], <16 x i32> <i32 0, i32 5, i32 2, i32 poison, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>280; AVX-NEXT: [[VECINSERT141:%.*]] = shufflevector <16 x float> [[TMP14]], <16 x float> [[TMP15]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 16, i32 17, i32 18, i32 12, i32 20, i32 poison, i32 poison>281; AVX-NEXT: [[TMP16:%.*]] = shufflevector <2 x float> [[TMP12]], <2 x float> [[TMP13]], <16 x i32> <i32 0, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>282; AVX-NEXT: [[VECINSERT162:%.*]] = shufflevector <16 x float> [[VECINSERT141]], <16 x float> [[TMP16]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 16, i32 17>283; AVX-NEXT: ret <16 x float> [[VECINSERT162]]284;285 %A = fmul <16 x float> %C, %D286 %A0 = extractelement <16 x float> %A, i32 0287 %B0 = extractelement <16 x float> %B, i32 0288 %sub0 = fsub float %A0, %B0289 %A2 = extractelement <16 x float> %A, i32 2290 %B2 = extractelement <16 x float> %B, i32 2291 %sub2 = fsub float %A2, %B2292 %A4 = extractelement <16 x float> %A, i32 4293 %B4 = extractelement <16 x float> %B, i32 4294 %sub4 = fsub float %A4, %B4295 %A6 = extractelement <16 x float> %A, i32 6296 %B6 = extractelement <16 x float> %B, i32 6297 %sub6 = fsub float %A6, %B6298 %A8 = extractelement <16 x float> %A, i32 8299 %B8 = extractelement <16 x float> %B, i32 8300 %sub8 = fsub float %A8, %B8301 %A10 = extractelement <16 x float> %A, i32 10302 %B10 = extractelement <16 x float> %B, i32 10303 %sub10 = fsub float %A10, %B10304 %A12 = extractelement <16 x float> %A, i32 12305 %B12 = extractelement <16 x float> %B, i32 12306 %sub12 = fsub float %A12, %B12307 %A14 = extractelement <16 x float> %A, i32 14308 %B14 = extractelement <16 x float> %B, i32 14309 %sub14 = fsub float %A14, %B14310 %A1 = extractelement <16 x float> %A, i32 1311 %B1 = extractelement <16 x float> %B, i32 1312 %add1 = fadd float %A1, %B1313 %A3 = extractelement <16 x float> %A, i32 3314 %B3 = extractelement <16 x float> %B, i32 3315 %add3 = fadd float %A3, %B3316 %A5 = extractelement <16 x float> %A, i32 5317 %B5 = extractelement <16 x float> %B, i32 5318 %add5 = fadd float %A5, %B5319 %A7 = extractelement <16 x float> %A, i32 7320 %B7 = extractelement <16 x float> %B, i32 7321 %add7 = fadd float %A7, %B7322 %A9 = extractelement <16 x float> %A, i32 9323 %B9 = extractelement <16 x float> %B, i32 9324 %add9 = fadd float %A9, %B9325 %A11 = extractelement <16 x float> %A, i32 11326 %B11 = extractelement <16 x float> %B, i32 11327 %add11 = fadd float %A11, %B11328 %A13 = extractelement <16 x float> %A, i32 13329 %B13 = extractelement <16 x float> %B, i32 13330 %add13 = fadd float %A13, %B13331 %A15 = extractelement <16 x float> %A, i32 15332 %B15 = extractelement <16 x float> %B, i32 15333 %add15 = fadd float %A15, %B15334 %vecinsert1 = insertelement <16 x float> undef, float %sub0, i32 0335 %vecinsert2 = insertelement <16 x float> %vecinsert1, float %add1, i32 1336 %vecinsert3 = insertelement <16 x float> %vecinsert2, float %sub2, i32 2337 %vecinsert4 = insertelement <16 x float> %vecinsert3, float %add3, i32 3338 %vecinsert5 = insertelement <16 x float> %vecinsert4, float %sub4, i32 4339 ; element 5 is undef340 %vecinsert7 = insertelement <16 x float> %vecinsert5, float %sub6, i32 6341 %vecinsert8 = insertelement <16 x float> %vecinsert7, float %add7, i32 7342 %vecinsert9 = insertelement <16 x float> %vecinsert8, float %sub8, i32 8343 %vecinsert10 = insertelement <16 x float> %vecinsert9, float %add9, i32 9344 %vecinsert11 = insertelement <16 x float> %vecinsert10, float %sub10, i32 10345 %vecinsert12 = insertelement <16 x float> %vecinsert11, float %add11, i32 11346 ; element 12 is undef347 %vecinsert14 = insertelement <16 x float> %vecinsert12, float %add13, i32 13348 %vecinsert15 = insertelement <16 x float> %vecinsert14, float %sub14, i32 14349 %vecinsert16 = insertelement <16 x float> %vecinsert15, float %add15, i32 15350 ret <16 x float> %vecinsert16351}352 353define <8 x double> @buildvector_mul_addsub_pd512(<8 x double> %C, <8 x double> %D, <8 x double> %B) {354; SSE2-LABEL: @buildvector_mul_addsub_pd512(355; SSE2-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]356; SSE2-NEXT: [[TMP1:%.*]] = fsub <8 x double> [[A]], [[B:%.*]]357; SSE2-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[TMP1]], <8 x double> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>358; SSE2-NEXT: [[TMP3:%.*]] = fadd <8 x double> [[A]], [[B]]359; SSE2-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[TMP3]], <8 x double> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>360; SSE2-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP4]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>361; SSE2-NEXT: ret <8 x double> [[TMP5]]362;363; SSE4-LABEL: @buildvector_mul_addsub_pd512(364; SSE4-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]365; SSE4-NEXT: [[TMP1:%.*]] = fsub <8 x double> [[A]], [[B:%.*]]366; SSE4-NEXT: [[TMP2:%.*]] = fadd <8 x double> [[A]], [[B]]367; SSE4-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP1]], <8 x double> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>368; SSE4-NEXT: ret <8 x double> [[TMP3]]369;370; AVX-LABEL: @buildvector_mul_addsub_pd512(371; AVX-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]372; AVX-NEXT: [[TMP1:%.*]] = fsub <8 x double> [[A]], [[B:%.*]]373; AVX-NEXT: [[TMP2:%.*]] = fadd <8 x double> [[A]], [[B]]374; AVX-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP1]], <8 x double> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>375; AVX-NEXT: ret <8 x double> [[TMP3]]376;377 %A = fmul <8 x double> %C, %D378 %A0 = extractelement <8 x double> %A, i32 0379 %B0 = extractelement <8 x double> %B, i32 0380 %sub0 = fsub double %A0, %B0381 %A2 = extractelement <8 x double> %A, i32 2382 %B2 = extractelement <8 x double> %B, i32 2383 %sub2 = fsub double %A2, %B2384 %A4 = extractelement <8 x double> %A, i32 4385 %B4 = extractelement <8 x double> %B, i32 4386 %sub4 = fsub double %A4, %B4387 %A6 = extractelement <8 x double> %A, i32 6388 %B6 = extractelement <8 x double> %B, i32 6389 %sub6 = fsub double %A6, %B6390 %A1 = extractelement <8 x double> %A, i32 1391 %B1 = extractelement <8 x double> %B, i32 1392 %add1 = fadd double %A1, %B1393 %A3 = extractelement <8 x double> %A, i32 3394 %B3 = extractelement <8 x double> %B, i32 3395 %add3 = fadd double %A3, %B3396 %A5 = extractelement <8 x double> %A, i32 5397 %B5 = extractelement <8 x double> %B, i32 5398 %add5 = fadd double %A5, %B5399 %A7 = extractelement <8 x double> %A, i32 7400 %B7 = extractelement <8 x double> %B, i32 7401 %add7 = fadd double %A7, %B7402 %vecinsert1 = insertelement <8 x double> undef, double %sub0, i32 0403 %vecinsert2 = insertelement <8 x double> %vecinsert1, double %add1, i32 1404 %vecinsert3 = insertelement <8 x double> %vecinsert2, double %sub2, i32 2405 %vecinsert4 = insertelement <8 x double> %vecinsert3, double %add3, i32 3406 %vecinsert5 = insertelement <8 x double> %vecinsert4, double %sub4, i32 4407 %vecinsert6 = insertelement <8 x double> %vecinsert5, double %add5, i32 5408 %vecinsert7 = insertelement <8 x double> %vecinsert6, double %sub6, i32 6409 %vecinsert8 = insertelement <8 x double> %vecinsert7, double %add7, i32 7410 ret <8 x double> %vecinsert8411}412 413define <8 x double> @buildvector_mul_addsub_pd512_partial(<8 x double> %C, <8 x double> %D, <8 x double> %B) {414; SSE-LABEL: @buildvector_mul_addsub_pd512_partial(415; SSE-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]416; SSE-NEXT: [[TMP1:%.*]] = fsub <8 x double> [[A]], [[B:%.*]]417; SSE-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[TMP1]], <8 x double> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>418; SSE-NEXT: [[TMP3:%.*]] = fadd <8 x double> [[A]], [[B]]419; SSE-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[TMP3]], <8 x double> poison, <2 x i32> <i32 1, i32 3>420; SSE-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> poison, <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison>421; SSE-NEXT: [[TMP6:%.*]] = shufflevector <2 x double> [[TMP4]], <2 x double> poison, <6 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison>422; SSE-NEXT: [[TMP7:%.*]] = shufflevector <6 x double> [[TMP5]], <6 x double> [[TMP6]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 7>423; SSE-NEXT: [[A7:%.*]] = extractelement <8 x double> [[A]], i64 7424; SSE-NEXT: [[B7:%.*]] = extractelement <8 x double> [[B]], i64 7425; SSE-NEXT: [[ADD7:%.*]] = fadd double [[A7]], [[B7]]426; SSE-NEXT: [[TMP8:%.*]] = shufflevector <6 x double> [[TMP7]], <6 x double> <double undef, double poison, double poison, double poison, double poison, double poison>, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 poison>427; SSE-NEXT: [[VECINSERT8:%.*]] = insertelement <8 x double> [[TMP8]], double [[ADD7]], i64 7428; SSE-NEXT: ret <8 x double> [[VECINSERT8]]429;430; AVX_FMA4-LABEL: @buildvector_mul_addsub_pd512_partial(431; AVX_FMA4-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]432; AVX_FMA4-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>433; AVX_FMA4-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[B:%.*]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>434; AVX_FMA4-NEXT: [[TMP3:%.*]] = fsub <4 x double> [[TMP1]], [[TMP2]]435; AVX_FMA4-NEXT: [[TMP4:%.*]] = fadd <4 x double> [[TMP1]], [[TMP2]]436; AVX_FMA4-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP3]], <4 x double> [[TMP4]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>437; AVX_FMA4-NEXT: [[A7:%.*]] = extractelement <8 x double> [[A]], i64 7438; AVX_FMA4-NEXT: [[B7:%.*]] = extractelement <8 x double> [[B]], i64 7439; AVX_FMA4-NEXT: [[ADD7:%.*]] = fadd double [[A7]], [[B7]]440; AVX_FMA4-NEXT: [[TMP6:%.*]] = shufflevector <4 x double> [[TMP5]], <4 x double> <double undef, double poison, double poison, double poison>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 4, i32 poison, i32 poison>441; AVX_FMA4-NEXT: [[TMP7:%.*]] = fsub <8 x double> [[A]], [[B]]442; AVX_FMA4-NEXT: [[TMP8:%.*]] = shufflevector <8 x double> [[TMP7]], <8 x double> poison, <8 x i32> <i32 4, i32 poison, i32 6, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>443; AVX_FMA4-NEXT: [[VECINSERT71:%.*]] = shufflevector <8 x double> [[TMP6]], <8 x double> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 5, i32 10, i32 poison>444; AVX_FMA4-NEXT: [[VECINSERT8:%.*]] = insertelement <8 x double> [[VECINSERT71]], double [[ADD7]], i64 7445; AVX_FMA4-NEXT: ret <8 x double> [[VECINSERT8]]446;447; AVX_FMA3-LABEL: @buildvector_mul_addsub_pd512_partial(448; AVX_FMA3-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]449; AVX_FMA3-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>450; AVX_FMA3-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[B:%.*]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>451; AVX_FMA3-NEXT: [[TMP3:%.*]] = fsub <4 x double> [[TMP1]], [[TMP2]]452; AVX_FMA3-NEXT: [[TMP4:%.*]] = fadd <4 x double> [[TMP1]], [[TMP2]]453; AVX_FMA3-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP3]], <4 x double> [[TMP4]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>454; AVX_FMA3-NEXT: [[TMP6:%.*]] = fadd <8 x double> [[A]], [[B]]455; AVX_FMA3-NEXT: [[TMP7:%.*]] = shufflevector <4 x double> [[TMP5]], <4 x double> <double undef, double poison, double poison, double poison>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 4, i32 poison, i32 poison>456; AVX_FMA3-NEXT: [[TMP8:%.*]] = fsub <8 x double> [[A]], [[B]]457; AVX_FMA3-NEXT: [[TMP9:%.*]] = shufflevector <8 x double> [[TMP8]], <8 x double> poison, <8 x i32> <i32 4, i32 poison, i32 6, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>458; AVX_FMA3-NEXT: [[VECINSERT71:%.*]] = shufflevector <8 x double> [[TMP7]], <8 x double> [[TMP9]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 5, i32 10, i32 poison>459; AVX_FMA3-NEXT: [[VECINSERT8:%.*]] = shufflevector <8 x double> [[VECINSERT71]], <8 x double> [[TMP6]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 15>460; AVX_FMA3-NEXT: ret <8 x double> [[VECINSERT8]]461;462; AVX512-LABEL: @buildvector_mul_addsub_pd512_partial(463; AVX512-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]464; AVX512-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>465; AVX512-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[B:%.*]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>466; AVX512-NEXT: [[TMP3:%.*]] = fsub <4 x double> [[TMP1]], [[TMP2]]467; AVX512-NEXT: [[TMP4:%.*]] = fadd <4 x double> [[TMP1]], [[TMP2]]468; AVX512-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP3]], <4 x double> [[TMP4]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>469; AVX512-NEXT: [[TMP6:%.*]] = fadd <8 x double> [[A]], [[B]]470; AVX512-NEXT: [[TMP7:%.*]] = shufflevector <4 x double> [[TMP5]], <4 x double> <double undef, double poison, double poison, double poison>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 4, i32 poison, i32 poison>471; AVX512-NEXT: [[TMP8:%.*]] = fsub <8 x double> [[A]], [[B]]472; AVX512-NEXT: [[TMP9:%.*]] = shufflevector <8 x double> [[TMP8]], <8 x double> poison, <8 x i32> <i32 4, i32 poison, i32 6, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>473; AVX512-NEXT: [[VECINSERT71:%.*]] = shufflevector <8 x double> [[TMP7]], <8 x double> [[TMP9]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 5, i32 10, i32 poison>474; AVX512-NEXT: [[VECINSERT8:%.*]] = shufflevector <8 x double> [[VECINSERT71]], <8 x double> [[TMP6]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 15>475; AVX512-NEXT: ret <8 x double> [[VECINSERT8]]476;477 %A = fmul <8 x double> %C, %D478 %A0 = extractelement <8 x double> %A, i32 0479 %B0 = extractelement <8 x double> %B, i32 0480 %sub0 = fsub double %A0, %B0481 %A2 = extractelement <8 x double> %A, i32 2482 %B2 = extractelement <8 x double> %B, i32 2483 %sub2 = fsub double %A2, %B2484 %A4 = extractelement <8 x double> %A, i32 4485 %B4 = extractelement <8 x double> %B, i32 4486 %sub4 = fsub double %A4, %B4487 %A6 = extractelement <8 x double> %A, i32 6488 %B6 = extractelement <8 x double> %B, i32 6489 %sub6 = fsub double %A6, %B6490 %A1 = extractelement <8 x double> %A, i32 1491 %B1 = extractelement <8 x double> %B, i32 1492 %add1 = fadd double %A1, %B1493 %A3 = extractelement <8 x double> %A, i32 3494 %B3 = extractelement <8 x double> %B, i32 3495 %add3 = fadd double %A3, %B3496 %A7 = extractelement <8 x double> %A, i32 7497 %B7 = extractelement <8 x double> %B, i32 7498 %add7 = fadd double %A7, %B7499 %vecinsert1 = insertelement <8 x double> undef, double %sub0, i32 0500 %vecinsert2 = insertelement <8 x double> %vecinsert1, double %add1, i32 1501 %vecinsert3 = insertelement <8 x double> %vecinsert2, double %sub2, i32 2502 %vecinsert4 = insertelement <8 x double> %vecinsert3, double %add3, i32 3503 %vecinsert5 = insertelement <8 x double> %vecinsert4, double %sub4, i32 4504 ; element 5 is undef505 %vecinsert7 = insertelement <8 x double> %vecinsert5, double %sub6, i32 6506 %vecinsert8 = insertelement <8 x double> %vecinsert7, double %add7, i32 7507 ret <8 x double> %vecinsert8508}509 510define <4 x float> @buildvector_mul_subadd_ps128(<4 x float> %C, <4 x float> %D, <4 x float> %B) {511; CHECK-LABEL: @buildvector_mul_subadd_ps128(512; CHECK-NEXT: [[A:%.*]] = fmul <4 x float> [[C:%.*]], [[D:%.*]]513; CHECK-NEXT: [[TMP0:%.*]] = fadd <4 x float> [[A]], [[B:%.*]]514; CHECK-NEXT: [[TMP1:%.*]] = fsub <4 x float> [[A]], [[B]]515; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>516; CHECK-NEXT: ret <4 x float> [[TMP2]]517;518 %A = fmul <4 x float> %C, %D519 %A0 = extractelement <4 x float> %A, i32 0520 %B0 = extractelement <4 x float> %B, i32 0521 %sub0 = fadd float %A0, %B0522 %A2 = extractelement <4 x float> %A, i32 2523 %B2 = extractelement <4 x float> %B, i32 2524 %sub2 = fadd float %A2, %B2525 %A1 = extractelement <4 x float> %A, i32 1526 %B1 = extractelement <4 x float> %B, i32 1527 %add1 = fsub float %A1, %B1528 %A3 = extractelement <4 x float> %A, i32 3529 %B3 = extractelement <4 x float> %B, i32 3530 %add3 = fsub float %A3, %B3531 %vecinsert1 = insertelement <4 x float> undef, float %sub0, i32 0532 %vecinsert2 = insertelement <4 x float> %vecinsert1, float %add1, i32 1533 %vecinsert3 = insertelement <4 x float> %vecinsert2, float %sub2, i32 2534 %vecinsert4 = insertelement <4 x float> %vecinsert3, float %add3, i32 3535 ret <4 x float> %vecinsert4536}537 538define <2 x double> @buildvector_mul_subadd_pd128(<2 x double> %C, <2 x double> %D, <2 x double> %B) {539; CHECK-LABEL: @buildvector_mul_subadd_pd128(540; CHECK-NEXT: [[A:%.*]] = fmul <2 x double> [[C:%.*]], [[D:%.*]]541; CHECK-NEXT: [[TMP0:%.*]] = fadd <2 x double> [[A]], [[B:%.*]]542; CHECK-NEXT: [[TMP1:%.*]] = fsub <2 x double> [[A]], [[B]]543; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> [[TMP1]], <2 x i32> <i32 0, i32 3>544; CHECK-NEXT: ret <2 x double> [[TMP2]]545;546 %A = fmul <2 x double> %C, %D547 %A0 = extractelement <2 x double> %A, i32 0548 %B0 = extractelement <2 x double> %B, i32 0549 %sub0 = fadd double %A0, %B0550 %A1 = extractelement <2 x double> %A, i32 1551 %B1 = extractelement <2 x double> %B, i32 1552 %add1 = fsub double %A1, %B1553 %vecinsert1 = insertelement <2 x double> undef, double %sub0, i32 0554 %vecinsert2 = insertelement <2 x double> %vecinsert1, double %add1, i32 1555 ret <2 x double> %vecinsert2556}557 558define <8 x float> @buildvector_mul_subadd_ps256(<8 x float> %C, <8 x float> %D, <8 x float> %B) {559; SSE2-LABEL: @buildvector_mul_subadd_ps256(560; SSE2-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]561; SSE2-NEXT: [[TMP0:%.*]] = fadd <8 x float> [[A]], [[B:%.*]]562; SSE2-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>563; SSE2-NEXT: [[TMP2:%.*]] = fsub <8 x float> [[A]], [[B]]564; SSE2-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>565; SSE2-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP3]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>566; SSE2-NEXT: ret <8 x float> [[TMP4]]567;568; SSE4-LABEL: @buildvector_mul_subadd_ps256(569; SSE4-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]570; SSE4-NEXT: [[TMP2:%.*]] = fadd <8 x float> [[A]], [[B:%.*]]571; SSE4-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 poison, i32 poison, i32 poison, i32 poison>572; SSE4-NEXT: [[TMP5:%.*]] = fsub <8 x float> [[A]], [[B]]573; SSE4-NEXT: [[TMP4:%.*]] = shufflevector <8 x float> [[TMP5]], <8 x float> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>574; SSE4-NEXT: [[TMP6:%.*]] = shufflevector <8 x float> [[TMP3]], <8 x float> [[TMP4]], <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>575; SSE4-NEXT: ret <8 x float> [[TMP6]]576;577; AVX_FMA4-LABEL: @buildvector_mul_subadd_ps256(578; AVX_FMA4-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]579; AVX_FMA4-NEXT: [[TMP2:%.*]] = fadd <8 x float> [[A]], [[B:%.*]]580; AVX_FMA4-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 poison, i32 poison, i32 poison, i32 poison>581; AVX_FMA4-NEXT: [[TMP7:%.*]] = fsub <8 x float> [[A]], [[B]]582; AVX_FMA4-NEXT: [[TMP4:%.*]] = shufflevector <8 x float> [[TMP7]], <8 x float> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>583; AVX_FMA4-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[TMP3]], <8 x float> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>584; AVX_FMA4-NEXT: [[TMP6:%.*]] = shufflevector <8 x float> [[TMP5]], <8 x float> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>585; AVX_FMA4-NEXT: ret <8 x float> [[TMP6]]586;587; AVX_FMA3-LABEL: @buildvector_mul_subadd_ps256(588; AVX_FMA3-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]589; AVX_FMA3-NEXT: [[TMP0:%.*]] = fadd <8 x float> [[A]], [[B:%.*]]590; AVX_FMA3-NEXT: [[TMP1:%.*]] = fsub <8 x float> [[A]], [[B]]591; AVX_FMA3-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>592; AVX_FMA3-NEXT: ret <8 x float> [[TMP2]]593;594; AVX512-LABEL: @buildvector_mul_subadd_ps256(595; AVX512-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]596; AVX512-NEXT: [[TMP0:%.*]] = fadd <8 x float> [[A]], [[B:%.*]]597; AVX512-NEXT: [[TMP1:%.*]] = fsub <8 x float> [[A]], [[B]]598; AVX512-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>599; AVX512-NEXT: ret <8 x float> [[TMP2]]600;601 %A = fmul <8 x float> %C, %D602 %A0 = extractelement <8 x float> %A, i32 0603 %B0 = extractelement <8 x float> %B, i32 0604 %sub0 = fadd float %A0, %B0605 %A2 = extractelement <8 x float> %A, i32 2606 %B2 = extractelement <8 x float> %B, i32 2607 %sub2 = fadd float %A2, %B2608 %A4 = extractelement <8 x float> %A, i32 4609 %B4 = extractelement <8 x float> %B, i32 4610 %sub4 = fadd float %A4, %B4611 %A6 = extractelement <8 x float> %A, i32 6612 %B6 = extractelement <8 x float> %B, i32 6613 %sub6 = fadd float %A6, %B6614 %A1 = extractelement <8 x float> %A, i32 1615 %B1 = extractelement <8 x float> %B, i32 1616 %add1 = fsub float %A1, %B1617 %A3 = extractelement <8 x float> %A, i32 3618 %B3 = extractelement <8 x float> %B, i32 3619 %add3 = fsub float %A3, %B3620 %A5 = extractelement <8 x float> %A, i32 5621 %B5 = extractelement <8 x float> %B, i32 5622 %add5 = fsub float %A5, %B5623 %A7 = extractelement <8 x float> %A, i32 7624 %B7 = extractelement <8 x float> %B, i32 7625 %add7 = fsub float %A7, %B7626 %vecinsert1 = insertelement <8 x float> undef, float %sub0, i32 0627 %vecinsert2 = insertelement <8 x float> %vecinsert1, float %add1, i32 1628 %vecinsert3 = insertelement <8 x float> %vecinsert2, float %sub2, i32 2629 %vecinsert4 = insertelement <8 x float> %vecinsert3, float %add3, i32 3630 %vecinsert5 = insertelement <8 x float> %vecinsert4, float %sub4, i32 4631 %vecinsert6 = insertelement <8 x float> %vecinsert5, float %add5, i32 5632 %vecinsert7 = insertelement <8 x float> %vecinsert6, float %sub6, i32 6633 %vecinsert8 = insertelement <8 x float> %vecinsert7, float %add7, i32 7634 ret <8 x float> %vecinsert8635}636 637define <4 x double> @buildvector_mul_subadd_pd256(<4 x double> %C, <4 x double> %D, <4 x double> %B) {638; CHECK-LABEL: @buildvector_mul_subadd_pd256(639; CHECK-NEXT: [[A:%.*]] = fmul <4 x double> [[C:%.*]], [[D:%.*]]640; CHECK-NEXT: [[TMP0:%.*]] = fadd <4 x double> [[A]], [[B:%.*]]641; CHECK-NEXT: [[TMP1:%.*]] = fsub <4 x double> [[A]], [[B]]642; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[TMP0]], <4 x double> [[TMP1]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>643; CHECK-NEXT: ret <4 x double> [[TMP2]]644;645 %A = fmul <4 x double> %C, %D646 %A0 = extractelement <4 x double> %A, i32 0647 %B0 = extractelement <4 x double> %B, i32 0648 %sub0 = fadd double %A0, %B0649 %A2 = extractelement <4 x double> %A, i32 2650 %B2 = extractelement <4 x double> %B, i32 2651 %sub2 = fadd double %A2, %B2652 %A1 = extractelement <4 x double> %A, i32 1653 %B1 = extractelement <4 x double> %B, i32 1654 %add1 = fsub double %A1, %B1655 %A3 = extractelement <4 x double> %A, i32 3656 %B3 = extractelement <4 x double> %B, i32 3657 %add3 = fsub double %A3, %B3658 %vecinsert1 = insertelement <4 x double> undef, double %sub0, i32 0659 %vecinsert2 = insertelement <4 x double> %vecinsert1, double %add1, i32 1660 %vecinsert3 = insertelement <4 x double> %vecinsert2, double %sub2, i32 2661 %vecinsert4 = insertelement <4 x double> %vecinsert3, double %add3, i32 3662 ret <4 x double> %vecinsert4663}664 665define <16 x float> @buildvector_mul_subadd_ps512(<16 x float> %C, <16 x float> %D, <16 x float> %B) {666; SSE-LABEL: @buildvector_mul_subadd_ps512(667; SSE-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]668; SSE-NEXT: [[TMP1:%.*]] = fadd <16 x float> [[A]], [[B:%.*]]669; SSE-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[TMP1]], <16 x float> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>670; SSE-NEXT: [[TMP3:%.*]] = fsub <16 x float> [[A]], [[B]]671; SSE-NEXT: [[TMP4:%.*]] = shufflevector <16 x float> [[TMP3]], <16 x float> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>672; SSE-NEXT: [[VECINSERT161:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> [[TMP4]], <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>673; SSE-NEXT: ret <16 x float> [[VECINSERT161]]674;675; AVX_FMA-LABEL: @buildvector_mul_subadd_ps512(676; AVX_FMA-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]677; AVX_FMA-NEXT: [[TMP3:%.*]] = fadd <16 x float> [[A]], [[B:%.*]]678; AVX_FMA-NEXT: [[TMP4:%.*]] = shufflevector <16 x float> [[TMP3]], <16 x float> poison, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>679; AVX_FMA-NEXT: [[TMP5:%.*]] = fsub <16 x float> [[A]], [[B]]680; AVX_FMA-NEXT: [[TMP6:%.*]] = shufflevector <16 x float> [[TMP5]], <16 x float> poison, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>681; AVX_FMA-NEXT: [[TMP7:%.*]] = shufflevector <16 x float> [[TMP4]], <16 x float> [[TMP6]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>682; AVX_FMA-NEXT: ret <16 x float> [[TMP7]]683;684; AVX512-LABEL: @buildvector_mul_subadd_ps512(685; AVX512-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]686; AVX512-NEXT: [[TMP1:%.*]] = fadd <16 x float> [[A]], [[B:%.*]]687; AVX512-NEXT: [[TMP10:%.*]] = fsub <16 x float> [[A]], [[B]]688; AVX512-NEXT: [[VECINSERT162:%.*]] = shufflevector <16 x float> [[TMP1]], <16 x float> [[TMP10]], <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>689; AVX512-NEXT: ret <16 x float> [[VECINSERT162]]690;691 %A = fmul <16 x float> %C, %D692 %A0 = extractelement <16 x float> %A, i32 0693 %B0 = extractelement <16 x float> %B, i32 0694 %sub0 = fadd float %A0, %B0695 %A2 = extractelement <16 x float> %A, i32 2696 %B2 = extractelement <16 x float> %B, i32 2697 %sub2 = fadd float %A2, %B2698 %A4 = extractelement <16 x float> %A, i32 4699 %B4 = extractelement <16 x float> %B, i32 4700 %sub4 = fadd float %A4, %B4701 %A6 = extractelement <16 x float> %A, i32 6702 %B6 = extractelement <16 x float> %B, i32 6703 %sub6 = fadd float %A6, %B6704 %A8 = extractelement <16 x float> %A, i32 8705 %B8 = extractelement <16 x float> %B, i32 8706 %sub8 = fadd float %A8, %B8707 %A10 = extractelement <16 x float> %A, i32 10708 %B10 = extractelement <16 x float> %B, i32 10709 %sub10 = fadd float %A10, %B10710 %A12 = extractelement <16 x float> %A, i32 12711 %B12 = extractelement <16 x float> %B, i32 12712 %sub12 = fadd float %A12, %B12713 %A14 = extractelement <16 x float> %A, i32 14714 %B14 = extractelement <16 x float> %B, i32 14715 %sub14 = fadd float %A14, %B14716 %A1 = extractelement <16 x float> %A, i32 1717 %B1 = extractelement <16 x float> %B, i32 1718 %add1 = fsub float %A1, %B1719 %A3 = extractelement <16 x float> %A, i32 3720 %B3 = extractelement <16 x float> %B, i32 3721 %add3 = fsub float %A3, %B3722 %A5 = extractelement <16 x float> %A, i32 5723 %B5 = extractelement <16 x float> %B, i32 5724 %add5 = fsub float %A5, %B5725 %A7 = extractelement <16 x float> %A, i32 7726 %B7 = extractelement <16 x float> %B, i32 7727 %add7 = fsub float %A7, %B7728 %A9 = extractelement <16 x float> %A, i32 9729 %B9 = extractelement <16 x float> %B, i32 9730 %add9 = fsub float %A9, %B9731 %A11 = extractelement <16 x float> %A, i32 11732 %B11 = extractelement <16 x float> %B, i32 11733 %add11 = fsub float %A11, %B11734 %A13 = extractelement <16 x float> %A, i32 13735 %B13 = extractelement <16 x float> %B, i32 13736 %add13 = fsub float %A13, %B13737 %A15 = extractelement <16 x float> %A, i32 15738 %B15 = extractelement <16 x float> %B, i32 15739 %add15 = fsub float %A15, %B15740 %vecinsert1 = insertelement <16 x float> undef, float %sub0, i32 0741 %vecinsert2 = insertelement <16 x float> %vecinsert1, float %add1, i32 1742 %vecinsert3 = insertelement <16 x float> %vecinsert2, float %sub2, i32 2743 %vecinsert4 = insertelement <16 x float> %vecinsert3, float %add3, i32 3744 %vecinsert5 = insertelement <16 x float> %vecinsert4, float %sub4, i32 4745 %vecinsert6 = insertelement <16 x float> %vecinsert5, float %add5, i32 5746 %vecinsert7 = insertelement <16 x float> %vecinsert6, float %sub6, i32 6747 %vecinsert8 = insertelement <16 x float> %vecinsert7, float %add7, i32 7748 %vecinsert9 = insertelement <16 x float> %vecinsert8, float %sub8, i32 8749 %vecinsert10 = insertelement <16 x float> %vecinsert9, float %add9, i32 9750 %vecinsert11 = insertelement <16 x float> %vecinsert10, float %sub10, i32 10751 %vecinsert12 = insertelement <16 x float> %vecinsert11, float %add11, i32 11752 %vecinsert13 = insertelement <16 x float> %vecinsert12, float %sub12, i32 12753 %vecinsert14 = insertelement <16 x float> %vecinsert13, float %add13, i32 13754 %vecinsert15 = insertelement <16 x float> %vecinsert14, float %sub14, i32 14755 %vecinsert16 = insertelement <16 x float> %vecinsert15, float %add15, i32 15756 ret <16 x float> %vecinsert16757}758 759define <16 x float> @buildvector_mul_subadd_ps512_partial(<16 x float> %C, <16 x float> %D, <16 x float> %B) {760; SSE-LABEL: @buildvector_mul_subadd_ps512_partial(761; SSE-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]762; SSE-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 13>763; SSE-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[B:%.*]], <16 x float> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 13>764; SSE-NEXT: [[TMP3:%.*]] = fadd <12 x float> [[TMP1]], [[TMP2]]765; SSE-NEXT: [[TMP4:%.*]] = fsub <12 x float> [[TMP1]], [[TMP2]]766; SSE-NEXT: [[TMP5:%.*]] = shufflevector <12 x float> [[TMP3]], <12 x float> [[TMP4]], <12 x i32> <i32 0, i32 13, i32 2, i32 15, i32 4, i32 5, i32 18, i32 7, i32 20, i32 9, i32 22, i32 23>767; SSE-NEXT: [[TMP6:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <2 x i32> <i32 14, i32 15>768; SSE-NEXT: [[TMP7:%.*]] = shufflevector <16 x float> [[B]], <16 x float> poison, <2 x i32> <i32 14, i32 15>769; SSE-NEXT: [[TMP8:%.*]] = fadd <2 x float> [[TMP6]], [[TMP7]]770; SSE-NEXT: [[TMP9:%.*]] = fsub <2 x float> [[TMP6]], [[TMP7]]771; SSE-NEXT: [[TMP10:%.*]] = shufflevector <12 x float> [[TMP5]], <12 x float> <float undef, float undef, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 12, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 13, i32 11, i32 poison, i32 poison>772; SSE-NEXT: [[TMP11:%.*]] = shufflevector <2 x float> [[TMP8]], <2 x float> [[TMP9]], <16 x i32> <i32 0, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>773; SSE-NEXT: [[VECINSERT161:%.*]] = shufflevector <16 x float> [[TMP10]], <16 x float> [[TMP11]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 16, i32 17>774; SSE-NEXT: ret <16 x float> [[VECINSERT161]]775;776; AVX-LABEL: @buildvector_mul_subadd_ps512_partial(777; AVX-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]778; AVX-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 7, i32 8>779; AVX-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[B:%.*]], <16 x float> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 7, i32 8>780; AVX-NEXT: [[TMP3:%.*]] = fadd <8 x float> [[TMP1]], [[TMP2]]781; AVX-NEXT: [[TMP4:%.*]] = fsub <8 x float> [[TMP1]], [[TMP2]]782; AVX-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[TMP3]], <8 x float> [[TMP4]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 5, i32 14, i32 7>783; AVX-NEXT: [[TMP6:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <4 x i32> <i32 9, i32 10, i32 11, i32 13>784; AVX-NEXT: [[TMP7:%.*]] = shufflevector <16 x float> [[B]], <16 x float> poison, <4 x i32> <i32 9, i32 10, i32 11, i32 13>785; AVX-NEXT: [[TMP8:%.*]] = fsub <4 x float> [[TMP6]], [[TMP7]]786; AVX-NEXT: [[TMP9:%.*]] = fadd <4 x float> [[TMP6]], [[TMP7]]787; AVX-NEXT: [[TMP10:%.*]] = shufflevector <16 x float> [[A]], <16 x float> poison, <2 x i32> <i32 14, i32 15>788; AVX-NEXT: [[TMP11:%.*]] = shufflevector <16 x float> [[B]], <16 x float> poison, <2 x i32> <i32 14, i32 15>789; AVX-NEXT: [[TMP12:%.*]] = fadd <2 x float> [[TMP10]], [[TMP11]]790; AVX-NEXT: [[TMP13:%.*]] = fsub <2 x float> [[TMP10]], [[TMP11]]791; AVX-NEXT: [[TMP14:%.*]] = shufflevector <8 x float> [[TMP5]], <8 x float> <float undef, float undef, float poison, float poison, float poison, float poison, float poison, float poison>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 9, i32 poison, i32 poison, i32 poison>792; AVX-NEXT: [[TMP15:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> [[TMP9]], <16 x i32> <i32 0, i32 5, i32 2, i32 poison, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>793; AVX-NEXT: [[VECINSERT141:%.*]] = shufflevector <16 x float> [[TMP14]], <16 x float> [[TMP15]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 16, i32 17, i32 18, i32 12, i32 20, i32 poison, i32 poison>794; AVX-NEXT: [[TMP16:%.*]] = shufflevector <2 x float> [[TMP12]], <2 x float> [[TMP13]], <16 x i32> <i32 0, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>795; AVX-NEXT: [[VECINSERT162:%.*]] = shufflevector <16 x float> [[VECINSERT141]], <16 x float> [[TMP16]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 16, i32 17>796; AVX-NEXT: ret <16 x float> [[VECINSERT162]]797;798 %A = fmul <16 x float> %C, %D799 %A0 = extractelement <16 x float> %A, i32 0800 %B0 = extractelement <16 x float> %B, i32 0801 %sub0 = fadd float %A0, %B0802 %A2 = extractelement <16 x float> %A, i32 2803 %B2 = extractelement <16 x float> %B, i32 2804 %sub2 = fadd float %A2, %B2805 %A4 = extractelement <16 x float> %A, i32 4806 %B4 = extractelement <16 x float> %B, i32 4807 %sub4 = fadd float %A4, %B4808 %A6 = extractelement <16 x float> %A, i32 6809 %B6 = extractelement <16 x float> %B, i32 6810 %sub6 = fadd float %A6, %B6811 %A8 = extractelement <16 x float> %A, i32 8812 %B8 = extractelement <16 x float> %B, i32 8813 %sub8 = fadd float %A8, %B8814 %A10 = extractelement <16 x float> %A, i32 10815 %B10 = extractelement <16 x float> %B, i32 10816 %sub10 = fadd float %A10, %B10817 %A12 = extractelement <16 x float> %A, i32 12818 %B12 = extractelement <16 x float> %B, i32 12819 %sub12 = fadd float %A12, %B12820 %A14 = extractelement <16 x float> %A, i32 14821 %B14 = extractelement <16 x float> %B, i32 14822 %sub14 = fadd float %A14, %B14823 %A1 = extractelement <16 x float> %A, i32 1824 %B1 = extractelement <16 x float> %B, i32 1825 %add1 = fsub float %A1, %B1826 %A3 = extractelement <16 x float> %A, i32 3827 %B3 = extractelement <16 x float> %B, i32 3828 %add3 = fsub float %A3, %B3829 %A5 = extractelement <16 x float> %A, i32 5830 %B5 = extractelement <16 x float> %B, i32 5831 %add5 = fsub float %A5, %B5832 %A7 = extractelement <16 x float> %A, i32 7833 %B7 = extractelement <16 x float> %B, i32 7834 %add7 = fsub float %A7, %B7835 %A9 = extractelement <16 x float> %A, i32 9836 %B9 = extractelement <16 x float> %B, i32 9837 %add9 = fsub float %A9, %B9838 %A11 = extractelement <16 x float> %A, i32 11839 %B11 = extractelement <16 x float> %B, i32 11840 %add11 = fsub float %A11, %B11841 %A13 = extractelement <16 x float> %A, i32 13842 %B13 = extractelement <16 x float> %B, i32 13843 %add13 = fsub float %A13, %B13844 %A15 = extractelement <16 x float> %A, i32 15845 %B15 = extractelement <16 x float> %B, i32 15846 %add15 = fsub float %A15, %B15847 %vecinsert1 = insertelement <16 x float> undef, float %sub0, i32 0848 %vecinsert2 = insertelement <16 x float> %vecinsert1, float %add1, i32 1849 %vecinsert3 = insertelement <16 x float> %vecinsert2, float %sub2, i32 2850 %vecinsert4 = insertelement <16 x float> %vecinsert3, float %add3, i32 3851 %vecinsert5 = insertelement <16 x float> %vecinsert4, float %sub4, i32 4852 ; element 5 is undef853 %vecinsert7 = insertelement <16 x float> %vecinsert5, float %sub6, i32 6854 %vecinsert8 = insertelement <16 x float> %vecinsert7, float %add7, i32 7855 %vecinsert9 = insertelement <16 x float> %vecinsert8, float %sub8, i32 8856 %vecinsert10 = insertelement <16 x float> %vecinsert9, float %add9, i32 9857 %vecinsert11 = insertelement <16 x float> %vecinsert10, float %sub10, i32 10858 %vecinsert12 = insertelement <16 x float> %vecinsert11, float %add11, i32 11859 ; element 12 is undef860 %vecinsert14 = insertelement <16 x float> %vecinsert12, float %add13, i32 13861 %vecinsert15 = insertelement <16 x float> %vecinsert14, float %sub14, i32 14862 %vecinsert16 = insertelement <16 x float> %vecinsert15, float %add15, i32 15863 ret <16 x float> %vecinsert16864}865 866define <8 x double> @buildvector_mul_subadd_pd512(<8 x double> %C, <8 x double> %D, <8 x double> %B) {867; SSE-LABEL: @buildvector_mul_subadd_pd512(868; SSE-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]869; SSE-NEXT: [[TMP0:%.*]] = fadd <8 x double> [[A]], [[B:%.*]]870; SSE-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[TMP0]], <8 x double> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>871; SSE-NEXT: [[TMP2:%.*]] = fsub <8 x double> [[A]], [[B]]872; SSE-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[TMP2]], <8 x double> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>873; SSE-NEXT: [[VECINSERT8:%.*]] = shufflevector <4 x double> [[TMP1]], <4 x double> [[TMP4]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>874; SSE-NEXT: ret <8 x double> [[VECINSERT8]]875;876; AVX_FMA-LABEL: @buildvector_mul_subadd_pd512(877; AVX_FMA-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]878; AVX_FMA-NEXT: [[TMP3:%.*]] = fadd <8 x double> [[A]], [[B:%.*]]879; AVX_FMA-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[TMP3]], <8 x double> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 poison, i32 poison, i32 poison, i32 poison>880; AVX_FMA-NEXT: [[TMP5:%.*]] = fsub <8 x double> [[A]], [[B]]881; AVX_FMA-NEXT: [[TMP6:%.*]] = shufflevector <8 x double> [[TMP5]], <8 x double> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>882; AVX_FMA-NEXT: [[TMP7:%.*]] = shufflevector <8 x double> [[TMP4]], <8 x double> [[TMP6]], <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>883; AVX_FMA-NEXT: ret <8 x double> [[TMP7]]884;885; AVX512-LABEL: @buildvector_mul_subadd_pd512(886; AVX512-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]887; AVX512-NEXT: [[TMP7:%.*]] = fadd <8 x double> [[A]], [[B:%.*]]888; AVX512-NEXT: [[TMP2:%.*]] = fsub <8 x double> [[A]], [[B]]889; AVX512-NEXT: [[VECINSERT8:%.*]] = shufflevector <8 x double> [[TMP7]], <8 x double> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>890; AVX512-NEXT: ret <8 x double> [[VECINSERT8]]891;892 %A = fmul <8 x double> %C, %D893 %A0 = extractelement <8 x double> %A, i32 0894 %B0 = extractelement <8 x double> %B, i32 0895 %sub0 = fadd double %A0, %B0896 %A2 = extractelement <8 x double> %A, i32 2897 %B2 = extractelement <8 x double> %B, i32 2898 %sub2 = fadd double %A2, %B2899 %A4 = extractelement <8 x double> %A, i32 4900 %B4 = extractelement <8 x double> %B, i32 4901 %sub4 = fadd double %A4, %B4902 %A6 = extractelement <8 x double> %A, i32 6903 %B6 = extractelement <8 x double> %B, i32 6904 %sub6 = fadd double %A6, %B6905 %A1 = extractelement <8 x double> %A, i32 1906 %B1 = extractelement <8 x double> %B, i32 1907 %add1 = fsub double %A1, %B1908 %A3 = extractelement <8 x double> %A, i32 3909 %B3 = extractelement <8 x double> %B, i32 3910 %add3 = fsub double %A3, %B3911 %A5 = extractelement <8 x double> %A, i52 5912 %B5 = extractelement <8 x double> %B, i52 5913 %add5 = fsub double %A5, %B5914 %A7 = extractelement <8 x double> %A, i32 7915 %B7 = extractelement <8 x double> %B, i32 7916 %add7 = fsub double %A7, %B7917 %vecinsert1 = insertelement <8 x double> undef, double %sub0, i32 0918 %vecinsert2 = insertelement <8 x double> %vecinsert1, double %add1, i32 1919 %vecinsert3 = insertelement <8 x double> %vecinsert2, double %sub2, i32 2920 %vecinsert4 = insertelement <8 x double> %vecinsert3, double %add3, i32 3921 %vecinsert5 = insertelement <8 x double> %vecinsert4, double %sub4, i32 4922 %vecinsert6 = insertelement <8 x double> %vecinsert5, double %add5, i32 5923 %vecinsert7 = insertelement <8 x double> %vecinsert6, double %sub6, i32 6924 %vecinsert8 = insertelement <8 x double> %vecinsert7, double %add7, i32 7925 ret <8 x double> %vecinsert8926}927 928define <8 x double> @buildvector_mul_subadd_pd512_partial(<8 x double> %C, <8 x double> %D, <8 x double> %B) {929; SSE-LABEL: @buildvector_mul_subadd_pd512_partial(930; SSE-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]931; SSE-NEXT: [[TMP1:%.*]] = fadd <8 x double> [[A]], [[B:%.*]]932; SSE-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[TMP1]], <8 x double> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>933; SSE-NEXT: [[TMP3:%.*]] = fsub <8 x double> [[A]], [[B]]934; SSE-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[TMP3]], <8 x double> poison, <2 x i32> <i32 1, i32 3>935; SSE-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> poison, <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison>936; SSE-NEXT: [[TMP6:%.*]] = shufflevector <2 x double> [[TMP4]], <2 x double> poison, <6 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison>937; SSE-NEXT: [[TMP7:%.*]] = shufflevector <6 x double> [[TMP5]], <6 x double> [[TMP6]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 7>938; SSE-NEXT: [[A7:%.*]] = extractelement <8 x double> [[A]], i64 7939; SSE-NEXT: [[B7:%.*]] = extractelement <8 x double> [[B]], i64 7940; SSE-NEXT: [[ADD7:%.*]] = fsub double [[A7]], [[B7]]941; SSE-NEXT: [[TMP8:%.*]] = shufflevector <6 x double> [[TMP7]], <6 x double> <double undef, double poison, double poison, double poison, double poison, double poison>, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 poison>942; SSE-NEXT: [[VECINSERT8:%.*]] = insertelement <8 x double> [[TMP8]], double [[ADD7]], i64 7943; SSE-NEXT: ret <8 x double> [[VECINSERT8]]944;945; AVX_FMA4-LABEL: @buildvector_mul_subadd_pd512_partial(946; AVX_FMA4-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]947; AVX_FMA4-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>948; AVX_FMA4-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[B:%.*]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>949; AVX_FMA4-NEXT: [[TMP3:%.*]] = fadd <4 x double> [[TMP1]], [[TMP2]]950; AVX_FMA4-NEXT: [[TMP4:%.*]] = fsub <4 x double> [[TMP1]], [[TMP2]]951; AVX_FMA4-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP3]], <4 x double> [[TMP4]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>952; AVX_FMA4-NEXT: [[A7:%.*]] = extractelement <8 x double> [[A]], i64 7953; AVX_FMA4-NEXT: [[B7:%.*]] = extractelement <8 x double> [[B]], i64 7954; AVX_FMA4-NEXT: [[ADD7:%.*]] = fsub double [[A7]], [[B7]]955; AVX_FMA4-NEXT: [[TMP6:%.*]] = shufflevector <4 x double> [[TMP5]], <4 x double> <double undef, double poison, double poison, double poison>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 4, i32 poison, i32 poison>956; AVX_FMA4-NEXT: [[TMP7:%.*]] = fadd <8 x double> [[A]], [[B]]957; AVX_FMA4-NEXT: [[TMP8:%.*]] = shufflevector <8 x double> [[TMP7]], <8 x double> poison, <8 x i32> <i32 4, i32 poison, i32 6, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>958; AVX_FMA4-NEXT: [[VECINSERT71:%.*]] = shufflevector <8 x double> [[TMP6]], <8 x double> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 5, i32 10, i32 poison>959; AVX_FMA4-NEXT: [[VECINSERT8:%.*]] = insertelement <8 x double> [[VECINSERT71]], double [[ADD7]], i64 7960; AVX_FMA4-NEXT: ret <8 x double> [[VECINSERT8]]961;962; AVX_FMA3-LABEL: @buildvector_mul_subadd_pd512_partial(963; AVX_FMA3-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]964; AVX_FMA3-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>965; AVX_FMA3-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[B:%.*]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>966; AVX_FMA3-NEXT: [[TMP3:%.*]] = fadd <4 x double> [[TMP1]], [[TMP2]]967; AVX_FMA3-NEXT: [[TMP4:%.*]] = fsub <4 x double> [[TMP1]], [[TMP2]]968; AVX_FMA3-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP3]], <4 x double> [[TMP4]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>969; AVX_FMA3-NEXT: [[TMP6:%.*]] = fsub <8 x double> [[A]], [[B]]970; AVX_FMA3-NEXT: [[TMP7:%.*]] = shufflevector <4 x double> [[TMP5]], <4 x double> <double undef, double poison, double poison, double poison>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 4, i32 poison, i32 poison>971; AVX_FMA3-NEXT: [[TMP8:%.*]] = fadd <8 x double> [[A]], [[B]]972; AVX_FMA3-NEXT: [[TMP9:%.*]] = shufflevector <8 x double> [[TMP8]], <8 x double> poison, <8 x i32> <i32 4, i32 poison, i32 6, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>973; AVX_FMA3-NEXT: [[VECINSERT71:%.*]] = shufflevector <8 x double> [[TMP7]], <8 x double> [[TMP9]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 5, i32 10, i32 poison>974; AVX_FMA3-NEXT: [[VECINSERT8:%.*]] = shufflevector <8 x double> [[VECINSERT71]], <8 x double> [[TMP6]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 15>975; AVX_FMA3-NEXT: ret <8 x double> [[VECINSERT8]]976;977; AVX512-LABEL: @buildvector_mul_subadd_pd512_partial(978; AVX512-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]979; AVX512-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>980; AVX512-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[B:%.*]], <8 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>981; AVX512-NEXT: [[TMP3:%.*]] = fadd <4 x double> [[TMP1]], [[TMP2]]982; AVX512-NEXT: [[TMP4:%.*]] = fsub <4 x double> [[TMP1]], [[TMP2]]983; AVX512-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP3]], <4 x double> [[TMP4]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>984; AVX512-NEXT: [[TMP6:%.*]] = fsub <8 x double> [[A]], [[B]]985; AVX512-NEXT: [[TMP7:%.*]] = shufflevector <4 x double> [[TMP5]], <4 x double> <double undef, double poison, double poison, double poison>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 4, i32 poison, i32 poison>986; AVX512-NEXT: [[TMP8:%.*]] = fadd <8 x double> [[A]], [[B]]987; AVX512-NEXT: [[TMP9:%.*]] = shufflevector <8 x double> [[TMP8]], <8 x double> poison, <8 x i32> <i32 4, i32 poison, i32 6, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>988; AVX512-NEXT: [[VECINSERT71:%.*]] = shufflevector <8 x double> [[TMP7]], <8 x double> [[TMP9]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 5, i32 10, i32 poison>989; AVX512-NEXT: [[VECINSERT8:%.*]] = shufflevector <8 x double> [[VECINSERT71]], <8 x double> [[TMP6]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 15>990; AVX512-NEXT: ret <8 x double> [[VECINSERT8]]991;992 %A = fmul <8 x double> %C, %D993 %A0 = extractelement <8 x double> %A, i32 0994 %B0 = extractelement <8 x double> %B, i32 0995 %sub0 = fadd double %A0, %B0996 %A2 = extractelement <8 x double> %A, i32 2997 %B2 = extractelement <8 x double> %B, i32 2998 %sub2 = fadd double %A2, %B2999 %A4 = extractelement <8 x double> %A, i32 41000 %B4 = extractelement <8 x double> %B, i32 41001 %sub4 = fadd double %A4, %B41002 %A6 = extractelement <8 x double> %A, i32 61003 %B6 = extractelement <8 x double> %B, i32 61004 %sub6 = fadd double %A6, %B61005 %A1 = extractelement <8 x double> %A, i32 11006 %B1 = extractelement <8 x double> %B, i32 11007 %add1 = fsub double %A1, %B11008 %A3 = extractelement <8 x double> %A, i32 31009 %B3 = extractelement <8 x double> %B, i32 31010 %add3 = fsub double %A3, %B31011 %A7 = extractelement <8 x double> %A, i32 71012 %B7 = extractelement <8 x double> %B, i32 71013 %add7 = fsub double %A7, %B71014 %vecinsert1 = insertelement <8 x double> undef, double %sub0, i32 01015 %vecinsert2 = insertelement <8 x double> %vecinsert1, double %add1, i32 11016 %vecinsert3 = insertelement <8 x double> %vecinsert2, double %sub2, i32 21017 %vecinsert4 = insertelement <8 x double> %vecinsert3, double %add3, i32 31018 %vecinsert5 = insertelement <8 x double> %vecinsert4, double %sub4, i32 41019 ; element 5 is undef1020 %vecinsert7 = insertelement <8 x double> %vecinsert5, double %sub6, i32 61021 %vecinsert8 = insertelement <8 x double> %vecinsert7, double %add7, i32 71022 ret <8 x double> %vecinsert81023}1024