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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -O3 -S -mtriple=x86_64-- -mattr=+avx2 < %s | FileCheck %s3 4define i32 @loadCombine_4consecutive_1234(ptr %p) {5; CHECK-LABEL: @loadCombine_4consecutive_1234(6; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 17; CHECK-NEXT: ret i32 [[L1]]8;9 %p1 = getelementptr i8, ptr %p, i32 110 %p2 = getelementptr i8, ptr %p, i32 211 %p3 = getelementptr i8, ptr %p, i32 312 %l1 = load i8, ptr %p13 %l2 = load i8, ptr %p114 %l3 = load i8, ptr %p215 %l4 = load i8, ptr %p316 17 %e1 = zext i8 %l1 to i3218 %e2 = zext i8 %l2 to i3219 %e3 = zext i8 %l3 to i3220 %e4 = zext i8 %l4 to i3221 22 %s2 = shl i32 %e2, 823 %s3 = shl i32 %e3, 1624 %s4 = shl i32 %e4, 2425 26 %o1 = or i32 %e1, %s227 %o2 = or i32 %o1, %s328 %o3 = or i32 %o2, %s429 ret i32 %o330}31 32define i32 @loadCombine_4consecutive_1243(ptr %p) {33; CHECK-LABEL: @loadCombine_4consecutive_1243(34; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 235; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 336; CHECK-NEXT: [[L1:%.*]] = load i16, ptr [[P]], align 137; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[L1]] to i3238; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 139; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 140; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i3241; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i3242; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 1643; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 2444; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[S3]], [[TMP1]]45; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]46; CHECK-NEXT: ret i32 [[O3]]47;48 %p1 = getelementptr i8, ptr %p, i32 149 %p2 = getelementptr i8, ptr %p, i32 250 %p3 = getelementptr i8, ptr %p, i32 351 %l1 = load i8, ptr %p52 %l2 = load i8, ptr %p153 %l3 = load i8, ptr %p254 %l4 = load i8, ptr %p355 56 %e1 = zext i8 %l1 to i3257 %e2 = zext i8 %l2 to i3258 %e3 = zext i8 %l3 to i3259 %e4 = zext i8 %l4 to i3260 61 %s2 = shl i32 %e2, 862 %s3 = shl i32 %e3, 1663 %s4 = shl i32 %e4, 2464 65 %o1 = or i32 %e1, %s266 %o2 = or i32 %o1, %s467 %o3 = or i32 %o2, %s368 ret i32 %o369}70 71define i32 @loadCombine_4consecutive_1324(ptr %p) {72; CHECK-LABEL: @loadCombine_4consecutive_1324(73; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 174; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 275; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 376; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 177; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 178; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 179; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 180; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i3281; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i3282; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i3283; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i3284; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 885; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 1686; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 2487; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]88; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]89; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]90; CHECK-NEXT: ret i32 [[O3]]91;92 %p1 = getelementptr i8, ptr %p, i32 193 %p2 = getelementptr i8, ptr %p, i32 294 %p3 = getelementptr i8, ptr %p, i32 395 %l1 = load i8, ptr %p96 %l2 = load i8, ptr %p197 %l3 = load i8, ptr %p298 %l4 = load i8, ptr %p399 100 %e1 = zext i8 %l1 to i32101 %e2 = zext i8 %l2 to i32102 %e3 = zext i8 %l3 to i32103 %e4 = zext i8 %l4 to i32104 105 %s2 = shl i32 %e2, 8106 %s3 = shl i32 %e3, 16107 %s4 = shl i32 %e4, 24108 109 %o1 = or i32 %e1, %s3110 %o2 = or i32 %o1, %s2111 %o3 = or i32 %o2, %s4112 ret i32 %o3113}114 115define i32 @loadCombine_4consecutive_1342(ptr %p) {116; CHECK-LABEL: @loadCombine_4consecutive_1342(117; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1118; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2119; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3120; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1121; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1122; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1123; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1124; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32125; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32126; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32127; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32128; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8129; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16130; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24131; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]132; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]133; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]134; CHECK-NEXT: ret i32 [[O3]]135;136 %p1 = getelementptr i8, ptr %p, i32 1137 %p2 = getelementptr i8, ptr %p, i32 2138 %p3 = getelementptr i8, ptr %p, i32 3139 %l1 = load i8, ptr %p140 %l2 = load i8, ptr %p1141 %l3 = load i8, ptr %p2142 %l4 = load i8, ptr %p3143 144 %e1 = zext i8 %l1 to i32145 %e2 = zext i8 %l2 to i32146 %e3 = zext i8 %l3 to i32147 %e4 = zext i8 %l4 to i32148 149 %s2 = shl i32 %e2, 8150 %s3 = shl i32 %e3, 16151 %s4 = shl i32 %e4, 24152 153 %o1 = or i32 %e1, %s3154 %o2 = or i32 %o1, %s4155 %o3 = or i32 %o2, %s2156 ret i32 %o3157}158 159define i32 @loadCombine_4consecutive_1423(ptr %p) {160; CHECK-LABEL: @loadCombine_4consecutive_1423(161; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1162; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2163; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3164; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1165; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1166; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1167; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1168; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32169; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32170; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32171; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32172; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8173; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16174; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24175; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]176; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]177; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]178; CHECK-NEXT: ret i32 [[O3]]179;180 %p1 = getelementptr i8, ptr %p, i32 1181 %p2 = getelementptr i8, ptr %p, i32 2182 %p3 = getelementptr i8, ptr %p, i32 3183 %l1 = load i8, ptr %p184 %l2 = load i8, ptr %p1185 %l3 = load i8, ptr %p2186 %l4 = load i8, ptr %p3187 188 %e1 = zext i8 %l1 to i32189 %e2 = zext i8 %l2 to i32190 %e3 = zext i8 %l3 to i32191 %e4 = zext i8 %l4 to i32192 193 %s2 = shl i32 %e2, 8194 %s3 = shl i32 %e3, 16195 %s4 = shl i32 %e4, 24196 197 %o1 = or i32 %e1, %s4198 %o2 = or i32 %o1, %s2199 %o3 = or i32 %o2, %s3200 ret i32 %o3201}202 203define i32 @loadCombine_4consecutive_1432(ptr %p) {204; CHECK-LABEL: @loadCombine_4consecutive_1432(205; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1206; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2207; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3208; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1209; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1210; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1211; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1212; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32213; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32214; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32215; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32216; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8217; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16218; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24219; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]220; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]221; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]222; CHECK-NEXT: ret i32 [[O3]]223;224 %p1 = getelementptr i8, ptr %p, i32 1225 %p2 = getelementptr i8, ptr %p, i32 2226 %p3 = getelementptr i8, ptr %p, i32 3227 %l1 = load i8, ptr %p228 %l2 = load i8, ptr %p1229 %l3 = load i8, ptr %p2230 %l4 = load i8, ptr %p3231 232 %e1 = zext i8 %l1 to i32233 %e2 = zext i8 %l2 to i32234 %e3 = zext i8 %l3 to i32235 %e4 = zext i8 %l4 to i32236 237 %s2 = shl i32 %e2, 8238 %s3 = shl i32 %e3, 16239 %s4 = shl i32 %e4, 24240 241 %o1 = or i32 %e1, %s4242 %o2 = or i32 %o1, %s3243 %o3 = or i32 %o2, %s2244 ret i32 %o3245}246 247define i32 @loadCombine_4consecutive_2134(ptr %p) {248; CHECK-LABEL: @loadCombine_4consecutive_2134(249; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1250; CHECK-NEXT: ret i32 [[L1]]251;252 %p1 = getelementptr i8, ptr %p, i32 1253 %p2 = getelementptr i8, ptr %p, i32 2254 %p3 = getelementptr i8, ptr %p, i32 3255 %l1 = load i8, ptr %p256 %l2 = load i8, ptr %p1257 %l3 = load i8, ptr %p2258 %l4 = load i8, ptr %p3259 260 %e1 = zext i8 %l1 to i32261 %e2 = zext i8 %l2 to i32262 %e3 = zext i8 %l3 to i32263 %e4 = zext i8 %l4 to i32264 265 %s2 = shl i32 %e2, 8266 %s3 = shl i32 %e3, 16267 %s4 = shl i32 %e4, 24268 269 %o1 = or i32 %s2, %e1270 %o2 = or i32 %o1, %s3271 %o3 = or i32 %o2, %s4272 ret i32 %o3273}274 275define i32 @loadCombine_4consecutive_2143(ptr %p) {276; CHECK-LABEL: @loadCombine_4consecutive_2143(277; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 2278; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3279; CHECK-NEXT: [[L1:%.*]] = load i16, ptr [[P]], align 1280; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[L1]] to i32281; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1282; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1283; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32284; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32285; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16286; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24287; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[S3]], [[TMP1]]288; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]289; CHECK-NEXT: ret i32 [[O3]]290;291 %p1 = getelementptr i8, ptr %p, i32 1292 %p2 = getelementptr i8, ptr %p, i32 2293 %p3 = getelementptr i8, ptr %p, i32 3294 %l1 = load i8, ptr %p295 %l2 = load i8, ptr %p1296 %l3 = load i8, ptr %p2297 %l4 = load i8, ptr %p3298 299 %e1 = zext i8 %l1 to i32300 %e2 = zext i8 %l2 to i32301 %e3 = zext i8 %l3 to i32302 %e4 = zext i8 %l4 to i32303 304 %s2 = shl i32 %e2, 8305 %s3 = shl i32 %e3, 16306 %s4 = shl i32 %e4, 24307 308 %o1 = or i32 %s2, %e1309 %o2 = or i32 %o1, %s4310 %o3 = or i32 %o2, %s3311 ret i32 %o3312}313 314define i32 @loadCombine_4consecutive_2314(ptr %p) {315; CHECK-LABEL: @loadCombine_4consecutive_2314(316; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1317; CHECK-NEXT: ret i32 [[L1]]318;319 %p1 = getelementptr i8, ptr %p, i32 1320 %p2 = getelementptr i8, ptr %p, i32 2321 %p3 = getelementptr i8, ptr %p, i32 3322 %l1 = load i8, ptr %p323 %l2 = load i8, ptr %p1324 %l3 = load i8, ptr %p2325 %l4 = load i8, ptr %p3326 327 %e1 = zext i8 %l1 to i32328 %e2 = zext i8 %l2 to i32329 %e3 = zext i8 %l3 to i32330 %e4 = zext i8 %l4 to i32331 332 %s2 = shl i32 %e2, 8333 %s3 = shl i32 %e3, 16334 %s4 = shl i32 %e4, 24335 336 %o1 = or i32 %s2, %s3337 %o2 = or i32 %o1, %e1338 %o3 = or i32 %o2, %s4339 ret i32 %o3340}341 342define i32 @loadCombine_4consecutive_2341(ptr %p) {343; CHECK-LABEL: @loadCombine_4consecutive_2341(344; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1345; CHECK-NEXT: ret i32 [[L1]]346;347 %p1 = getelementptr i8, ptr %p, i32 1348 %p2 = getelementptr i8, ptr %p, i32 2349 %p3 = getelementptr i8, ptr %p, i32 3350 %l1 = load i8, ptr %p351 %l2 = load i8, ptr %p1352 %l3 = load i8, ptr %p2353 %l4 = load i8, ptr %p3354 355 %e1 = zext i8 %l1 to i32356 %e2 = zext i8 %l2 to i32357 %e3 = zext i8 %l3 to i32358 %e4 = zext i8 %l4 to i32359 360 %s2 = shl i32 %e2, 8361 %s3 = shl i32 %e3, 16362 %s4 = shl i32 %e4, 24363 364 %o1 = or i32 %s2, %s3365 %o2 = or i32 %o1, %s4366 %o3 = or i32 %o2, %e1367 ret i32 %o3368}369 370define i32 @loadCombine_4consecutive_2413(ptr %p) {371; CHECK-LABEL: @loadCombine_4consecutive_2413(372; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1373; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2374; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3375; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1376; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1377; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1378; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1379; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32380; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32381; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32382; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32383; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8384; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16385; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24386; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]387; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]388; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]389; CHECK-NEXT: ret i32 [[O3]]390;391 %p1 = getelementptr i8, ptr %p, i32 1392 %p2 = getelementptr i8, ptr %p, i32 2393 %p3 = getelementptr i8, ptr %p, i32 3394 %l1 = load i8, ptr %p395 %l2 = load i8, ptr %p1396 %l3 = load i8, ptr %p2397 %l4 = load i8, ptr %p3398 399 %e1 = zext i8 %l1 to i32400 %e2 = zext i8 %l2 to i32401 %e3 = zext i8 %l3 to i32402 %e4 = zext i8 %l4 to i32403 404 %s2 = shl i32 %e2, 8405 %s3 = shl i32 %e3, 16406 %s4 = shl i32 %e4, 24407 408 %o1 = or i32 %s2, %s4409 %o2 = or i32 %o1, %e1410 %o3 = or i32 %o2, %s3411 ret i32 %o3412}413 414define i32 @loadCombine_4consecutive_2431(ptr %p) {415; CHECK-LABEL: @loadCombine_4consecutive_2431(416; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1417; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2418; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3419; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1420; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1421; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1422; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1423; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32424; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32425; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32426; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32427; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8428; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16429; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24430; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]431; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]432; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]433; CHECK-NEXT: ret i32 [[O3]]434;435 %p1 = getelementptr i8, ptr %p, i32 1436 %p2 = getelementptr i8, ptr %p, i32 2437 %p3 = getelementptr i8, ptr %p, i32 3438 %l1 = load i8, ptr %p439 %l2 = load i8, ptr %p1440 %l3 = load i8, ptr %p2441 %l4 = load i8, ptr %p3442 443 %e1 = zext i8 %l1 to i32444 %e2 = zext i8 %l2 to i32445 %e3 = zext i8 %l3 to i32446 %e4 = zext i8 %l4 to i32447 448 %s2 = shl i32 %e2, 8449 %s3 = shl i32 %e3, 16450 %s4 = shl i32 %e4, 24451 452 %o1 = or i32 %s2, %s4453 %o2 = or i32 %o1, %s3454 %o3 = or i32 %o2, %e1455 ret i32 %o3456}457 458define i32 @loadCombine_4consecutive_3124(ptr %p) {459; CHECK-LABEL: @loadCombine_4consecutive_3124(460; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1461; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2462; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3463; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1464; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1465; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1466; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1467; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32468; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32469; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32470; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32471; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8472; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16473; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24474; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]475; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]476; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]477; CHECK-NEXT: ret i32 [[O3]]478;479 %p1 = getelementptr i8, ptr %p, i32 1480 %p2 = getelementptr i8, ptr %p, i32 2481 %p3 = getelementptr i8, ptr %p, i32 3482 %l1 = load i8, ptr %p483 %l2 = load i8, ptr %p1484 %l3 = load i8, ptr %p2485 %l4 = load i8, ptr %p3486 487 %e1 = zext i8 %l1 to i32488 %e2 = zext i8 %l2 to i32489 %e3 = zext i8 %l3 to i32490 %e4 = zext i8 %l4 to i32491 492 %s2 = shl i32 %e2, 8493 %s3 = shl i32 %e3, 16494 %s4 = shl i32 %e4, 24495 496 %o1 = or i32 %s3, %e1497 %o2 = or i32 %o1, %s2498 %o3 = or i32 %o2, %s4499 ret i32 %o3500}501 502define i32 @loadCombine_4consecutive_3142(ptr %p) {503; CHECK-LABEL: @loadCombine_4consecutive_3142(504; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1505; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2506; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3507; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1508; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1509; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1510; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1511; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32512; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32513; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32514; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32515; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8516; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16517; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24518; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]519; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]520; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]521; CHECK-NEXT: ret i32 [[O3]]522;523 %p1 = getelementptr i8, ptr %p, i32 1524 %p2 = getelementptr i8, ptr %p, i32 2525 %p3 = getelementptr i8, ptr %p, i32 3526 %l1 = load i8, ptr %p527 %l2 = load i8, ptr %p1528 %l3 = load i8, ptr %p2529 %l4 = load i8, ptr %p3530 531 %e1 = zext i8 %l1 to i32532 %e2 = zext i8 %l2 to i32533 %e3 = zext i8 %l3 to i32534 %e4 = zext i8 %l4 to i32535 536 %s2 = shl i32 %e2, 8537 %s3 = shl i32 %e3, 16538 %s4 = shl i32 %e4, 24539 540 %o1 = or i32 %s3, %e1541 %o2 = or i32 %o1, %s4542 %o3 = or i32 %o2, %s2543 ret i32 %o3544}545 546define i32 @loadCombine_4consecutive_3214(ptr %p) {547; CHECK-LABEL: @loadCombine_4consecutive_3214(548; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1549; CHECK-NEXT: ret i32 [[L1]]550;551 %p1 = getelementptr i8, ptr %p, i32 1552 %p2 = getelementptr i8, ptr %p, i32 2553 %p3 = getelementptr i8, ptr %p, i32 3554 %l1 = load i8, ptr %p555 %l2 = load i8, ptr %p1556 %l3 = load i8, ptr %p2557 %l4 = load i8, ptr %p3558 559 %e1 = zext i8 %l1 to i32560 %e2 = zext i8 %l2 to i32561 %e3 = zext i8 %l3 to i32562 %e4 = zext i8 %l4 to i32563 564 %s2 = shl i32 %e2, 8565 %s3 = shl i32 %e3, 16566 %s4 = shl i32 %e4, 24567 568 %o1 = or i32 %s3, %s2569 %o2 = or i32 %o1, %e1570 %o3 = or i32 %o2, %s4571 ret i32 %o3572}573 574define i32 @loadCombine_4consecutive_3241(ptr %p) {575; CHECK-LABEL: @loadCombine_4consecutive_3241(576; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1577; CHECK-NEXT: ret i32 [[L1]]578;579 %p1 = getelementptr i8, ptr %p, i32 1580 %p2 = getelementptr i8, ptr %p, i32 2581 %p3 = getelementptr i8, ptr %p, i32 3582 %l1 = load i8, ptr %p583 %l2 = load i8, ptr %p1584 %l3 = load i8, ptr %p2585 %l4 = load i8, ptr %p3586 587 %e1 = zext i8 %l1 to i32588 %e2 = zext i8 %l2 to i32589 %e3 = zext i8 %l3 to i32590 %e4 = zext i8 %l4 to i32591 592 %s2 = shl i32 %e2, 8593 %s3 = shl i32 %e3, 16594 %s4 = shl i32 %e4, 24595 596 %o1 = or i32 %s3, %s2597 %o2 = or i32 %o1, %s4598 %o3 = or i32 %o2, %e1599 ret i32 %o3600}601 602define i32 @loadCombine_4consecutive_3412(ptr %p) {603; CHECK-LABEL: @loadCombine_4consecutive_3412(604; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1605; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2606; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1607; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1608; CHECK-NEXT: [[L3:%.*]] = load i16, ptr [[P2]], align 1609; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[L3]] to i32610; CHECK-NEXT: [[TMP2:%.*]] = shl nuw i32 [[TMP1]], 16611; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32612; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32613; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8614; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[S2]], [[E1]]615; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[TMP2]]616; CHECK-NEXT: ret i32 [[O3]]617;618 %p1 = getelementptr i8, ptr %p, i32 1619 %p2 = getelementptr i8, ptr %p, i32 2620 %p3 = getelementptr i8, ptr %p, i32 3621 %l1 = load i8, ptr %p622 %l2 = load i8, ptr %p1623 %l3 = load i8, ptr %p2624 %l4 = load i8, ptr %p3625 626 %e1 = zext i8 %l1 to i32627 %e2 = zext i8 %l2 to i32628 %e3 = zext i8 %l3 to i32629 %e4 = zext i8 %l4 to i32630 631 %s2 = shl i32 %e2, 8632 %s3 = shl i32 %e3, 16633 %s4 = shl i32 %e4, 24634 635 %o1 = or i32 %s3, %s4636 %o2 = or i32 %o1, %e1637 %o3 = or i32 %o2, %s2638 ret i32 %o3639}640 641define i32 @loadCombine_4consecutive_3421(ptr %p) {642; CHECK-LABEL: @loadCombine_4consecutive_3421(643; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1644; CHECK-NEXT: ret i32 [[L1]]645;646 %p1 = getelementptr i8, ptr %p, i32 1647 %p2 = getelementptr i8, ptr %p, i32 2648 %p3 = getelementptr i8, ptr %p, i32 3649 %l1 = load i8, ptr %p650 %l2 = load i8, ptr %p1651 %l3 = load i8, ptr %p2652 %l4 = load i8, ptr %p3653 654 %e1 = zext i8 %l1 to i32655 %e2 = zext i8 %l2 to i32656 %e3 = zext i8 %l3 to i32657 %e4 = zext i8 %l4 to i32658 659 %s2 = shl i32 %e2, 8660 %s3 = shl i32 %e3, 16661 %s4 = shl i32 %e4, 24662 663 %o1 = or i32 %s3, %s4664 %o2 = or i32 %o1, %s2665 %o3 = or i32 %o2, %e1666 ret i32 %o3667}668 669define i32 @loadCombine_4consecutive_4123(ptr %p) {670; CHECK-LABEL: @loadCombine_4consecutive_4123(671; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1672; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2673; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3674; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1675; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1676; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1677; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1678; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32679; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32680; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32681; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32682; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8683; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16684; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24685; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]686; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]687; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]688; CHECK-NEXT: ret i32 [[O3]]689;690 %p1 = getelementptr i8, ptr %p, i32 1691 %p2 = getelementptr i8, ptr %p, i32 2692 %p3 = getelementptr i8, ptr %p, i32 3693 %l1 = load i8, ptr %p694 %l2 = load i8, ptr %p1695 %l3 = load i8, ptr %p2696 %l4 = load i8, ptr %p3697 698 %e1 = zext i8 %l1 to i32699 %e2 = zext i8 %l2 to i32700 %e3 = zext i8 %l3 to i32701 %e4 = zext i8 %l4 to i32702 703 %s2 = shl i32 %e2, 8704 %s3 = shl i32 %e3, 16705 %s4 = shl i32 %e4, 24706 707 %o1 = or i32 %s4, %e1708 %o2 = or i32 %o1, %s2709 %o3 = or i32 %o2, %s3710 ret i32 %o3711}712 713define i32 @loadCombine_4consecutive_4132(ptr %p) {714; CHECK-LABEL: @loadCombine_4consecutive_4132(715; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1716; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2717; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3718; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1719; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1720; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1721; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1722; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32723; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32724; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32725; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32726; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8727; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16728; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24729; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]730; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]731; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]732; CHECK-NEXT: ret i32 [[O3]]733;734 %p1 = getelementptr i8, ptr %p, i32 1735 %p2 = getelementptr i8, ptr %p, i32 2736 %p3 = getelementptr i8, ptr %p, i32 3737 %l1 = load i8, ptr %p738 %l2 = load i8, ptr %p1739 %l3 = load i8, ptr %p2740 %l4 = load i8, ptr %p3741 742 %e1 = zext i8 %l1 to i32743 %e2 = zext i8 %l2 to i32744 %e3 = zext i8 %l3 to i32745 %e4 = zext i8 %l4 to i32746 747 %s2 = shl i32 %e2, 8748 %s3 = shl i32 %e3, 16749 %s4 = shl i32 %e4, 24750 751 %o1 = or i32 %s4, %e1752 %o2 = or i32 %o1, %s3753 %o3 = or i32 %o2, %s2754 ret i32 %o3755}756 757define i32 @loadCombine_4consecutive_4213(ptr %p) {758; CHECK-LABEL: @loadCombine_4consecutive_4213(759; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1760; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2761; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3762; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1763; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1764; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1765; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1766; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32767; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32768; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32769; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32770; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8771; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16772; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24773; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]774; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]775; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]776; CHECK-NEXT: ret i32 [[O3]]777;778 %p1 = getelementptr i8, ptr %p, i32 1779 %p2 = getelementptr i8, ptr %p, i32 2780 %p3 = getelementptr i8, ptr %p, i32 3781 %l1 = load i8, ptr %p782 %l2 = load i8, ptr %p1783 %l3 = load i8, ptr %p2784 %l4 = load i8, ptr %p3785 786 %e1 = zext i8 %l1 to i32787 %e2 = zext i8 %l2 to i32788 %e3 = zext i8 %l3 to i32789 %e4 = zext i8 %l4 to i32790 791 %s2 = shl i32 %e2, 8792 %s3 = shl i32 %e3, 16793 %s4 = shl i32 %e4, 24794 795 %o1 = or i32 %s4, %s2796 %o2 = or i32 %o1, %e1797 %o3 = or i32 %o2, %s3798 ret i32 %o3799}800 801define i32 @loadCombine_4consecutive_4231(ptr %p) {802; CHECK-LABEL: @loadCombine_4consecutive_4231(803; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1804; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2805; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3806; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1807; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1808; CHECK-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1809; CHECK-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1810; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32811; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32812; CHECK-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32813; CHECK-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32814; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8815; CHECK-NEXT: [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16816; CHECK-NEXT: [[S4:%.*]] = shl nuw i32 [[E4]], 24817; CHECK-NEXT: [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]818; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]819; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]820; CHECK-NEXT: ret i32 [[O3]]821;822 %p1 = getelementptr i8, ptr %p, i32 1823 %p2 = getelementptr i8, ptr %p, i32 2824 %p3 = getelementptr i8, ptr %p, i32 3825 %l1 = load i8, ptr %p826 %l2 = load i8, ptr %p1827 %l3 = load i8, ptr %p2828 %l4 = load i8, ptr %p3829 830 %e1 = zext i8 %l1 to i32831 %e2 = zext i8 %l2 to i32832 %e3 = zext i8 %l3 to i32833 %e4 = zext i8 %l4 to i32834 835 %s2 = shl i32 %e2, 8836 %s3 = shl i32 %e3, 16837 %s4 = shl i32 %e4, 24838 839 %o1 = or i32 %s4, %s2840 %o2 = or i32 %o1, %s3841 %o3 = or i32 %o2, %e1842 ret i32 %o3843}844 845define i32 @loadCombine_4consecutive_4312(ptr %p) {846; CHECK-LABEL: @loadCombine_4consecutive_4312(847; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1848; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2849; CHECK-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1850; CHECK-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1851; CHECK-NEXT: [[L3:%.*]] = load i16, ptr [[P2]], align 1852; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[L3]] to i32853; CHECK-NEXT: [[TMP2:%.*]] = shl nuw i32 [[TMP1]], 16854; CHECK-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32855; CHECK-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32856; CHECK-NEXT: [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8857; CHECK-NEXT: [[O2:%.*]] = or disjoint i32 [[S2]], [[E1]]858; CHECK-NEXT: [[O3:%.*]] = or disjoint i32 [[O2]], [[TMP2]]859; CHECK-NEXT: ret i32 [[O3]]860;861 %p1 = getelementptr i8, ptr %p, i32 1862 %p2 = getelementptr i8, ptr %p, i32 2863 %p3 = getelementptr i8, ptr %p, i32 3864 %l1 = load i8, ptr %p865 %l2 = load i8, ptr %p1866 %l3 = load i8, ptr %p2867 %l4 = load i8, ptr %p3868 869 %e1 = zext i8 %l1 to i32870 %e2 = zext i8 %l2 to i32871 %e3 = zext i8 %l3 to i32872 %e4 = zext i8 %l4 to i32873 874 %s2 = shl i32 %e2, 8875 %s3 = shl i32 %e3, 16876 %s4 = shl i32 %e4, 24877 878 %o1 = or i32 %s4, %s3879 %o2 = or i32 %o1, %e1880 %o3 = or i32 %o2, %s2881 ret i32 %o3882}883 884define i32 @loadCombine_4consecutive_4321(ptr %p) {885; CHECK-LABEL: @loadCombine_4consecutive_4321(886; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1887; CHECK-NEXT: ret i32 [[L1]]888;889 %p1 = getelementptr i8, ptr %p, i32 1890 %p2 = getelementptr i8, ptr %p, i32 2891 %p3 = getelementptr i8, ptr %p, i32 3892 %l1 = load i8, ptr %p893 %l2 = load i8, ptr %p1894 %l3 = load i8, ptr %p2895 %l4 = load i8, ptr %p3896 897 %e1 = zext i8 %l1 to i32898 %e2 = zext i8 %l2 to i32899 %e3 = zext i8 %l3 to i32900 %e4 = zext i8 %l4 to i32901 902 %s2 = shl i32 %e2, 8903 %s3 = shl i32 %e3, 16904 %s4 = shl i32 %e4, 24905 906 %o1 = or i32 %s4, %s3907 %o2 = or i32 %o1, %s2908 %o3 = or i32 %o2, %e1909 ret i32 %o3910}911