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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -passes="default<O3>" -enable-merge-functions -S < %s | FileCheck %s3 4target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"5target triple = "x86_64-apple-macosx12.0.0"6 7define i32 @f(i32 noundef %x) {8; CHECK-LABEL: define range(i32 0, 2) i32 @f(9; CHECK-SAME: i32 noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {10; CHECK-NEXT: [[ENTRY:.*]]:11; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X]], 812; CHECK-NEXT: br i1 [[TMP0]], label %[[SWITCH_LOOKUP:.*]], label %[[SW_EPILOG:.*]]13; CHECK: [[SWITCH_LOOKUP]]:14; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[X]] to i6415; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds nuw i32, ptr @switch.table.g, i64 [[TMP1]]16; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 417; CHECK-NEXT: br label %[[SW_EPILOG]]18; CHECK: [[SW_EPILOG]]:19; CHECK-NEXT: [[X_ADDR_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], %[[SWITCH_LOOKUP]] ], [ 0, %[[ENTRY]] ]20; CHECK-NEXT: ret i32 [[X_ADDR_0]]21;22entry:23 %x.addr = alloca i32, align 424 store i32 %x, ptr %x.addr, align 425 %0 = load i32, ptr %x.addr, align 426 switch i32 %0, label %sw.default [27 i32 0, label %sw.bb28 i32 2, label %sw.bb29 i32 4, label %sw.bb30 i32 6, label %sw.bb31 i32 7, label %sw.bb32 ]33 34sw.bb: ; preds = %entry, %entry, %entry, %entry, %entry35 store i32 1, ptr %x.addr, align 436 br label %sw.epilog37 38sw.default: ; preds = %entry39 store i32 0, ptr %x.addr, align 440 br label %sw.epilog41 42sw.epilog: ; preds = %sw.default, %sw.bb43 %1 = load i32, ptr %x.addr, align 444 ret i32 %145}46 47define i32 @g(i32 noundef %x) {48; CHECK-LABEL: define range(i32 0, 2) i32 @g(49; CHECK-SAME: i32 noundef [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {50; CHECK-NEXT: [[TMP2:%.*]] = tail call range(i32 0, 2) i32 @f(i32 noundef [[TMP0]]) #[[ATTR0]]51; CHECK-NEXT: ret i32 [[TMP2]]52;53entry:54 %x.addr = alloca i32, align 455 store i32 %x, ptr %x.addr, align 456 %0 = load i32, ptr %x.addr, align 457 switch i32 %0, label %sw.default [58 i32 0, label %sw.bb59 i32 2, label %sw.bb60 i32 4, label %sw.bb61 i32 6, label %sw.bb62 i32 7, label %sw.bb63 ]64 65sw.bb: ; preds = %entry, %entry, %entry, %entry, %entry66 store i32 1, ptr %x.addr, align 467 br label %sw.epilog68 69sw.default: ; preds = %entry70 store i32 0, ptr %x.addr, align 471 br label %sw.epilog72 73sw.epilog: ; preds = %sw.default, %sw.bb74 %1 = load i32, ptr %x.addr, align 475 ret i32 %176}77