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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s --check-prefix=SIMPLIFYCFG3; RUN: opt -passes=instcombine -S < %s | FileCheck %s --check-prefix=INSTCOMBINEONLY4; RUN: opt -passes=instcombine,simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY5; RUN: opt -passes=instcombine,simplifycfg,instcombine -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE6; RUN: opt -passes=instcombine,simplifycfg -simplifycfg-require-and-preserve-domtree=1 -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY7; RUN: opt -passes=instcombine,simplifycfg,instcombine -simplifycfg-require-and-preserve-domtree=1 -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE8 9target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"10target triple = "x86_64-pc-linux-gnu"11 12; #include <limits>13; #include <cstdint>14;15; using size_type = std::size_t;16; bool will_not_overflow(size_type size, size_type nmemb) {17; return (size != 0 && (nmemb > std::numeric_limits<size_type>::max() / size));18; }19 20define i1 @will_not_overflow(i64 %arg, i64 %arg1) {21; SIMPLIFYCFG-LABEL: @will_not_overflow(22; SIMPLIFYCFG-NEXT: bb:23; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 024; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]25; SIMPLIFYCFG: bb2:26; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]]27; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]]28; SIMPLIFYCFG-NEXT: br label [[BB5]]29; SIMPLIFYCFG: bb5:30; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ]31; SIMPLIFYCFG-NEXT: ret i1 [[T6]]32;33; INSTCOMBINEONLY-LABEL: @will_not_overflow(34; INSTCOMBINEONLY-NEXT: bb:35; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 036; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]37; INSTCOMBINEONLY: bb2:38; INSTCOMBINEONLY-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]])39; INSTCOMBINEONLY-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 140; INSTCOMBINEONLY-NEXT: br label [[BB5]]41; INSTCOMBINEONLY: bb5:42; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[MUL_OV]], [[BB2]] ]43; INSTCOMBINEONLY-NEXT: ret i1 [[T6]]44;45; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_not_overflow(46; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb:47; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 048; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]])49; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 150; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 false, i1 [[MUL_OV]]51; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]]52;53; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_not_overflow(54; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb:55; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[ARG1:%.*]] = freeze i64 [[ARG2:%.*]]56; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1]])57; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 158; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[MUL_OV]]59;60bb:61 %t0 = icmp eq i64 %arg, 062 br i1 %t0, label %bb5, label %bb263 64bb2: ; preds = %bb65 %t3 = udiv i64 -1, %arg66 %t4 = icmp ult i64 %t3, %arg167 br label %bb568 69bb5: ; preds = %bb2, %bb70 %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ]71 ret i1 %t672}73 74; Same as @will_not_overflow, but inverting return value.75 76define i1 @will_overflow(i64 %arg, i64 %arg1) {77; SIMPLIFYCFG-LABEL: @will_overflow(78; SIMPLIFYCFG-NEXT: bb:79; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 080; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]81; SIMPLIFYCFG: bb2:82; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]]83; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]]84; SIMPLIFYCFG-NEXT: br label [[BB5]]85; SIMPLIFYCFG: bb5:86; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ]87; SIMPLIFYCFG-NEXT: [[T7:%.*]] = xor i1 [[T6]], true88; SIMPLIFYCFG-NEXT: ret i1 [[T7]]89;90; INSTCOMBINEONLY-LABEL: @will_overflow(91; INSTCOMBINEONLY-NEXT: bb:92; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 093; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]94; INSTCOMBINEONLY: bb2:95; INSTCOMBINEONLY-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]])96; INSTCOMBINEONLY-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 197; INSTCOMBINEONLY-NEXT: [[PHI_BO:%.*]] = xor i1 [[MUL_OV]], true98; INSTCOMBINEONLY-NEXT: br label [[BB5]]99; INSTCOMBINEONLY: bb5:100; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ true, [[BB:%.*]] ], [ [[PHI_BO]], [[BB2]] ]101; INSTCOMBINEONLY-NEXT: ret i1 [[T6]]102;103; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_overflow(104; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb:105; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0106; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]])107; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 1108; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[PHI_BO:%.*]] = xor i1 [[MUL_OV]], true109; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 true, i1 [[PHI_BO]]110; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]]111;112; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_overflow(113; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb:114; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[ARG1:%.*]] = freeze i64 [[ARG2:%.*]]115; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1]])116; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 1117; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[PHI_BO:%.*]] = xor i1 [[MUL_OV]], true118; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[PHI_BO]]119;120bb:121 %t0 = icmp eq i64 %arg, 0122 br i1 %t0, label %bb5, label %bb2123 124bb2: ; preds = %bb125 %t3 = udiv i64 -1, %arg126 %t4 = icmp ult i64 %t3, %arg1127 br label %bb5128 129bb5: ; preds = %bb2, %bb130 %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ]131 %t7 = xor i1 %t6, true132 ret i1 %t7133}134