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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt --Os -S %s -o - | FileCheck %s3target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"4target triple = "arm64e-apple-ios19.0.0"5 6; This test checks if we generate a phi for the <vscale 16 x float> value or we manage7; to promote it during inlining.8 9; Function Attrs: mustprogress optsize ssp uwtable(sync)10define void @pluto() #0 {11; CHECK-LABEL: define void @pluto(12; CHECK-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] {13; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr inttoptr (i64 48 to ptr), align 1614; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i64 [[TMP1]], 015; CHECK-NEXT: [[TMP3:%.*]] = tail call <vscale x 16 x float> @llvm.vector.insert.nxv16f32.nxv4f32(<vscale x 16 x float> zeroinitializer, <vscale x 4 x float> zeroinitializer, i64 0)16; CHECK-NEXT: br label %[[SNORK_EXIT:.*]]17; CHECK: [[SNORK_EXIT]]:18; CHECK-NEXT: [[DOT0:%.*]] = phi <vscale x 16 x float> [ undef, [[TMP0:%.*]] ], [ [[SPEC_SELECT:%.*]], %[[SNORK_EXIT]] ]19; CHECK-NEXT: [[SPEC_SELECT]] = select i1 [[TMP2]], <vscale x 16 x float> [[TMP3]], <vscale x 16 x float> [[DOT0]]20; CHECK-NEXT: [[TMP4:%.*]] = tail call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv16f32(<vscale x 16 x float> [[SPEC_SELECT]], i64 0)21; CHECK-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv4f32(i32 0, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x float> zeroinitializer, <vscale x 4 x float> [[TMP4]])22; CHECK-NEXT: br label %[[SNORK_EXIT]]23;24 br label %125 261: ; preds = %1, %027 call void @ham() #528 br label %129}30 31; Function Attrs: alwaysinline mustprogress optsize ssp uwtable(sync)32define void @ham() #1 {33; CHECK-LABEL: define void @ham(34; CHECK-SAME: ) local_unnamed_addr #[[ATTR1:[0-9]+]] {35; CHECK-NEXT: [[SNORK_EXIT:.*:]]36; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr inttoptr (i64 48 to ptr), align 1637; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[TMP0]], 038; CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv16f32(<vscale x 16 x float> undef, i64 0)39; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], <vscale x 4 x float> zeroinitializer, <vscale x 4 x float> [[TMP2]]40; CHECK-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv4f32(i32 0, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x float> zeroinitializer, <vscale x 4 x float> [[TMP3]])41; CHECK-NEXT: ret void42;43 %1 = alloca <vscale x 16 x float>, align 1644 %2 = load i64, ptr inttoptr (i64 48 to ptr), align 845 %3 = call i64 @snork(i64 noundef %2, ptr noundef nonnull align 16 %1) #546 %4 = load <vscale x 16 x float>, ptr %1, align 1647 %5 = call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv16f32(<vscale x 16 x float> %4, i64 0)48 call void @llvm.aarch64.sme.mopa.nxv4f32(i32 0, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x float> zeroinitializer, <vscale x 4 x float> %5)49 ret void50}51 52; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)53declare <vscale x 16 x float> @llvm.vector.insert.nxv16f32.nxv4f32(<vscale x 16 x float>, <vscale x 4 x float>, i64 immarg) #254 55; Function Attrs: alwaysinline mustprogress nounwind optsize ssp uwtable(sync)56define i64 @snork(i64 noundef %0, ptr noundef nonnull align 16 %1) #3 {57; CHECK-LABEL: define noundef i64 @snork(58; CHECK-SAME: i64 noundef [[TMP0:%.*]], ptr noundef nonnull writeonly align 16 captures(none) [[TMP1:%.*]]) local_unnamed_addr #[[ATTR3:[0-9]+]] {59; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i64 [[TMP0]], 060; CHECK-NEXT: br i1 [[TMP3]], label %[[BB4:.*]], label %[[BB6:.*]]61; CHECK: [[BB4]]:62; CHECK-NEXT: [[TMP5:%.*]] = tail call <vscale x 16 x float> @llvm.vector.insert.nxv16f32.nxv4f32(<vscale x 16 x float> zeroinitializer, <vscale x 4 x float> zeroinitializer, i64 0)63; CHECK-NEXT: store <vscale x 16 x float> [[TMP5]], ptr [[TMP1]], align 1664; CHECK-NEXT: br label %[[BB6]]65; CHECK: [[BB6]]:66; CHECK-NEXT: ret i64 067;68 %3 = icmp sgt i64 %0, 069 br i1 %3, label %4, label %670 714: ; preds = %272 %5 = call <vscale x 16 x float> @llvm.vector.insert.nxv16f32.nxv4f32(<vscale x 16 x float> zeroinitializer, <vscale x 4 x float> zeroinitializer, i64 0)73 store <vscale x 16 x float> %5, ptr %1, align 1674 br label %675 766: ; preds = %4, %277 ret i64 078}79 80; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)81declare <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv16f32(<vscale x 16 x float>, i64 immarg) #282 83; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite)84declare void @llvm.aarch64.sme.mopa.nxv4f32(i32 immarg, <vscale x 4 x i1>, <vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) #485 86attributes #0 = { mustprogress optsize ssp uwtable(sync) "aarch64_new_za" "aarch64_pstate_sm_enabled" "frame-pointer"="non-leaf" "no-builtin-calloc" "no-builtin-stpcpy" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="apple-m4" }87attributes #1 = { alwaysinline mustprogress optsize ssp uwtable(sync) "aarch64_inout_za" "aarch64_pstate_sm_enabled" "frame-pointer"="non-leaf" "no-builtin-calloc" "no-builtin-stpcpy" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="apple-m4" }88attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }89attributes #3 = { alwaysinline mustprogress nounwind optsize ssp uwtable(sync) "aarch64_inout_za" "aarch64_pstate_sm_enabled" "frame-pointer"="non-leaf" "no-builtin-calloc" "no-builtin-stpcpy" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="apple-m4" }90attributes #4 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }91attributes #5 = { optsize "aarch64_inout_za" "aarch64_pstate_sm_enabled" "no-builtin-calloc" "no-builtin-stpcpy" }92