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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 32; RUN: opt -O1 -S < %s | FileCheck %s3 4define i32 @testa(i32 %mul) {5; CHECK-LABEL: define range(i32 -65536, 32768) i32 @testa(6; CHECK-SAME: i32 [[MUL:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[MUL]], 158; CHECK-NEXT: [[SPEC_SELECT_I:%.*]] = tail call i32 @llvm.smin.i32(i32 [[SHR]], i32 32767)9; CHECK-NEXT: ret i32 [[SPEC_SELECT_I]]10;11 %shr = ashr i32 %mul, 1512 %cmp4.i = icmp sgt i32 %shr, 3276713 %switch.i = icmp ult i1 %cmp4.i, true14 %spec.select.i = select i1 %switch.i, i32 %shr, i32 3276715 ret i32 %spec.select.i16}17 18define i32 @testb(i32 %mul) {19; CHECK-LABEL: define range(i32 -128, 128) i32 @testb(20; CHECK-SAME: i32 [[MUL:%.*]]) local_unnamed_addr #[[ATTR0]] {21; CHECK-NEXT: [[SHR102:%.*]] = ashr i32 [[MUL]], 722; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.smax.i32(i32 [[SHR102]], i32 -128)23; CHECK-NEXT: [[SPEC_SELECT_I:%.*]] = tail call i32 @llvm.smin.i32(i32 [[TMP1]], i32 127)24; CHECK-NEXT: ret i32 [[SPEC_SELECT_I]]25;26 %shr102 = ashr i32 %mul, 727 %cmp4.i = icmp sgt i32 %shr102, 12728 %cmp6.i = icmp slt i32 %shr102, -12829 %retval.0.i = select i1 %cmp4.i, i32 127, i32 -12830 %cleanup.dest.slot.0.i = select i1 %cmp4.i, i1 true, i1 %cmp6.i31 %switch.i = icmp ult i1 %cleanup.dest.slot.0.i, true32 %spec.select.i = select i1 %switch.i, i32 %shr102, i32 %retval.0.i33 ret i32 %spec.select.i34}35