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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -O3 -S | FileCheck %s3; RUN: opt < %s -passes="default<O3>" -S | FileCheck %s4 5; This is based on the following most basic C++ code:6;7; struct S {8; int* data;9; int x, y, z;10; };11;12; S gen(S a) {13; S b;14; b.data = a.data;15; return b;16; }17;18; void escape0(S);19;20; int* foo(S a) {21; S b = gen(a);22; escape0(b);23; return b.data;24; }25;26; int cond();27; void sync0();28; void sync1();29; void escape0(int*);30; void escape1(int*);31;32; int* bar(S a) {33; S b = gen(a);34; if(cond()) {35; sync0();36; escape0(b.data);37; } else {38; sync1();39; escape1(b.data);40; }41; return b.data;42; }43;44; There are no inttoptr casts in the original source code, nor should there be any in the optimized IR.45 46target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"47 48%0 = type { ptr, i32, i32, i32 }49 50define dso_local void @_Z3gen1S(ptr noalias sret(%0) align 8 %arg, ptr byval(%0) align 8 %arg1) {51; CHECK-LABEL: @_Z3gen1S(52; CHECK-NEXT: bb:53; CHECK-NEXT: [[I2:%.*]] = load ptr, ptr [[ARG1:%.*]], align 854; CHECK-NEXT: store ptr [[I2]], ptr [[ARG:%.*]], align 855; CHECK-NEXT: ret void56;57bb:58 %i2 = load ptr, ptr %arg1, align 859 store ptr %i2, ptr %arg, align 860 ret void61}62 63define dso_local ptr @_Z3foo1S(ptr byval(%0) align 8 %arg) {64; CHECK-LABEL: @_Z3foo1S(65; CHECK-NEXT: bb:66; CHECK-NEXT: [[I2:%.*]] = alloca [[TMP0:%.*]], align 867; CHECK-NEXT: [[I1_SROA_0_0_COPYLOAD:%.*]] = load ptr, ptr [[ARG:%.*]], align 868; CHECK-NEXT: store ptr [[I1_SROA_0_0_COPYLOAD]], ptr [[I2]], align 869; CHECK-NEXT: tail call void @_Z7escape01S(ptr nonnull byval([[TMP0]]) align 8 [[I2]])70; CHECK-NEXT: ret ptr [[I1_SROA_0_0_COPYLOAD]]71;72bb:73 %i = alloca %0, align 874 %i1 = alloca %0, align 875 %i2 = alloca %0, align 876 call void @llvm.lifetime.start.p0(ptr %i)77 call void @llvm.memcpy.p0.p0.i64(ptr align 8 %i1, ptr align 8 %arg, i64 24, i1 false)78 call void @_Z3gen1S(ptr sret(%0) align 8 %i, ptr byval(%0) align 8 %i1)79 call void @llvm.memcpy.p0.p0.i64(ptr align 8 %i2, ptr align 8 %i, i64 24, i1 false)80 call void @_Z7escape01S(ptr byval(%0) align 8 %i2)81 %i9 = load ptr, ptr %i, align 882 call void @llvm.lifetime.end.p0(ptr %i)83 ret ptr %i984}85 86declare void @llvm.lifetime.start.p0(ptr nocapture)87 88declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg)89 90declare dso_local void @_Z7escape01S(ptr byval(%0) align 8)91 92declare void @llvm.lifetime.end.p0(ptr nocapture)93 94define dso_local ptr @_Z3bar1S(ptr byval(%0) align 8 %arg) {95; CHECK-LABEL: @_Z3bar1S(96; CHECK-NEXT: bb:97; CHECK-NEXT: [[I1_SROA_0_0_COPYLOAD:%.*]] = load ptr, ptr [[ARG:%.*]], align 898; CHECK-NEXT: [[I5:%.*]] = tail call i32 @_Z4condv()99; CHECK-NEXT: [[I6_NOT:%.*]] = icmp eq i32 [[I5]], 0100; CHECK-NEXT: br i1 [[I6_NOT]], label [[BB10:%.*]], label [[BB7:%.*]]101; CHECK: bb7:102; CHECK-NEXT: tail call void @_Z5sync0v()103; CHECK-NEXT: tail call void @_Z7escape0Pi(ptr [[I1_SROA_0_0_COPYLOAD]])104; CHECK-NEXT: br label [[BB13:%.*]]105; CHECK: bb10:106; CHECK-NEXT: tail call void @_Z5sync1v()107; CHECK-NEXT: tail call void @_Z7escape1Pi(ptr [[I1_SROA_0_0_COPYLOAD]])108; CHECK-NEXT: br label [[BB13]]109; CHECK: bb13:110; CHECK-NEXT: ret ptr [[I1_SROA_0_0_COPYLOAD]]111;112bb:113 %i = alloca %0, align 8114 %i1 = alloca %0, align 8115 call void @llvm.lifetime.start.p0(ptr %i)116 call void @llvm.memcpy.p0.p0.i64(ptr align 8 %i1, ptr align 8 %arg, i64 24, i1 false)117 call void @_Z3gen1S(ptr sret(%0) align 8 %i, ptr byval(%0) align 8 %i1)118 %i5 = call i32 @_Z4condv()119 %i6 = icmp ne i32 %i5, 0120 br i1 %i6, label %bb7, label %bb10121 122bb7:123 call void @_Z5sync0v()124 %i9 = load ptr, ptr %i, align 8125 call void @_Z7escape0Pi(ptr %i9)126 br label %bb13127 128bb10:129 call void @_Z5sync1v()130 %i12 = load ptr, ptr %i, align 8131 call void @_Z7escape1Pi(ptr %i12)132 br label %bb13133 134bb13:135 %i15 = load ptr, ptr %i, align 8136 call void @llvm.lifetime.end.p0(ptr %i)137 ret ptr %i15138}139 140declare dso_local i32 @_Z4condv()141declare dso_local void @_Z5sync0v()142declare dso_local void @_Z7escape0Pi(ptr)143declare dso_local void @_Z5sync1v()144declare dso_local void @_Z7escape1Pi(ptr)145