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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -O3 -S < %s | FileCheck %s3 4;; This tests lowering of the implementations of table-based ctz5;; algorithm to the llvm.cttz instruction in the -O3 case.6 7;; C producer:8;; int ctz1 (unsigned x)9;; {10;; static const char table[32] =11;; {12;; 0, 1, 28, 2, 29, 14, 24, 3, 30, 22, 20, 15, 25, 17, 4, 8,13;; 31, 27, 13, 23, 21, 19, 16, 7, 26, 12, 18, 6, 11, 5, 10, 914;; };15;; return table[((unsigned)((x & -x) * 0x077CB531U)) >> 27];16;; }17;; Compiled as: clang -O3 test.c -S -emit-llvm -Xclang -disable-llvm-optzns18 19@ctz1.table = internal constant [32 x i8] c"\00\01\1C\02\1D\0E\18\03\1E\16\14\0F\19\11\04\08\1F\1B\0D\17\15\13\10\07\1A\0C\12\06\0B\05\0A\09", align 1620 21define i32 @ctz(i32 noundef %x) {22; CHECK-LABEL: define range(i32 0, 32) i32 @ctz(23; CHECK-SAME: i32 noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {24; CHECK-NEXT: [[ENTRY:.*:]]25; CHECK-NEXT: [[TMP0:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)26; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X]], 027; CHECK-NEXT: [[CONV:%.*]] = select i1 [[TMP1]], i32 0, i32 [[TMP0]]28; CHECK-NEXT: ret i32 [[CONV]]29;30entry:31 %x.addr = alloca i32, align 432 store i32 %x, ptr %x.addr, align 433 %0 = load i32, ptr %x.addr, align 434 %1 = load i32, ptr %x.addr, align 435 %sub = sub i32 0, %136 %and = and i32 %0, %sub37 %mul = mul i32 %and, 12561336138 %shr = lshr i32 %mul, 2739 %idxprom = zext i32 %shr to i6440 %arrayidx = getelementptr inbounds [32 x i8], ptr @ctz1.table, i64 0, i64 %idxprom41 %2 = load i8, ptr %arrayidx, align 142 %conv = sext i8 %2 to i3243 ret i32 %conv44}45 46define i32 @ctz_nonarraygep(i32 noundef %x) {47; CHECK-LABEL: define range(i32 0, 32) i32 @ctz_nonarraygep(48; CHECK-SAME: i32 noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {49; CHECK-NEXT: [[ENTRY:.*:]]50; CHECK-NEXT: [[TMP0:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)51; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X]], 052; CHECK-NEXT: [[CONV:%.*]] = select i1 [[TMP1]], i32 0, i32 [[TMP0]]53; CHECK-NEXT: ret i32 [[CONV]]54;55entry:56 %x.addr = alloca i32, align 457 store i32 %x, ptr %x.addr, align 458 %0 = load i32, ptr %x.addr, align 459 %1 = load i32, ptr %x.addr, align 460 %sub = sub i32 0, %161 %and = and i32 %0, %sub62 %mul = mul i32 %and, 12561336163 %shr = lshr i32 %mul, 2764 %idxprom = zext i32 %shr to i6465 %arrayidx = getelementptr inbounds i8, ptr @ctz1.table, i64 %idxprom66 %2 = load i8, ptr %arrayidx, align 167 %conv = sext i8 %2 to i3268 ret i32 %conv69}70