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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -O1 -S < %s | FileCheck %s3; RUN: opt -O2 -S < %s | FileCheck %s4; RUN: opt -O3 -S < %s | FileCheck %s5 6target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"7target triple = "x86_64-unknown-linux-gnu"8 9; int two_shifts_by_sext(int val, char len) {10; return (val << len) >> len;11; }12;13; int two_shifts_by_same_sext(int val, char len) {14; int wide_len = len;15; return (val << wide_len) >> wide_len;16; }17;18; void use_int32(int);19; int two_shifts_by_sext_with_extra_use(int val, char len) {20; use_int32(len);21; return (val << len) >> len;22; }23;24; int two_shifts_by_same_sext_with_extra_use(int val, char len) {25; int wide_len = len;26; use_int32(wide_len);27; return (val << wide_len) >> wide_len;28; }29 30define i32 @two_shifts_by_sext(i32 %val, i8 signext %len) {31; CHECK-LABEL: @two_shifts_by_sext(32; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[LEN:%.*]] to i3233; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[VAL:%.*]], [[CONV]]34; CHECK-NEXT: [[SHR:%.*]] = ashr exact i32 [[SHL]], [[CONV]]35; CHECK-NEXT: ret i32 [[SHR]]36;37 %val.addr = alloca i32, align 438 %len.addr = alloca i8, align 139 store i32 %val, ptr %val.addr, align 440 store i8 %len, ptr %len.addr, align 141 %val.reloaded = load i32, ptr %val.addr, align 442 %len.reloaded.0 = load i8, ptr %len.addr, align 143 %conv = sext i8 %len.reloaded.0 to i3244 %shl = shl i32 %val.reloaded, %conv45 %len.reloaded.1 = load i8, ptr %len.addr, align 146 %conv1 = sext i8 %len.reloaded.1 to i3247 %shr = ashr i32 %shl, %conv148 ret i32 %shr49}50 51define i32 @two_shifts_by_same_sext(i32 %val, i8 signext %len) {52; CHECK-LABEL: @two_shifts_by_same_sext(53; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[LEN:%.*]] to i3254; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[VAL:%.*]], [[CONV]]55; CHECK-NEXT: [[SHR:%.*]] = ashr exact i32 [[SHL]], [[CONV]]56; CHECK-NEXT: ret i32 [[SHR]]57;58 %val.addr = alloca i32, align 459 %len.addr = alloca i8, align 160 %wide_len = alloca i32, align 461 store i32 %val, ptr %val.addr, align 462 store i8 %len, ptr %len.addr, align 163 %len.reloaded.0 = load i8, ptr %len.addr, align 164 %conv = sext i8 %len.reloaded.0 to i3265 store i32 %conv, ptr %wide_len, align 466 %val.reloaded = load i32, ptr %val.addr, align 467 %len.reloaded.1 = load i32, ptr %wide_len, align 468 %shl = shl i32 %val.reloaded, %len.reloaded.169 %len.reloaded.2 = load i32, ptr %wide_len, align 470 %shr = ashr i32 %shl, %len.reloaded.271 ret i32 %shr72}73 74define i32 @two_shifts_by_sext_with_extra_use(i32 %val, i8 signext %len) {75; CHECK-LABEL: @two_shifts_by_sext_with_extra_use(76; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[LEN:%.*]] to i3277; CHECK-NEXT: tail call void @use_int32(i32 [[CONV]])78; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[VAL:%.*]], [[CONV]]79; CHECK-NEXT: [[SHR:%.*]] = ashr exact i32 [[SHL]], [[CONV]]80; CHECK-NEXT: ret i32 [[SHR]]81;82 %val.addr = alloca i32, align 483 %len.addr = alloca i8, align 184 store i32 %val, ptr %val.addr, align 485 store i8 %len, ptr %len.addr, align 186 %len.reloaded.0 = load i8, ptr %len.addr, align 187 %conv = sext i8 %len.reloaded.0 to i3288 call void @use_int32(i32 %conv)89 %val.reloaded = load i32, ptr %val.addr, align 490 %len.reloaded.1 = load i8, ptr %len.addr, align 191 %conv1 = sext i8 %len.reloaded.1 to i3292 %shl = shl i32 %val.reloaded, %conv193 %len.reloaded.2 = load i8, ptr %len.addr, align 194 %conv2 = sext i8 %len.reloaded.2 to i3295 %shr = ashr i32 %shl, %conv296 ret i32 %shr97}98 99declare void @use_int32(i32)100 101define i32 @two_shifts_by_same_sext_with_extra_use(i32 %val, i8 signext %len) {102; CHECK-LABEL: @two_shifts_by_same_sext_with_extra_use(103; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[LEN:%.*]] to i32104; CHECK-NEXT: tail call void @use_int32(i32 [[CONV]])105; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[VAL:%.*]], [[CONV]]106; CHECK-NEXT: [[SHR:%.*]] = ashr exact i32 [[SHL]], [[CONV]]107; CHECK-NEXT: ret i32 [[SHR]]108;109 %val.addr = alloca i32, align 4110 %len.addr = alloca i8, align 1111 %wide_len = alloca i32, align 4112 store i32 %val, ptr %val.addr, align 4113 store i8 %len, ptr %len.addr, align 1114 %len.reloaded.0 = load i8, ptr %len.addr, align 1115 %conv = sext i8 %len.reloaded.0 to i32116 store i32 %conv, ptr %wide_len, align 4117 %val.reloaded = load i32, ptr %wide_len, align 4118 call void @use_int32(i32 %val.reloaded)119 %len.reloaded.1 = load i32, ptr %val.addr, align 4120 %len.reloaded.2 = load i32, ptr %wide_len, align 4121 %shl = shl i32 %len.reloaded.1, %len.reloaded.2122 %wide_len.reloaded = load i32, ptr %wide_len, align 4123 %shr = ashr i32 %shl, %wide_len.reloaded124 ret i32 %shr125}126