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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -mtriple=riscv64 -passes=pre-isel-intrinsic-lowering -S -o - %s | FileCheck %s3 4define void @memset_pattern_i128_1(ptr %a, i128 %value) nounwind {5; CHECK-LABEL: define void @memset_pattern_i128_1(6; CHECK-SAME: ptr [[A:%.*]], i128 [[VALUE:%.*]]) #[[ATTR0:[0-9]+]] {7; CHECK-NEXT: br i1 false, label %[[SPLIT:.*]], label %[[LOADSTORELOOP:.*]]8; CHECK: [[LOADSTORELOOP]]:9; CHECK-NEXT: [[TMP2:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP3:%.*]], %[[LOADSTORELOOP]] ]10; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i128, ptr [[A]], i64 [[TMP2]]11; CHECK-NEXT: store i128 [[VALUE]], ptr [[TMP1]], align 112; CHECK-NEXT: [[TMP3]] = add i64 [[TMP2]], 113; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 114; CHECK-NEXT: br i1 [[TMP4]], label %[[LOADSTORELOOP]], label %[[SPLIT]]15; CHECK: [[SPLIT]]:16; CHECK-NEXT: ret void17;18 tail call void @llvm.experimental.memset.pattern(ptr %a, i128 %value, i64 1, i1 0)19 ret void20}21 22define void @memset_pattern_i128_16(ptr %a, i128 %value) nounwind {23; CHECK-LABEL: define void @memset_pattern_i128_16(24; CHECK-SAME: ptr [[A:%.*]], i128 [[VALUE:%.*]]) #[[ATTR0]] {25; CHECK-NEXT: br i1 false, label %[[SPLIT:.*]], label %[[LOADSTORELOOP:.*]]26; CHECK: [[LOADSTORELOOP]]:27; CHECK-NEXT: [[TMP2:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP3:%.*]], %[[LOADSTORELOOP]] ]28; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i128, ptr [[A]], i64 [[TMP2]]29; CHECK-NEXT: store i128 [[VALUE]], ptr [[TMP1]], align 130; CHECK-NEXT: [[TMP3]] = add i64 [[TMP2]], 131; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 1632; CHECK-NEXT: br i1 [[TMP4]], label %[[LOADSTORELOOP]], label %[[SPLIT]]33; CHECK: [[SPLIT]]:34; CHECK-NEXT: ret void35;36 tail call void @llvm.experimental.memset.pattern(ptr %a, i128 %value, i64 16, i1 0)37 ret void38}39 40define void @memset_pattern_i127_x(ptr %a, i127 %value, i64 %x) nounwind {41; CHECK-LABEL: define void @memset_pattern_i127_x(42; CHECK-SAME: ptr [[A:%.*]], i127 [[VALUE:%.*]], i64 [[X:%.*]]) #[[ATTR0]] {43; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 0, [[X]]44; CHECK-NEXT: br i1 [[TMP1]], label %[[SPLIT:.*]], label %[[LOADSTORELOOP:.*]]45; CHECK: [[LOADSTORELOOP]]:46; CHECK-NEXT: [[TMP3:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP4:%.*]], %[[LOADSTORELOOP]] ]47; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i127, ptr [[A]], i64 [[TMP3]]48; CHECK-NEXT: store i127 [[VALUE]], ptr [[TMP2]], align 149; CHECK-NEXT: [[TMP4]] = add i64 [[TMP3]], 150; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i64 [[TMP4]], [[X]]51; CHECK-NEXT: br i1 [[TMP5]], label %[[LOADSTORELOOP]], label %[[SPLIT]]52; CHECK: [[SPLIT]]:53; CHECK-NEXT: ret void54;55 tail call void @llvm.experimental.memset.pattern(ptr %a, i127 %value, i64 %x, i1 0)56 ret void57}58 59define void @memset_pattern_i128_x(ptr %a, i128 %value, i64 %x) nounwind {60; CHECK-LABEL: define void @memset_pattern_i128_x(61; CHECK-SAME: ptr [[A:%.*]], i128 [[VALUE:%.*]], i64 [[X:%.*]]) #[[ATTR0]] {62; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 0, [[X]]63; CHECK-NEXT: br i1 [[TMP1]], label %[[SPLIT:.*]], label %[[LOADSTORELOOP:.*]]64; CHECK: [[LOADSTORELOOP]]:65; CHECK-NEXT: [[TMP2:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP6:%.*]], %[[LOADSTORELOOP]] ]66; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i128, ptr [[A]], i64 [[TMP2]]67; CHECK-NEXT: store i128 [[VALUE]], ptr [[TMP4]], align 168; CHECK-NEXT: [[TMP6]] = add i64 [[TMP2]], 169; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i64 [[TMP6]], [[X]]70; CHECK-NEXT: br i1 [[TMP5]], label %[[LOADSTORELOOP]], label %[[SPLIT]]71; CHECK: [[SPLIT]]:72; CHECK-NEXT: ret void73;74 tail call void @llvm.experimental.memset.pattern(ptr %a, i128 %value, i64 %x, i1 0)75 ret void76}77 78define void @memset_pattern_i256_x(ptr %a, i256 %value, i64 %x) nounwind {79; CHECK-LABEL: define void @memset_pattern_i256_x(80; CHECK-SAME: ptr [[A:%.*]], i256 [[VALUE:%.*]], i64 [[X:%.*]]) #[[ATTR0]] {81; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 0, [[X]]82; CHECK-NEXT: br i1 [[TMP1]], label %[[SPLIT:.*]], label %[[LOADSTORELOOP:.*]]83; CHECK: [[LOADSTORELOOP]]:84; CHECK-NEXT: [[TMP2:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP6:%.*]], %[[LOADSTORELOOP]] ]85; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i256, ptr [[A]], i64 [[TMP2]]86; CHECK-NEXT: store i256 [[VALUE]], ptr [[TMP4]], align 187; CHECK-NEXT: [[TMP6]] = add i64 [[TMP2]], 188; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i64 [[TMP6]], [[X]]89; CHECK-NEXT: br i1 [[TMP5]], label %[[LOADSTORELOOP]], label %[[SPLIT]]90; CHECK: [[SPLIT]]:91; CHECK-NEXT: ret void92;93 tail call void @llvm.experimental.memset.pattern(ptr %a, i256 %value, i64 %x, i1 0)94 ret void95}96 97; The common alignment of the allocation of the pattern stride (its allocation98; size) and the destination pointer should be used.99define void @memset_pattern_i15_x_alignment(ptr %a, i15 %value, i64 %x) nounwind {100; CHECK-LABEL: define void @memset_pattern_i15_x_alignment(101; CHECK-SAME: ptr [[A:%.*]], i15 [[VALUE:%.*]], i64 [[X:%.*]]) #[[ATTR0]] {102; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 0, [[X]]103; CHECK-NEXT: br i1 [[TMP1]], label %[[SPLIT:.*]], label %[[LOADSTORELOOP:.*]]104; CHECK: [[LOADSTORELOOP]]:105; CHECK-NEXT: [[TMP3:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP4:%.*]], %[[LOADSTORELOOP]] ]106; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i15, ptr [[A]], i64 [[TMP3]]107; CHECK-NEXT: store i15 [[VALUE]], ptr [[TMP2]], align 1108; CHECK-NEXT: [[TMP4]] = add i64 [[TMP3]], 1109; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i64 [[TMP4]], [[X]]110; CHECK-NEXT: br i1 [[TMP5]], label %[[LOADSTORELOOP]], label %[[SPLIT]]111; CHECK: [[SPLIT]]:112; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 0, [[X]]113; CHECK-NEXT: br i1 [[TMP7]], label %[[SPLIT1:.*]], label %[[LOADSTORELOOP2:.*]]114; CHECK: [[LOADSTORELOOP2]]:115; CHECK-NEXT: [[TMP11:%.*]] = phi i64 [ 0, %[[SPLIT]] ], [ [[TMP9:%.*]], %[[LOADSTORELOOP2]] ]116; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i15, ptr [[A]], i64 [[TMP11]]117; CHECK-NEXT: store i15 [[VALUE]], ptr [[TMP8]], align 2118; CHECK-NEXT: [[TMP9]] = add i64 [[TMP11]], 1119; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i64 [[TMP9]], [[X]]120; CHECK-NEXT: br i1 [[TMP10]], label %[[LOADSTORELOOP2]], label %[[SPLIT1]]121; CHECK: [[SPLIT1]]:122; CHECK-NEXT: ret void123;124 call void @llvm.experimental.memset.pattern(ptr align 1 %a, i15 %value, i64 %x, i1 0)125 call void @llvm.experimental.memset.pattern(ptr align 2 %a, i15 %value, i64 %x, i1 0)126 ret void127}128