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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt < %s -passes=ipsccp -S | FileCheck %s3 4; x = [100, 301)5define internal i1 @f.trunc(i32 %x) {6; CHECK-LABEL: define internal i1 @f.trunc(7; CHECK-SAME: i32 range(i32 100, 301) [[X:%.*]]) {8; CHECK-NEXT: [[T_1:%.*]] = trunc nuw nsw i32 [[X]] to i169; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i16 [[T_1]], 29910; CHECK-NEXT: [[C_4:%.*]] = icmp slt i16 [[T_1]], 10111; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]12; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i1 [[RES_1]], false13; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]14; CHECK-NEXT: [[T_2:%.*]] = trunc i32 [[X]] to i815; CHECK-NEXT: [[C_5:%.*]] = icmp sgt i8 [[T_2]], 4416; CHECK-NEXT: [[C_6:%.*]] = icmp sgt i8 [[T_2]], 4317; CHECK-NEXT: [[C_7:%.*]] = icmp slt i8 [[T_2]], 10018; CHECK-NEXT: [[C_8:%.*]] = icmp slt i8 [[T_2]], 10119; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]20; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]21; CHECK-NEXT: [[RES_6:%.*]] = add i1 [[RES_5]], [[C_7]]22; CHECK-NEXT: [[RES_7:%.*]] = add i1 [[RES_6]], [[C_8]]23; CHECK-NEXT: ret i1 [[RES_7]]24;25 26 %t.1 = trunc i32 %x to i1627 %c.1 = icmp sgt i16 %t.1, 30028 %c.2 = icmp sgt i16 %t.1, 29929 %c.3 = icmp slt i16 %t.1, 10030 %c.4 = icmp slt i16 %t.1, 10131 %res.1 = add i1 %c.1, %c.232 %res.2 = add i1 %res.1, %c.333 %res.3 = add i1 %res.2, %c.434 %t.2 = trunc i32 %x to i835 %c.5 = icmp sgt i8 %t.2, 30036 %c.6 = icmp sgt i8 %t.2, 29937 %c.7 = icmp slt i8 %t.2, 10038 %c.8 = icmp slt i8 %t.2, 10139 %res.4 = add i1 %res.3, %c.540 %res.5 = add i1 %res.4, %c.641 %res.6 = add i1 %res.5, %c.742 %res.7 = add i1 %res.6, %c.843 ret i1 %res.744}45 46define i1 @caller1() {47; CHECK-LABEL: define i1 @caller1() {48; CHECK-NEXT: [[CALL_1:%.*]] = tail call i1 @f.trunc(i32 100)49; CHECK-NEXT: [[CALL_2:%.*]] = tail call i1 @f.trunc(i32 300)50; CHECK-NEXT: [[RES:%.*]] = and i1 [[CALL_1]], [[CALL_2]]51; CHECK-NEXT: ret i1 [[RES]]52;53 %call.1 = tail call i1 @f.trunc(i32 100)54 %call.2 = tail call i1 @f.trunc(i32 300)55 %res = and i1 %call.1, %call.256 ret i1 %res57}58 59 60; x = [100, 301)61define internal i1 @f.zext(i32 %x, i32 %y) {62; CHECK-LABEL: define internal i1 @f.zext(63; CHECK-SAME: i32 range(i32 100, 301) [[X:%.*]], i32 range(i32 -120, 901) [[Y:%.*]]) {64; CHECK-NEXT: [[T_1:%.*]] = zext nneg i32 [[X]] to i6465; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i64 [[T_1]], 29966; CHECK-NEXT: [[C_4:%.*]] = icmp slt i64 [[T_1]], 10167; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]68; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i1 [[RES_1]], false69; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]70; CHECK-NEXT: [[T_2:%.*]] = zext i32 [[Y]] to i6471; CHECK-NEXT: [[C_5:%.*]] = icmp sgt i64 [[T_2]], 30072; CHECK-NEXT: [[C_6:%.*]] = icmp sgt i64 [[T_2]], 29973; CHECK-NEXT: [[C_8:%.*]] = icmp slt i64 [[T_2]], 174; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]75; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]76; CHECK-NEXT: [[RES_6:%.*]] = add nuw nsw i1 [[RES_5]], false77; CHECK-NEXT: [[RES_7:%.*]] = add i1 [[RES_6]], [[C_8]]78; CHECK-NEXT: ret i1 [[RES_7]]79;80 81 %t.1 = zext i32 %x to i6482 %c.1 = icmp sgt i64 %t.1, 30083 %c.2 = icmp sgt i64 %t.1, 29984 %c.3 = icmp slt i64 %t.1, 10085 %c.4 = icmp slt i64 %t.1, 10186 %res.1 = add i1 %c.1, %c.287 %res.2 = add i1 %res.1, %c.388 %res.3 = add i1 %res.2, %c.489 %t.2 = zext i32 %y to i6490 %c.5 = icmp sgt i64 %t.2, 30091 %c.6 = icmp sgt i64 %t.2, 29992 %c.7 = icmp slt i64 %t.2, 093 %c.8 = icmp slt i64 %t.2, 194 %res.4 = add i1 %res.3, %c.595 %res.5 = add i1 %res.4, %c.696 %res.6 = add i1 %res.5, %c.797 %res.7 = add i1 %res.6, %c.898 ret i1 %res.799}100 101define i1 @caller.zext() {102; CHECK-LABEL: define i1 @caller.zext() {103; CHECK-NEXT: [[CALL_1:%.*]] = tail call i1 @f.zext(i32 100, i32 -120)104; CHECK-NEXT: [[CALL_2:%.*]] = tail call i1 @f.zext(i32 300, i32 900)105; CHECK-NEXT: [[RES:%.*]] = and i1 [[CALL_1]], [[CALL_2]]106; CHECK-NEXT: ret i1 [[RES]]107;108 %call.1 = tail call i1 @f.zext(i32 100, i32 -120)109 %call.2 = tail call i1 @f.zext(i32 300, i32 900)110 %res = and i1 %call.1, %call.2111 ret i1 %res112}113 114; x = [100, 301)115define internal i1 @f.sext(i32 %x, i32 %y) {116; CHECK-LABEL: define internal i1 @f.sext(117; CHECK-SAME: i32 range(i32 100, 301) [[X:%.*]], i32 range(i32 -120, 901) [[Y:%.*]]) {118; CHECK-NEXT: [[T_1:%.*]] = zext nneg i32 [[X]] to i64119; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i64 [[T_1]], 299120; CHECK-NEXT: [[C_4:%.*]] = icmp slt i64 [[T_1]], 101121; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]122; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i1 [[RES_1]], false123; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]124; CHECK-NEXT: [[T_2:%.*]] = sext i32 [[Y]] to i64125; CHECK-NEXT: [[C_6:%.*]] = icmp sgt i64 [[T_2]], 899126; CHECK-NEXT: [[C_8:%.*]] = icmp slt i64 [[T_2]], -119127; CHECK-NEXT: [[RES_4:%.*]] = add nuw nsw i1 [[RES_3]], false128; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]129; CHECK-NEXT: [[RES_6:%.*]] = add nuw nsw i1 [[RES_5]], false130; CHECK-NEXT: [[RES_7:%.*]] = add i1 [[RES_6]], [[C_8]]131; CHECK-NEXT: ret i1 [[RES_7]]132;133 %t.1 = sext i32 %x to i64134 %c.1 = icmp sgt i64 %t.1, 300135 %c.2 = icmp sgt i64 %t.1, 299136 %c.3 = icmp slt i64 %t.1, 100137 %c.4 = icmp slt i64 %t.1, 101138 %res.1 = add i1 %c.1, %c.2139 %res.2 = add i1 %res.1, %c.3140 %res.3 = add i1 %res.2, %c.4141 %t.2 = sext i32 %y to i64142 %c.5 = icmp sgt i64 %t.2, 900143 %c.6 = icmp sgt i64 %t.2, 899144 %c.7 = icmp slt i64 %t.2, -120145 %c.8 = icmp slt i64 %t.2, -119146 %res.4 = add i1 %res.3, %c.5147 %res.5 = add i1 %res.4, %c.6148 %res.6 = add i1 %res.5, %c.7149 %res.7 = add i1 %res.6, %c.8150 ret i1 %res.7151}152 153define i1 @caller.sext() {154; CHECK-LABEL: define i1 @caller.sext() {155; CHECK-NEXT: [[CALL_1:%.*]] = tail call i1 @f.sext(i32 100, i32 -120)156; CHECK-NEXT: [[CALL_2:%.*]] = tail call i1 @f.sext(i32 300, i32 900)157; CHECK-NEXT: [[RES:%.*]] = and i1 [[CALL_1]], [[CALL_2]]158; CHECK-NEXT: ret i1 [[RES]]159;160 %call.1 = tail call i1 @f.sext(i32 100, i32 -120)161 %call.2 = tail call i1 @f.sext(i32 300, i32 900)162 %res = and i1 %call.1, %call.2163 ret i1 %res164}165 166; There's nothing we can do besides going to the full range or overdefined.167define internal i1 @f.fptosi(i32 %x) {168; CHECK-LABEL: define internal i1 @f.fptosi(169; CHECK-SAME: i32 range(i32 100, 301) [[X:%.*]]) {170; CHECK-NEXT: [[TO_DOUBLE:%.*]] = uitofp nneg i32 [[X]] to double171; CHECK-NEXT: [[ADD:%.*]] = fadd double 0.000000e+00, [[TO_DOUBLE]]172; CHECK-NEXT: [[TO_I32:%.*]] = fptosi double [[ADD]] to i32173; CHECK-NEXT: [[C_1:%.*]] = icmp sgt i32 [[TO_I32]], 300174; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i32 [[TO_I32]], 299175; CHECK-NEXT: [[C_3:%.*]] = icmp slt i32 [[TO_I32]], 100176; CHECK-NEXT: [[C_4:%.*]] = icmp slt i32 [[TO_I32]], 101177; CHECK-NEXT: [[RES_1:%.*]] = add i1 [[C_1]], [[C_2]]178; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], [[C_3]]179; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]180; CHECK-NEXT: ret i1 [[RES_3]]181;182 %to.double = sitofp i32 %x to double183 %add = fadd double 0.000000e+00, %to.double184 %to.i32 = fptosi double %add to i32185 %c.1 = icmp sgt i32 %to.i32, 300186 %c.2 = icmp sgt i32 %to.i32, 299187 %c.3 = icmp slt i32 %to.i32, 100188 %c.4 = icmp slt i32 %to.i32, 101189 %res.1 = add i1 %c.1, %c.2190 %res.2 = add i1 %res.1, %c.3191 %res.3 = add i1 %res.2, %c.4192 ret i1 %res.3193}194 195define i1 @caller.fptosi() {196; CHECK-LABEL: define i1 @caller.fptosi() {197; CHECK-NEXT: [[CALL_1:%.*]] = tail call i1 @f.fptosi(i32 100)198; CHECK-NEXT: [[CALL_2:%.*]] = tail call i1 @f.fptosi(i32 300)199; CHECK-NEXT: [[RES:%.*]] = and i1 [[CALL_1]], [[CALL_2]]200; CHECK-NEXT: ret i1 [[RES]]201;202 %call.1 = tail call i1 @f.fptosi(i32 100)203 %call.2 = tail call i1 @f.fptosi(i32 300)204 %res = and i1 %call.1, %call.2205 ret i1 %res206}207 208; There's nothing we can do besides going to the full range or overdefined.209define internal i1 @f.fpext(i16 %x) {210; CHECK-LABEL: define internal i1 @f.fpext(211; CHECK-SAME: i16 range(i16 100, 301) [[X:%.*]]) {212; CHECK-NEXT: [[TO_FLOAT:%.*]] = uitofp nneg i16 [[X]] to float213; CHECK-NEXT: [[TO_DOUBLE:%.*]] = fpext float [[TO_FLOAT]] to double214; CHECK-NEXT: [[TO_I64:%.*]] = fptoui float [[TO_FLOAT]] to i64215; CHECK-NEXT: [[C_1:%.*]] = icmp sgt i64 [[TO_I64]], 300216; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i64 [[TO_I64]], 299217; CHECK-NEXT: [[C_3:%.*]] = icmp slt i64 [[TO_I64]], 100218; CHECK-NEXT: [[C_4:%.*]] = icmp slt i64 [[TO_I64]], 101219; CHECK-NEXT: [[RES_1:%.*]] = add i1 [[C_1]], [[C_2]]220; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], [[C_3]]221; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]222; CHECK-NEXT: ret i1 [[RES_3]]223;224 %to.float = sitofp i16 %x to float225 %to.double = fpext float %to.float to double226 %to.i64= fptoui float %to.float to i64227 %c.1 = icmp sgt i64 %to.i64, 300228 %c.2 = icmp sgt i64 %to.i64, 299229 %c.3 = icmp slt i64 %to.i64, 100230 %c.4 = icmp slt i64 %to.i64, 101231 %res.1 = add i1 %c.1, %c.2232 %res.2 = add i1 %res.1, %c.3233 %res.3 = add i1 %res.2, %c.4234 ret i1 %res.3235}236 237; There's nothing we can do besides going to the full range or overdefined.238define i1 @caller.fpext() {239; CHECK-LABEL: define i1 @caller.fpext() {240; CHECK-NEXT: [[CALL_1:%.*]] = tail call i1 @f.fpext(i16 100)241; CHECK-NEXT: [[CALL_2:%.*]] = tail call i1 @f.fpext(i16 300)242; CHECK-NEXT: [[RES:%.*]] = and i1 [[CALL_1]], [[CALL_2]]243; CHECK-NEXT: ret i1 [[RES]]244;245 %call.1 = tail call i1 @f.fpext(i16 100)246 %call.2 = tail call i1 @f.fpext(i16 300)247 %res = and i1 %call.1, %call.2248 ret i1 %res249}250 251; There's nothing we can do besides going to the full range or overdefined.252define internal i1 @f.inttoptr.ptrtoint(i64 %x) {253; CHECK-LABEL: define internal i1 @f.inttoptr.ptrtoint(254; CHECK-SAME: i64 range(i64 100, 301) [[X:%.*]]) {255; CHECK-NEXT: [[TO_PTR:%.*]] = inttoptr i64 [[X]] to ptr256; CHECK-NEXT: [[TO_I64:%.*]] = ptrtoint ptr [[TO_PTR]] to i64257; CHECK-NEXT: [[C_1:%.*]] = icmp sgt i64 [[TO_I64]], 300258; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i64 [[TO_I64]], 299259; CHECK-NEXT: [[C_3:%.*]] = icmp slt i64 [[TO_I64]], 100260; CHECK-NEXT: [[C_4:%.*]] = icmp slt i64 [[TO_I64]], 101261; CHECK-NEXT: [[RES_1:%.*]] = add i1 [[C_1]], [[C_2]]262; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], [[C_3]]263; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]264; CHECK-NEXT: ret i1 [[RES_3]]265;266 %to.ptr = inttoptr i64 %x to ptr267 %to.i64 = ptrtoint ptr %to.ptr to i64268 %c.1 = icmp sgt i64 %to.i64, 300269 %c.2 = icmp sgt i64 %to.i64, 299270 %c.3 = icmp slt i64 %to.i64, 100271 %c.4 = icmp slt i64 %to.i64, 101272 %res.1 = add i1 %c.1, %c.2273 %res.2 = add i1 %res.1, %c.3274 %res.3 = add i1 %res.2, %c.4275 ret i1 %res.3276}277 278define i1 @caller.inttoptr.ptrtoint() {279; CHECK-LABEL: define i1 @caller.inttoptr.ptrtoint() {280; CHECK-NEXT: [[CALL_1:%.*]] = tail call i1 @f.inttoptr.ptrtoint(i64 100)281; CHECK-NEXT: [[CALL_2:%.*]] = tail call i1 @f.inttoptr.ptrtoint(i64 300)282; CHECK-NEXT: [[RES:%.*]] = and i1 [[CALL_1]], [[CALL_2]]283; CHECK-NEXT: ret i1 [[RES]]284;285 %call.1 = tail call i1 @f.inttoptr.ptrtoint(i64 100)286 %call.2 = tail call i1 @f.inttoptr.ptrtoint(i64 300)287 %res = and i1 %call.1, %call.2288 ret i1 %res289}290 291; Make sure we do not create constant ranges for int to fp casts.292define i1 @int_range_to_double_cast(i32 %a) {293; CHECK-LABEL: define i1 @int_range_to_double_cast(294; CHECK-SAME: i32 [[A:%.*]]) {295; CHECK-NEXT: [[R:%.*]] = and i32 [[A]], 255296; CHECK-NEXT: [[T4:%.*]] = uitofp nneg i32 [[R]] to double297; CHECK-NEXT: [[T10:%.*]] = fadd double 0.000000e+00, [[T4]]298; CHECK-NEXT: [[T11:%.*]] = fcmp olt double [[T4]], [[T10]]299; CHECK-NEXT: ret i1 [[T11]]300;301 %r = and i32 %a, 255302 %t4 = sitofp i32 %r to double303 %t10 = fadd double 0.000000e+00, %t4304 %t11 = fcmp olt double %t4, %t10305 ret i1 %t11306}307 308; Make sure we do not use ranges to propagate info from vectors.309define i16 @vector_binop_and_cast() {310; CHECK-LABEL: define i16 @vector_binop_and_cast() {311; CHECK-NEXT: entry:312; CHECK-NEXT: [[VECINIT7:%.*]] = insertelement <8 x i16> <i16 undef, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, i16 undef, i32 0313; CHECK-NEXT: [[REM:%.*]] = srem <8 x i16> splat (i16 2), [[VECINIT7]]314; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[REM]] to i128315; CHECK-NEXT: [[TMP1:%.*]] = trunc i128 [[TMP0]] to i16316; CHECK-NEXT: ret i16 [[TMP1]]317;318entry:319 %vecinit7 = insertelement <8 x i16> <i16 undef, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, i16 undef, i32 0320 %rem = srem <8 x i16> <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>, %vecinit7321 %0 = bitcast <8 x i16> %rem to i128322 %1 = trunc i128 %0 to i16323 ret i16 %1324}325 326define internal i64 @f.sext_to_zext(i32 %t) {327; CHECK-LABEL: define internal range(i64 0, 2) i64 @f.sext_to_zext(328; CHECK-SAME: i32 range(i32 0, 2) [[T:%.*]]) {329; CHECK-NEXT: [[A:%.*]] = zext nneg i32 [[T]] to i64330; CHECK-NEXT: ret i64 [[A]]331;332 %a = sext i32 %t to i64333 ret i64 %a334}335 336define i64 @caller.sext_to_zext(i32 %i) {337; CHECK-LABEL: define range(i64 0, 2) i64 @caller.sext_to_zext(338; CHECK-SAME: i32 [[I:%.*]]) {339; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[I]], 9340; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32341; CHECK-NEXT: [[T:%.*]] = call i64 @f.sext_to_zext(i32 [[CONV]])342; CHECK-NEXT: ret i64 [[T]]343;344 %cmp = icmp sle i32 %i, 9345 %conv = zext i1 %cmp to i32346 %t = call i64 @f.sext_to_zext(i32 %conv)347 ret i64 %t348}349