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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=sccp -S < %s | FileCheck %s3 4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"5 6; rdar://113242307 8declare void @use(i1)9 10define void @foo(ptr %p) nounwind {11; CHECK-LABEL: @foo(12; CHECK-NEXT: entry:13; CHECK-NEXT: br label [[WHILE_BODY_I:%.*]]14; CHECK: while.body.i:15; CHECK-NEXT: [[VWORKEXPONENT_I_033:%.*]] = phi <4 x i32> [ [[SUB_I_I:%.*]], [[WHILE_BODY_I]] ], [ splat (i32 939524096), [[ENTRY:%.*]] ]16; CHECK-NEXT: [[SUB_I_I]] = add <4 x i32> [[VWORKEXPONENT_I_033]], splat (i32 -8388608)17; CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[SUB_I_I]] to <2 x i64>18; CHECK-NEXT: store volatile <2 x i64> zeroinitializer, ptr [[P:%.*]], align 1619; CHECK-NEXT: br label [[WHILE_BODY_I]]20;21entry:22 br label %while.body.i23 24while.body.i: ; preds = %while.body.i, %entry25 %vWorkExponent.i.033 = phi <4 x i32> [ %sub.i.i, %while.body.i ], [ <i32 939524096, i32 939524096, i32 939524096, i32 939524096>, %entry ]26 %sub.i.i = add <4 x i32> %vWorkExponent.i.033, <i32 -8388608, i32 -8388608, i32 -8388608, i32 -8388608>27 %0 = bitcast <4 x i32> %sub.i.i to <2 x i64>28 %and.i119.i = and <2 x i64> %0, zeroinitializer29 store volatile <2 x i64> %and.i119.i, ptr %p30 br label %while.body.i31}32 33%union.V512 = type { <16 x float> }34 35@i8_mix = dso_local global %union.V512 zeroinitializer36declare <64 x i8> @llvm.abs.v64i8(<64 x i8>, i1 immarg)37 38; Test for PR47991.39define void @vec_cast_abs() {40; CHECK-LABEL: @vec_cast_abs(41; CHECK-NEXT: entry:42; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @i8_mix, align 6443; CHECK-NEXT: [[TMP2:%.*]] = tail call <64 x i8> @llvm.abs.v64i8(<64 x i8> [[TMP1]], i1 false)44; CHECK-NEXT: [[TMP3:%.*]] = bitcast <64 x i8> [[TMP2]] to i51245; CHECK-NEXT: [[CMP_1:%.*]] = icmp eq i512 [[TMP3]], 1246; CHECK-NEXT: call void @use(i1 [[CMP_1]])47; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i512 [[TMP3]], 50048; CHECK-NEXT: call void @use(i1 [[CMP_2]])49; CHECK-NEXT: [[TMP4:%.*]] = trunc i512 [[TMP3]] to i3250; CHECK-NEXT: [[CMP_3:%.*]] = icmp eq i32 [[TMP4]], 1251; CHECK-NEXT: call void @use(i1 [[CMP_3]])52; CHECK-NEXT: [[CMP_4:%.*]] = icmp ult i32 [[TMP4]], 50053; CHECK-NEXT: call void @use(i1 [[CMP_3]])54; CHECK-NEXT: ret void55;56entry:57 %tmp1 = load <64 x i8>, ptr @i8_mix58 %tmp2 = tail call <64 x i8> @llvm.abs.v64i8(<64 x i8> %tmp1, i1 false)59 60 %tmp3 = bitcast <64 x i8> %tmp2 to i51261 %cmp.1 = icmp eq i512 %tmp3, 1262 call void @use(i1 %cmp.1)63 %cmp.2 = icmp ult i512 %tmp3, 50064 call void @use(i1 %cmp.2)65 66 %tmp4 = trunc i512 %tmp3 to i3267 %cmp.3 = icmp eq i32 %tmp4, 1268 call void @use(i1 %cmp.3)69 %cmp.4 = icmp ult i32 %tmp4, 50070 call void @use(i1 %cmp.3)71 72 ret void73}74