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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s3 4define void @h(i16 %a, i16 %b, i16 %c, i16 %d, i16 %e, i16 %f, i16 %g, i16 %h, i16 %i, i16 %j, i16 %k, i16 %l, i16 %m, i16 %n, i16 %o) {5; CHECK-LABEL: define void @h(6; CHECK-SAME: i16 [[A:%.*]], i16 [[B:%.*]], i16 [[C:%.*]], i16 [[D:%.*]], i16 [[E:%.*]], i16 [[F:%.*]], i16 [[G:%.*]], i16 [[H:%.*]], i16 [[I:%.*]], i16 [[J:%.*]], i16 [[K:%.*]], i16 [[L:%.*]], i16 [[M:%.*]], i16 [[N:%.*]], i16 [[O:%.*]]) {7; CHECK-NEXT: entry:8; CHECK-NEXT: [[CONV9:%.*]] = zext i16 [[A]] to i329; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, ptr null, i64 1610; CHECK-NEXT: [[CONV310:%.*]] = zext i16 [[B]] to i3211; CHECK-NEXT: [[ADD4:%.*]] = or i32 [[CONV310]], [[CONV9]]12; CHECK-NEXT: [[SUB:%.*]] = or i32 [[CONV9]], [[CONV310]]13; CHECK-NEXT: [[CONV15:%.*]] = sext i16 [[C]] to i3214; CHECK-NEXT: [[SHR:%.*]] = ashr i32 0, 015; CHECK-NEXT: [[ARRAYIDX18:%.*]] = getelementptr i8, ptr null, i64 2416; CHECK-NEXT: [[CONV19:%.*]] = sext i16 [[D]] to i3217; CHECK-NEXT: [[SUB20:%.*]] = or i32 [[SHR]], [[CONV19]]18; CHECK-NEXT: [[SHR29:%.*]] = ashr i32 0, 019; CHECK-NEXT: [[ADD30:%.*]] = or i32 [[SHR29]], [[CONV15]]20; CHECK-NEXT: [[SUB39:%.*]] = or i32 [[SUB]], [[SUB20]]21; CHECK-NEXT: [[CONV40:%.*]] = trunc i32 [[SUB39]] to i1622; CHECK-NEXT: store i16 [[CONV40]], ptr [[ARRAYIDX2]], align 223; CHECK-NEXT: [[SUB44:%.*]] = or i32 [[ADD4]], [[ADD30]]24; CHECK-NEXT: [[CONV45:%.*]] = trunc i32 [[SUB44]] to i1625; CHECK-NEXT: store i16 [[CONV45]], ptr [[ARRAYIDX18]], align 226; CHECK-NEXT: [[ARRAYIDX2_1:%.*]] = getelementptr i8, ptr null, i64 1827; CHECK-NEXT: [[CONV3_112:%.*]] = zext i16 [[E]] to i3228; CHECK-NEXT: [[ADD4_1:%.*]] = or i32 [[CONV3_112]], 029; CHECK-NEXT: [[SUB_1:%.*]] = or i32 0, [[CONV3_112]]30; CHECK-NEXT: [[CONV15_1:%.*]] = sext i16 [[F]] to i3231; CHECK-NEXT: [[SHR_1:%.*]] = ashr i32 0, 032; CHECK-NEXT: [[ARRAYIDX18_1:%.*]] = getelementptr i8, ptr null, i64 2633; CHECK-NEXT: [[CONV19_1:%.*]] = sext i16 [[G]] to i3234; CHECK-NEXT: [[SUB20_1:%.*]] = or i32 [[SHR_1]], [[CONV19_1]]35; CHECK-NEXT: [[SHR29_1:%.*]] = ashr i32 0, 036; CHECK-NEXT: [[ADD30_1:%.*]] = or i32 [[SHR29_1]], [[CONV15_1]]37; CHECK-NEXT: [[SUB39_1:%.*]] = or i32 [[SUB_1]], [[SUB20_1]]38; CHECK-NEXT: [[CONV40_1:%.*]] = trunc i32 [[SUB39_1]] to i1639; CHECK-NEXT: store i16 [[CONV40_1]], ptr [[ARRAYIDX2_1]], align 240; CHECK-NEXT: [[SUB44_1:%.*]] = or i32 [[ADD4_1]], [[ADD30_1]]41; CHECK-NEXT: [[CONV45_1:%.*]] = trunc i32 [[SUB44_1]] to i1642; CHECK-NEXT: store i16 [[CONV45_1]], ptr [[ARRAYIDX18_1]], align 243; CHECK-NEXT: [[CONV_213:%.*]] = zext i16 [[H]] to i3244; CHECK-NEXT: [[ARRAYIDX2_2:%.*]] = getelementptr i8, ptr null, i64 2045; CHECK-NEXT: [[CONV3_214:%.*]] = zext i16 [[I]] to i3246; CHECK-NEXT: [[ADD4_2:%.*]] = or i32 0, [[CONV_213]]47; CHECK-NEXT: [[SUB_2:%.*]] = or i32 0, [[CONV3_214]]48; CHECK-NEXT: [[CONV15_2:%.*]] = sext i16 [[J]] to i3249; CHECK-NEXT: [[SHR_2:%.*]] = ashr i32 0, 050; CHECK-NEXT: [[ARRAYIDX18_2:%.*]] = getelementptr i8, ptr null, i64 2851; CHECK-NEXT: [[CONV19_2:%.*]] = sext i16 [[K]] to i3252; CHECK-NEXT: [[SUB20_2:%.*]] = or i32 [[SHR_2]], [[CONV19_2]]53; CHECK-NEXT: [[SHR29_2:%.*]] = ashr i32 0, 054; CHECK-NEXT: [[ADD30_2:%.*]] = or i32 [[SHR29_2]], [[CONV15_2]]55; CHECK-NEXT: [[SUB39_2:%.*]] = or i32 [[SUB_2]], [[SUB20_2]]56; CHECK-NEXT: [[CONV40_2:%.*]] = trunc i32 [[SUB39_2]] to i1657; CHECK-NEXT: store i16 [[CONV40_2]], ptr [[ARRAYIDX2_2]], align 258; CHECK-NEXT: [[SUB44_2:%.*]] = or i32 [[ADD4_2]], [[ADD30_2]]59; CHECK-NEXT: [[CONV45_2:%.*]] = trunc i32 [[SUB44_2]] to i1660; CHECK-NEXT: store i16 [[CONV45_2]], ptr [[ARRAYIDX18_2]], align 261; CHECK-NEXT: [[CONV_315:%.*]] = zext i16 [[L]] to i3262; CHECK-NEXT: [[ARRAYIDX2_3:%.*]] = getelementptr i8, ptr null, i64 2263; CHECK-NEXT: [[CONV3_316:%.*]] = zext i16 [[M]] to i3264; CHECK-NEXT: [[ADD4_3:%.*]] = or i32 0, [[CONV_315]]65; CHECK-NEXT: [[SUB_3:%.*]] = or i32 0, [[CONV3_316]]66; CHECK-NEXT: [[CONV15_3:%.*]] = sext i16 [[N]] to i3267; CHECK-NEXT: [[SHR_3:%.*]] = ashr i32 0, 068; CHECK-NEXT: [[ARRAYIDX18_3:%.*]] = getelementptr i8, ptr null, i64 3069; CHECK-NEXT: [[CONV19_3:%.*]] = sext i16 [[O]] to i3270; CHECK-NEXT: [[SUB20_3:%.*]] = or i32 [[SHR_3]], [[CONV19_3]]71; CHECK-NEXT: [[SHR29_3:%.*]] = ashr i32 0, 072; CHECK-NEXT: [[ADD30_3:%.*]] = or i32 [[SHR29_3]], [[CONV15_3]]73; CHECK-NEXT: [[SUB39_3:%.*]] = or i32 [[SUB_3]], [[SUB20_3]]74; CHECK-NEXT: [[CONV40_3:%.*]] = trunc i32 [[SUB39_3]] to i1675; CHECK-NEXT: store i16 [[CONV40_3]], ptr [[ARRAYIDX2_3]], align 276; CHECK-NEXT: [[SUB44_3:%.*]] = or i32 [[ADD4_3]], [[ADD30_3]]77; CHECK-NEXT: [[CONV45_3:%.*]] = trunc i32 [[SUB44_3]] to i1678; CHECK-NEXT: store i16 [[CONV45_3]], ptr [[ARRAYIDX18_3]], align 279; CHECK-NEXT: ret void80;81entry:82 %conv9 = zext i16 %a to i3283 %arrayidx2 = getelementptr i8, ptr null, i64 1684 %conv310 = zext i16 %b to i3285 %add4 = or i32 %conv310, %conv986 %sub = or i32 %conv9, %conv31087 %conv15 = sext i16 %c to i3288 %shr = ashr i32 0, 089 %arrayidx18 = getelementptr i8, ptr null, i64 2490 %conv19 = sext i16 %d to i3291 %sub20 = or i32 %shr, %conv1992 %shr29 = ashr i32 0, 093 %add30 = or i32 %shr29, %conv1594 %sub39 = or i32 %sub, %sub2095 %conv40 = trunc i32 %sub39 to i1696 store i16 %conv40, ptr %arrayidx2, align 297 %sub44 = or i32 %add4, %add3098 %conv45 = trunc i32 %sub44 to i1699 store i16 %conv45, ptr %arrayidx18, align 2100 %arrayidx2.1 = getelementptr i8, ptr null, i64 18101 %conv3.112 = zext i16 %e to i32102 %add4.1 = or i32 %conv3.112, 0103 %sub.1 = or i32 0, %conv3.112104 %conv15.1 = sext i16 %f to i32105 %shr.1 = ashr i32 0, 0106 %arrayidx18.1 = getelementptr i8, ptr null, i64 26107 %conv19.1 = sext i16 %g to i32108 %sub20.1 = or i32 %shr.1, %conv19.1109 %shr29.1 = ashr i32 0, 0110 %add30.1 = or i32 %shr29.1, %conv15.1111 %sub39.1 = or i32 %sub.1, %sub20.1112 %conv40.1 = trunc i32 %sub39.1 to i16113 store i16 %conv40.1, ptr %arrayidx2.1, align 2114 %sub44.1 = or i32 %add4.1, %add30.1115 %conv45.1 = trunc i32 %sub44.1 to i16116 store i16 %conv45.1, ptr %arrayidx18.1, align 2117 %conv.213 = zext i16 %h to i32118 %arrayidx2.2 = getelementptr i8, ptr null, i64 20119 %conv3.214 = zext i16 %i to i32120 %add4.2 = or i32 0, %conv.213121 %sub.2 = or i32 0, %conv3.214122 %conv15.2 = sext i16 %j to i32123 %shr.2 = ashr i32 0, 0124 %arrayidx18.2 = getelementptr i8, ptr null, i64 28125 %conv19.2 = sext i16 %k to i32126 %sub20.2 = or i32 %shr.2, %conv19.2127 %shr29.2 = ashr i32 0, 0128 %add30.2 = or i32 %shr29.2, %conv15.2129 %sub39.2 = or i32 %sub.2, %sub20.2130 %conv40.2 = trunc i32 %sub39.2 to i16131 store i16 %conv40.2, ptr %arrayidx2.2, align 2132 %sub44.2 = or i32 %add4.2, %add30.2133 %conv45.2 = trunc i32 %sub44.2 to i16134 store i16 %conv45.2, ptr %arrayidx18.2, align 2135 %conv.315 = zext i16 %l to i32136 %arrayidx2.3 = getelementptr i8, ptr null, i64 22137 %conv3.316 = zext i16 %m to i32138 %add4.3 = or i32 0, %conv.315139 %sub.3 = or i32 0, %conv3.316140 %conv15.3 = sext i16 %n to i32141 %shr.3 = ashr i32 0, 0142 %arrayidx18.3 = getelementptr i8, ptr null, i64 30143 %conv19.3 = sext i16 %o to i32144 %sub20.3 = or i32 %shr.3, %conv19.3145 %shr29.3 = ashr i32 0, 0146 %add30.3 = or i32 %shr29.3, %conv15.3147 %sub39.3 = or i32 %sub.3, %sub20.3148 %conv40.3 = trunc i32 %sub39.3 to i16149 store i16 %conv40.3, ptr %arrayidx2.3, align 2150 %sub44.3 = or i32 %add4.3, %add30.3151 %conv45.3 = trunc i32 %sub44.3 to i16152 store i16 %conv45.3, ptr %arrayidx18.3, align 2153 ret void154}155