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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S --passes=slp-vectorizer -mtriple=arm64-apple-macosx11.0.0 < %s | FileCheck %s3 4define void @test(ptr %pDst, i32 %stride, i8 %0, ptr %p1, ptr %p2, ptr %p4, ptr %p3) {5; CHECK-LABEL: define void @test(6; CHECK-SAME: ptr [[PDST:%.*]], i32 [[STRIDE:%.*]], i8 [[TMP0:%.*]], ptr [[P1:%.*]], ptr [[P2:%.*]], ptr [[P4:%.*]], ptr [[P3:%.*]]) {7; CHECK-NEXT: [[ENTRY:.*:]]8; CHECK-NEXT: [[MUL100:%.*]] = mul i32 [[STRIDE]], 99; CHECK-NEXT: [[MUL101:%.*]] = mul i32 [[STRIDE]], 710; CHECK-NEXT: [[MUL102:%.*]] = mul i32 [[STRIDE]], 511; CHECK-NEXT: [[MUL103:%.*]] = mul i32 [[STRIDE]], 312; CHECK-NEXT: [[CONV111:%.*]] = zext i8 [[TMP0]] to i3213; CHECK-NEXT: [[MUL112:%.*]] = mul i32 [[CONV111]], 1414; CHECK-NEXT: [[CONV117:%.*]] = zext i8 [[TMP0]] to i3215; CHECK-NEXT: [[MUL118:%.*]] = mul i32 [[CONV117]], 1416; CHECK-NEXT: [[CONV124:%.*]] = zext i8 [[TMP0]] to i3217; CHECK-NEXT: [[MUL125:%.*]] = mul i32 [[CONV124]], 1418; CHECK-NEXT: [[CONV131:%.*]] = zext i8 [[TMP0]] to i3219; CHECK-NEXT: [[MUL132:%.*]] = mul i32 [[CONV131]], 1420; CHECK-NEXT: [[CMP139:%.*]] = icmp uge i32 [[MUL112]], [[MUL100]]21; CHECK-NEXT: [[CMP142:%.*]] = icmp uge i32 [[MUL112]], [[MUL101]]22; CHECK-NEXT: [[ADD1441:%.*]] = or i1 [[CMP139]], [[CMP142]]23; CHECK-NEXT: [[CMP145:%.*]] = icmp uge i32 [[MUL112]], [[MUL102]]24; CHECK-NEXT: [[ADD1472:%.*]] = or i1 [[ADD1441]], [[CMP145]]25; CHECK-NEXT: [[CMP148:%.*]] = icmp uge i32 [[MUL112]], [[MUL103]]26; CHECK-NEXT: [[ADD1504:%.*]] = or i1 [[ADD1472]], [[CMP148]]27; CHECK-NEXT: [[ADD151:%.*]] = zext i1 [[ADD1504]] to i6428; CHECK-NEXT: [[ARRAYIDX156:%.*]] = getelementptr [8 x i32], ptr [[P1]], i64 0, i64 [[ADD151]]29; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX156]], align 430; CHECK-NEXT: [[CMP165:%.*]] = icmp uge i32 [[MUL118]], [[MUL101]]31; CHECK-NEXT: [[CMP171:%.*]] = icmp uge i32 [[MUL118]], [[MUL103]]32; CHECK-NEXT: [[ADD1734:%.*]] = or i1 [[CMP165]], [[CMP171]]33; CHECK-NEXT: [[ADD173:%.*]] = zext i1 [[ADD1734]] to i6434; CHECK-NEXT: [[ARRAYIDX178:%.*]] = getelementptr [8 x i32], ptr [[P2]], i64 0, i64 [[ADD173]]35; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX178]], align 436; CHECK-NEXT: [[CMP185:%.*]] = icmp uge i32 [[MUL125]], [[MUL100]]37; CHECK-NEXT: [[CMP188:%.*]] = icmp uge i32 [[MUL125]], [[MUL101]]38; CHECK-NEXT: [[ADD1905:%.*]] = or i1 [[CMP185]], [[CMP188]]39; CHECK-NEXT: [[CMP191:%.*]] = icmp uge i32 [[MUL125]], [[MUL102]]40; CHECK-NEXT: [[ADD1936:%.*]] = or i1 [[ADD1905]], [[CMP191]]41; CHECK-NEXT: [[ADD193:%.*]] = zext i1 [[ADD1936]] to i6442; CHECK-NEXT: [[ARRAYIDX201:%.*]] = getelementptr [8 x i32], ptr [[P4]], i64 0, i64 [[ADD193]]43; CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[ARRAYIDX201]], align 444; CHECK-NEXT: [[CMP208:%.*]] = icmp uge i32 [[MUL132]], [[MUL100]]45; CHECK-NEXT: [[CMP211:%.*]] = icmp uge i32 [[MUL132]], [[MUL101]]46; CHECK-NEXT: [[ADD2137:%.*]] = or i1 [[CMP208]], [[CMP211]]47; CHECK-NEXT: [[CMP214:%.*]] = icmp uge i32 [[MUL132]], [[MUL102]]48; CHECK-NEXT: [[ADD2168:%.*]] = or i1 [[ADD2137]], [[CMP214]]49; CHECK-NEXT: [[CMP217:%.*]] = icmp uge i32 [[MUL132]], [[MUL103]]50; CHECK-NEXT: [[ADD2199:%.*]] = or i1 [[ADD2168]], [[CMP217]]51; CHECK-NEXT: [[ADD219:%.*]] = zext i1 [[ADD2199]] to i6452; CHECK-NEXT: [[ARRAYIDX224:%.*]] = getelementptr [8 x i32], ptr [[P3]], i64 0, i64 [[ADD219]]53; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX224]], align 454; CHECK-NEXT: [[CONV230:%.*]] = zext i8 [[TMP0]] to i3255; CHECK-NEXT: [[MUL231:%.*]] = mul i32 [[CONV230]], 1456; CHECK-NEXT: [[CONV237:%.*]] = zext i8 [[TMP0]] to i3257; CHECK-NEXT: [[MUL238:%.*]] = mul i32 [[CONV237]], 1458; CHECK-NEXT: [[CONV244:%.*]] = zext i8 [[TMP0]] to i3259; CHECK-NEXT: [[MUL245:%.*]] = mul i32 [[CONV244]], 1460; CHECK-NEXT: [[CONV484:%.*]] = zext i8 [[TMP0]] to i3261; CHECK-NEXT: [[MUL485:%.*]] = mul i32 [[CONV484]], 1462; CHECK-NEXT: [[CMP262:%.*]] = icmp uge i32 [[MUL231]], [[MUL101]]63; CHECK-NEXT: [[CMP268:%.*]] = icmp uge i32 [[MUL231]], [[MUL103]]64; CHECK-NEXT: [[ADD1503:%.*]] = or i1 [[CMP262]], [[CMP268]]65; CHECK-NEXT: [[ADD150:%.*]] = zext i1 [[ADD1503]] to i6466; CHECK-NEXT: [[ARRAYIDX155:%.*]] = getelementptr [8 x i32], ptr [[P1]], i64 0, i64 [[ADD150]]67; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[ARRAYIDX155]], align 468; CHECK-NEXT: [[OR951:%.*]] = or i32 [[TMP13]], [[TMP18]]69; CHECK-NEXT: [[CMP282:%.*]] = icmp uge i32 [[MUL238]], [[MUL100]]70; CHECK-NEXT: [[CMP285:%.*]] = icmp uge i32 [[MUL238]], [[MUL101]]71; CHECK-NEXT: [[ADD28711:%.*]] = or i1 [[CMP282]], [[CMP285]]72; CHECK-NEXT: [[CMP288:%.*]] = icmp uge i32 [[MUL238]], [[MUL102]]73; CHECK-NEXT: [[ADD29012:%.*]] = or i1 [[ADD28711]], [[CMP288]]74; CHECK-NEXT: [[CMP291:%.*]] = icmp uge i32 [[MUL238]], [[MUL103]]75; CHECK-NEXT: [[ADD29313:%.*]] = or i1 [[ADD29012]], [[CMP291]]76; CHECK-NEXT: [[ADD293:%.*]] = zext i1 [[ADD29313]] to i6477; CHECK-NEXT: [[ARRAYIDX298:%.*]] = getelementptr [8 x i32], ptr [[P2]], i64 0, i64 [[ADD293]]78; CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[ARRAYIDX298]], align 479; CHECK-NEXT: [[OR301952:%.*]] = or i32 [[TMP21]], [[TMP12]]80; CHECK-NEXT: [[CMP310:%.*]] = icmp uge i32 [[MUL245]], [[MUL101]]81; CHECK-NEXT: [[CMP316:%.*]] = icmp uge i32 [[MUL245]], [[MUL103]]82; CHECK-NEXT: [[ADD31814:%.*]] = or i1 [[CMP310]], [[CMP316]]83; CHECK-NEXT: [[ADD318:%.*]] = zext i1 [[ADD31814]] to i6484; CHECK-NEXT: [[ARRAYIDX323:%.*]] = getelementptr [8 x i32], ptr [[P4]], i64 0, i64 [[ADD318]]85; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[ARRAYIDX323]], align 486; CHECK-NEXT: [[OR326953:%.*]] = or i32 [[TMP14]], [[TMP19]]87; CHECK-NEXT: [[CMP332:%.*]] = icmp uge i32 [[MUL485]], [[MUL100]]88; CHECK-NEXT: [[CMP335:%.*]] = icmp uge i32 [[MUL485]], [[MUL101]]89; CHECK-NEXT: [[ADD33715:%.*]] = or i1 [[CMP332]], [[CMP335]]90; CHECK-NEXT: [[CMP338:%.*]] = icmp uge i32 [[MUL485]], [[MUL102]]91; CHECK-NEXT: [[ADD34016:%.*]] = or i1 [[ADD33715]], [[CMP338]]92; CHECK-NEXT: [[CMP341:%.*]] = icmp uge i32 [[MUL485]], [[MUL103]]93; CHECK-NEXT: [[ADD34317:%.*]] = or i1 [[ADD34016]], [[CMP341]]94; CHECK-NEXT: [[ADD343:%.*]] = zext i1 [[ADD34317]] to i6495; CHECK-NEXT: [[ARRAYIDX348:%.*]] = getelementptr [8 x i32], ptr [[P3]], i64 0, i64 [[ADD343]]96; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX348]], align 497; CHECK-NEXT: [[OR351954:%.*]] = or i32 [[TMP22]], [[TMP20]]98; CHECK-NEXT: [[CONV485:%.*]] = zext i8 [[TMP0]] to i3299; CHECK-NEXT: [[MUL486:%.*]] = mul i32 [[CONV485]], 14100; CHECK-NEXT: [[CONV491:%.*]] = zext i8 [[TMP0]] to i32101; CHECK-NEXT: [[MUL492:%.*]] = mul i32 [[CONV491]], 14102; CHECK-NEXT: [[CONV498:%.*]] = zext i8 [[TMP0]] to i32103; CHECK-NEXT: [[MUL499:%.*]] = mul i32 [[CONV498]], 14104; CHECK-NEXT: [[CONV505:%.*]] = zext i8 [[TMP0]] to i32105; CHECK-NEXT: [[MUL506:%.*]] = mul i32 [[CONV505]], 14106; CHECK-NEXT: [[CMP519:%.*]] = icmp uge i32 [[MUL486]], [[MUL102]]107; CHECK-NEXT: [[CMP522:%.*]] = icmp uge i32 [[MUL486]], [[MUL103]]108; CHECK-NEXT: [[ADD52418:%.*]] = or i1 [[CMP519]], [[CMP522]]109; CHECK-NEXT: [[ADD524:%.*]] = zext i1 [[ADD52418]] to i64110; CHECK-NEXT: [[ARRAYIDX529:%.*]] = getelementptr [8 x i32], ptr [[P1]], i64 0, i64 [[ADD524]]111; CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[ARRAYIDX529]], align 4112; CHECK-NEXT: [[CMP541:%.*]] = icmp uge i32 [[MUL492]], [[MUL101]]113; CHECK-NEXT: [[CMP544:%.*]] = icmp uge i32 [[MUL492]], [[MUL102]]114; CHECK-NEXT: [[ADD54619:%.*]] = or i1 [[CMP541]], [[CMP544]]115; CHECK-NEXT: [[CMP547:%.*]] = icmp uge i32 [[MUL492]], [[MUL103]]116; CHECK-NEXT: [[ADD54920:%.*]] = or i1 [[ADD54619]], [[CMP547]]117; CHECK-NEXT: [[ADD549:%.*]] = zext i1 [[ADD54920]] to i64118; CHECK-NEXT: [[ARRAYIDX554:%.*]] = getelementptr [8 x i32], ptr [[P2]], i64 0, i64 [[ADD549]]119; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX554]], align 4120; CHECK-NEXT: [[CMP572:%.*]] = icmp uge i32 [[MUL499]], [[MUL103]]121; CHECK-NEXT: [[CONV573:%.*]] = zext i1 [[CMP572]] to i64122; CHECK-NEXT: [[ARRAYIDX579:%.*]] = getelementptr [8 x i32], ptr [[P4]], i64 0, i64 [[CONV573]]123; CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[ARRAYIDX579]], align 4124; CHECK-NEXT: [[CMP594:%.*]] = icmp uge i32 [[MUL506]], [[MUL102]]125; CHECK-NEXT: [[CONV595:%.*]] = zext i1 [[CMP594]] to i64126; CHECK-NEXT: [[ARRAYIDX604:%.*]] = getelementptr [8 x i32], ptr [[P3]], i64 0, i64 [[CONV595]]127; CHECK-NEXT: [[TMP29:%.*]] = load i32, ptr [[ARRAYIDX604]], align 4128; CHECK-NEXT: [[OR4791159:%.*]] = or i32 [[OR301952]], [[OR951]]129; CHECK-NEXT: [[OR6071160:%.*]] = or i32 [[OR4791159]], [[OR326953]]130; CHECK-NEXT: [[OR4541161:%.*]] = or i32 [[OR6071160]], [[OR351954]]131; CHECK-NEXT: [[SHL58111621163:%.*]] = or i32 [[TMP27]], [[TMP29]]132; CHECK-NEXT: [[SHL55611641165:%.*]] = or i32 [[TMP25]], [[SHL58111621163]]133; CHECK-NEXT: [[SHL53111661167:%.*]] = or i32 [[TMP23]], [[SHL55611641165]]134; CHECK-NEXT: [[SHL5311166:%.*]] = trunc i32 [[SHL53111661167]] to i8135; CHECK-NEXT: [[CONV616:%.*]] = trunc i32 [[OR4541161]] to i8136; CHECK-NEXT: [[ARRAYIDX617:%.*]] = getelementptr i8, ptr [[PDST]], i64 4137; CHECK-NEXT: store i8 [[CONV616]], ptr [[ARRAYIDX617]], align 1138; CHECK-NEXT: store i8 [[SHL5311166]], ptr [[PDST]], align 1139; CHECK-NEXT: ret void140;141entry:142 %mul100 = mul i32 %stride, 9143 %mul101 = mul i32 %stride, 7144 %mul102 = mul i32 %stride, 5145 %mul103 = mul i32 %stride, 3146 %conv111 = zext i8 %0 to i32147 %mul112 = mul i32 %conv111, 14148 %conv117 = zext i8 %0 to i32149 %mul118 = mul i32 %conv117, 14150 %conv124 = zext i8 %0 to i32151 %mul125 = mul i32 %conv124, 14152 %conv131 = zext i8 %0 to i32153 %mul132 = mul i32 %conv131, 14154 %cmp139 = icmp uge i32 %mul112, %mul100155 %cmp142 = icmp uge i32 %mul112, %mul101156 %add1441 = or i1 %cmp139, %cmp142157 %cmp145 = icmp uge i32 %mul112, %mul102158 %add1472 = or i1 %add1441, %cmp145159 %cmp148 = icmp uge i32 %mul112, %mul103160 %add1503 = or i1 %add1472, %cmp148161 %add150 = zext i1 %add1503 to i64162 %arrayidx155 = getelementptr [8 x i32], ptr %p1, i64 0, i64 %add150163 %1 = load i32, ptr %arrayidx155, align 4164 %cmp165 = icmp uge i32 %mul118, %mul101165 %cmp171 = icmp uge i32 %mul118, %mul103166 %add1734 = or i1 %cmp165, %cmp171167 %add173 = zext i1 %add1734 to i64168 %arrayidx178 = getelementptr [8 x i32], ptr %p2, i64 0, i64 %add173169 %2 = load i32, ptr %arrayidx178, align 4170 %cmp185 = icmp uge i32 %mul125, %mul100171 %cmp188 = icmp uge i32 %mul125, %mul101172 %add1905 = or i1 %cmp185, %cmp188173 %cmp191 = icmp uge i32 %mul125, %mul102174 %add1936 = or i1 %add1905, %cmp191175 %add193 = zext i1 %add1936 to i64176 %arrayidx201 = getelementptr [8 x i32], ptr %p4, i64 0, i64 %add193177 %3 = load i32, ptr %arrayidx201, align 4178 %cmp208 = icmp uge i32 %mul132, %mul100179 %cmp211 = icmp uge i32 %mul132, %mul101180 %add2137 = or i1 %cmp208, %cmp211181 %cmp214 = icmp uge i32 %mul132, %mul102182 %add2168 = or i1 %add2137, %cmp214183 %cmp217 = icmp uge i32 %mul132, %mul103184 %add2199 = or i1 %add2168, %cmp217185 %add219 = zext i1 %add2199 to i64186 %arrayidx224 = getelementptr [8 x i32], ptr %p3, i64 0, i64 %add219187 %4 = load i32, ptr %arrayidx224, align 4188 %conv230 = zext i8 %0 to i32189 %mul231 = mul i32 %conv230, 14190 %conv237 = zext i8 %0 to i32191 %mul238 = mul i32 %conv237, 14192 %conv244 = zext i8 %0 to i32193 %mul245 = mul i32 %conv244, 14194 %conv251 = zext i8 %0 to i32195 %mul252 = mul i32 %conv251, 14196 %cmp262 = icmp uge i32 %mul231, %mul101197 %cmp268 = icmp uge i32 %mul231, %mul103198 %add27010 = or i1 %cmp262, %cmp268199 %add270 = zext i1 %add27010 to i64200 %arrayidx275 = getelementptr [8 x i32], ptr %p1, i64 0, i64 %add270201 %5 = load i32, ptr %arrayidx275, align 4202 %or951 = or i32 %5, %1203 %cmp282 = icmp uge i32 %mul238, %mul100204 %cmp285 = icmp uge i32 %mul238, %mul101205 %add28711 = or i1 %cmp282, %cmp285206 %cmp288 = icmp uge i32 %mul238, %mul102207 %add29012 = or i1 %add28711, %cmp288208 %cmp291 = icmp uge i32 %mul238, %mul103209 %add29313 = or i1 %add29012, %cmp291210 %add293 = zext i1 %add29313 to i64211 %arrayidx298 = getelementptr [8 x i32], ptr %p2, i64 0, i64 %add293212 %6 = load i32, ptr %arrayidx298, align 4213 %or301952 = or i32 %6, %2214 %cmp310 = icmp uge i32 %mul245, %mul101215 %cmp316 = icmp uge i32 %mul245, %mul103216 %add31814 = or i1 %cmp310, %cmp316217 %add318 = zext i1 %add31814 to i64218 %arrayidx323 = getelementptr [8 x i32], ptr %p4, i64 0, i64 %add318219 %7 = load i32, ptr %arrayidx323, align 4220 %or326953 = or i32 %7, %3221 %cmp332 = icmp uge i32 %mul252, %mul100222 %cmp335 = icmp uge i32 %mul252, %mul101223 %add33715 = or i1 %cmp332, %cmp335224 %cmp338 = icmp uge i32 %mul252, %mul102225 %add34016 = or i1 %add33715, %cmp338226 %cmp341 = icmp uge i32 %mul252, %mul103227 %add34317 = or i1 %add34016, %cmp341228 %add343 = zext i1 %add34317 to i64229 %arrayidx348 = getelementptr [8 x i32], ptr %p3, i64 0, i64 %add343230 %8 = load i32, ptr %arrayidx348, align 4231 %or351954 = or i32 %8, %4232 %conv484 = zext i8 %0 to i32233 %mul485 = mul i32 %conv484, 14234 %conv491 = zext i8 %0 to i32235 %mul492 = mul i32 %conv491, 14236 %conv498 = zext i8 %0 to i32237 %mul499 = mul i32 %conv498, 14238 %conv505 = zext i8 %0 to i32239 %mul506 = mul i32 %conv505, 14240 %cmp519 = icmp uge i32 %mul485, %mul102241 %cmp522 = icmp uge i32 %mul485, %mul103242 %add52418 = or i1 %cmp519, %cmp522243 %add524 = zext i1 %add52418 to i64244 %arrayidx529 = getelementptr [8 x i32], ptr %p1, i64 0, i64 %add524245 %9 = load i32, ptr %arrayidx529, align 4246 %cmp541 = icmp uge i32 %mul492, %mul101247 %cmp544 = icmp uge i32 %mul492, %mul102248 %add54619 = or i1 %cmp541, %cmp544249 %cmp547 = icmp uge i32 %mul492, %mul103250 %add54920 = or i1 %add54619, %cmp547251 %add549 = zext i1 %add54920 to i64252 %arrayidx554 = getelementptr [8 x i32], ptr %p2, i64 0, i64 %add549253 %10 = load i32, ptr %arrayidx554, align 4254 %cmp572 = icmp uge i32 %mul499, %mul103255 %conv573 = zext i1 %cmp572 to i64256 %arrayidx579 = getelementptr [8 x i32], ptr %p4, i64 0, i64 %conv573257 %11 = load i32, ptr %arrayidx579, align 4258 %cmp594 = icmp uge i32 %mul506, %mul102259 %conv595 = zext i1 %cmp594 to i64260 %arrayidx604 = getelementptr [8 x i32], ptr %p3, i64 0, i64 %conv595261 %12 = load i32, ptr %arrayidx604, align 4262 %or4791159 = or i32 %or301952, %or951263 %or6071160 = or i32 %or4791159, %or326953264 %or4541161 = or i32 %or6071160, %or351954265 %shl58111621163 = or i32 %11, %12266 %shl55611641165 = or i32 %10, %shl58111621163267 %shl53111661167 = or i32 %9, %shl55611641165268 %shl5311166 = trunc i32 %shl53111661167 to i8269 %conv616 = trunc i32 %or4541161 to i8270 %arrayidx617 = getelementptr i8, ptr %pDst, i64 4271 store i8 %conv616, ptr %arrayidx617, align 1272 store i8 %shl5311166, ptr %pDst, align 1273 ret void274}275