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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=slp-vectorizer %s | FileCheck %s3target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"4target triple = "arm64-apple-ios5.0.0"5 6define i64 @mismatched_intrinsics(<4 x i32> %in1, <2 x i32> %in2) nounwind {7; CHECK-LABEL: @mismatched_intrinsics(8; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> [[IN1:%.*]])9; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> [[IN2:%.*]])10; CHECK-NEXT: [[TST:%.*]] = icmp sgt i64 [[VADDLVQ_S32_I]], [[VADDLV_S32_I]]11; CHECK-NEXT: [[EQUAL:%.*]] = sext i1 [[TST]] to i6412; CHECK-NEXT: ret i64 [[EQUAL]]13;14 15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #216 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #217 %tst = icmp sgt i64 %vaddlvq_s32.i, %vaddlv_s32.i18 %equal = sext i1 %tst to i6419 ret i64 %equal20}21 22declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)23declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)24