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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -mtriple=aarch64 -passes=slp-vectorizer -S -slp-threshold=-100 < %s | FileCheck %s3 4define i16 @test() {5; CHECK-LABEL: define i16 @test() {6; CHECK-NEXT: entry:7; CHECK-NEXT: [[LNOT:%.*]] = xor i1 true, true8; CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i169; CHECK-NEXT: [[ADD:%.*]] = add nsw i16 0, [[LNOT_EXT]]10; CHECK-NEXT: [[LNOT5:%.*]] = xor i1 true, true11; CHECK-NEXT: [[LNOT_EXT6:%.*]] = zext i1 [[LNOT5]] to i1612; CHECK-NEXT: [[ADD7:%.*]] = add nsw i16 [[ADD]], [[LNOT_EXT6]]13; CHECK-NEXT: ret i16 [[ADD7]]14;15entry:16 %conv = sext i16 1 to i3217 %cmp = icmp eq i32 %conv, 118 %lnot = xor i1 %cmp, true19 %lnot.ext = zext i1 %lnot to i1620 %add = add nsw i16 0, %lnot.ext21 %conv2 = sext i16 1 to i3222 %cmp3 = icmp eq i32 %conv2, 123 %lnot5 = xor i1 %cmp3, true24 %lnot.ext6 = zext i1 %lnot5 to i1625 %add7 = add nsw i16 %add, %lnot.ext626 ret i16 %add727}28