72 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=slp-vectorizer -slp-vectorize-non-power-of-2 -mtriple=arm64-apple-ios -S %s | FileCheck --check-prefixes=CHECK,NON-POWER-OF-2 %s3; RUN: opt -passes=slp-vectorizer -slp-vectorize-non-power-of-2=false -mtriple=arm64-apple-ios -S %s | FileCheck --check-prefixes=CHECK,POWER-OF-2 %s4 5define void @vec3_vectorize_call(ptr %Colour, float %0) {6; NON-POWER-OF-2-LABEL: @vec3_vectorize_call(7; NON-POWER-OF-2-NEXT: entry:8; NON-POWER-OF-2-NEXT: [[TMP1:%.*]] = load <2 x float>, ptr [[COLOUR:%.*]], align 49; NON-POWER-OF-2-NEXT: [[TMP2:%.*]] = insertelement <3 x float> poison, float [[TMP0:%.*]], i32 210; NON-POWER-OF-2-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <3 x i32> <i32 0, i32 1, i32 poison>11; NON-POWER-OF-2-NEXT: [[TMP4:%.*]] = shufflevector <3 x float> [[TMP2]], <3 x float> [[TMP3]], <3 x i32> <i32 3, i32 4, i32 2>12; NON-POWER-OF-2-NEXT: [[TMP5:%.*]] = call <3 x float> @llvm.fmuladd.v3f32(<3 x float> [[TMP4]], <3 x float> zeroinitializer, <3 x float> zeroinitializer)13; NON-POWER-OF-2-NEXT: store <3 x float> [[TMP5]], ptr [[COLOUR]], align 414; NON-POWER-OF-2-NEXT: ret void15;16; POWER-OF-2-LABEL: @vec3_vectorize_call(17; POWER-OF-2-NEXT: entry:18; POWER-OF-2-NEXT: [[TMP1:%.*]] = load <2 x float>, ptr [[COLOUR:%.*]], align 419; POWER-OF-2-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> [[TMP1]], <2 x float> zeroinitializer, <2 x float> zeroinitializer)20; POWER-OF-2-NEXT: store <2 x float> [[TMP2]], ptr [[COLOUR]], align 421; POWER-OF-2-NEXT: [[ARRAYIDX99_I1:%.*]] = getelementptr float, ptr [[COLOUR]], i64 222; POWER-OF-2-NEXT: [[TMP3:%.*]] = call float @llvm.fmuladd.f32(float [[TMP0:%.*]], float 0.000000e+00, float 0.000000e+00)23; POWER-OF-2-NEXT: store float [[TMP3]], ptr [[ARRAYIDX99_I1]], align 424; POWER-OF-2-NEXT: ret void25;26entry:27 %1 = load float, ptr %Colour, align 428 %2 = call float @llvm.fmuladd.f32(float %1, float 0.000000e+00, float 0.000000e+00)29 store float %2, ptr %Colour, align 430 %arrayidx91.i = getelementptr float, ptr %Colour, i64 131 %3 = load float, ptr %arrayidx91.i, align 432 %4 = call float @llvm.fmuladd.f32(float %3, float 0.000000e+00, float 0.000000e+00)33 store float %4, ptr %arrayidx91.i, align 434 %arrayidx99.i1 = getelementptr float, ptr %Colour, i64 235 %5 = call float @llvm.fmuladd.f32(float %0, float 0.000000e+00, float 0.000000e+00)36 store float %5, ptr %arrayidx99.i1, align 437 ret void38}39 40define void @vec3_fmuladd_64(ptr %Colour, double %0) {41; CHECK-LABEL: @vec3_fmuladd_64(42; CHECK-NEXT: entry:43; CHECK-NEXT: [[ARRAYIDX80:%.*]] = getelementptr float, ptr [[COLOUR:%.*]], i64 244; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[TMP0:%.*]], i32 045; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> poison, <2 x i32> zeroinitializer46; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> [[TMP2]], <2 x double> zeroinitializer, <2 x double> zeroinitializer)47; CHECK-NEXT: [[TMP4:%.*]] = fptrunc <2 x double> [[TMP3]] to <2 x float>48; CHECK-NEXT: store <2 x float> [[TMP4]], ptr [[COLOUR]], align 449; CHECK-NEXT: [[TMP5:%.*]] = call double @llvm.fmuladd.f64(double [[TMP0]], double 0.000000e+00, double 0.000000e+00)50; CHECK-NEXT: [[CONV82:%.*]] = fptrunc double [[TMP5]] to float51; CHECK-NEXT: store float [[CONV82]], ptr [[ARRAYIDX80]], align 452; CHECK-NEXT: ret void53;54entry:55 %arrayidx72 = getelementptr float, ptr %Colour, i64 156 %arrayidx80 = getelementptr float, ptr %Colour, i64 257 %1 = call double @llvm.fmuladd.f64(double %0, double 0.000000e+00, double 0.000000e+00)58 %conv66 = fptrunc double %1 to float59 store float %conv66, ptr %Colour, align 460 %2 = call double @llvm.fmuladd.f64(double %0, double 0.000000e+00, double 0.000000e+00)61 %conv74 = fptrunc double %2 to float62 store float %conv74, ptr %arrayidx72, align 463 %3 = call double @llvm.fmuladd.f64(double %0, double 0.000000e+00, double 0.000000e+00)64 %conv82 = fptrunc double %3 to float65 store float %conv82, ptr %arrayidx80, align 466 ret void67}68 69declare float @llvm.fmuladd.f32(float, float, float)70 71declare double @llvm.fmuladd.f64(double, double, double)72