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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -passes=slp-vectorizer %s | FileCheck -check-prefixes=GCN,GFX7 %s3; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -passes=slp-vectorizer %s | FileCheck -check-prefixes=GCN,GFX8 %s4; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -passes=slp-vectorizer %s | FileCheck -check-prefixes=GCN,GFX9 %s5 6define <2 x i16> @uadd_sat_v2i16(<2 x i16> %arg0, <2 x i16> %arg1) {7; GFX7-LABEL: @uadd_sat_v2i16(8; GFX7-NEXT: bb:9; GFX7-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i16> [[ARG0:%.*]], i64 010; GFX7-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i16> [[ARG0]], i64 111; GFX7-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i16> [[ARG1:%.*]], i64 012; GFX7-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i16> [[ARG1]], i64 113; GFX7-NEXT: [[ADD_0:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_0]], i16 [[ARG1_0]])14; GFX7-NEXT: [[ADD_1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_1]], i16 [[ARG1_1]])15; GFX7-NEXT: [[INS_0:%.*]] = insertelement <2 x i16> undef, i16 [[ADD_0]], i64 016; GFX7-NEXT: [[INS_1:%.*]] = insertelement <2 x i16> [[INS_0]], i16 [[ADD_1]], i64 117; GFX7-NEXT: ret <2 x i16> [[INS_1]]18;19; GFX8-LABEL: @uadd_sat_v2i16(20; GFX8-NEXT: bb:21; GFX8-NEXT: [[TMP0:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[ARG0:%.*]], <2 x i16> [[ARG1:%.*]])22; GFX8-NEXT: ret <2 x i16> [[TMP0]]23;24; GFX9-LABEL: @uadd_sat_v2i16(25; GFX9-NEXT: bb:26; GFX9-NEXT: [[TMP0:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[ARG0:%.*]], <2 x i16> [[ARG1:%.*]])27; GFX9-NEXT: ret <2 x i16> [[TMP0]]28;29bb:30 %arg0.0 = extractelement <2 x i16> %arg0, i64 031 %arg0.1 = extractelement <2 x i16> %arg0, i64 132 %arg1.0 = extractelement <2 x i16> %arg1, i64 033 %arg1.1 = extractelement <2 x i16> %arg1, i64 134 %add.0 = call i16 @llvm.uadd.sat.i16(i16 %arg0.0, i16 %arg1.0)35 %add.1 = call i16 @llvm.uadd.sat.i16(i16 %arg0.1, i16 %arg1.1)36 %ins.0 = insertelement <2 x i16> undef, i16 %add.0, i64 037 %ins.1 = insertelement <2 x i16> %ins.0, i16 %add.1, i64 138 ret <2 x i16> %ins.139}40 41define <2 x i16> @usub_sat_v2i16(<2 x i16> %arg0, <2 x i16> %arg1) {42; GFX7-LABEL: @usub_sat_v2i16(43; GFX7-NEXT: bb:44; GFX7-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i16> [[ARG0:%.*]], i64 045; GFX7-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i16> [[ARG0]], i64 146; GFX7-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i16> [[ARG1:%.*]], i64 047; GFX7-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i16> [[ARG1]], i64 148; GFX7-NEXT: [[ADD_0:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[ARG0_0]], i16 [[ARG1_0]])49; GFX7-NEXT: [[ADD_1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[ARG0_1]], i16 [[ARG1_1]])50; GFX7-NEXT: [[INS_0:%.*]] = insertelement <2 x i16> undef, i16 [[ADD_0]], i64 051; GFX7-NEXT: [[INS_1:%.*]] = insertelement <2 x i16> [[INS_0]], i16 [[ADD_1]], i64 152; GFX7-NEXT: ret <2 x i16> [[INS_1]]53;54; GFX8-LABEL: @usub_sat_v2i16(55; GFX8-NEXT: bb:56; GFX8-NEXT: [[TMP0:%.*]] = call <2 x i16> @llvm.usub.sat.v2i16(<2 x i16> [[ARG0:%.*]], <2 x i16> [[ARG1:%.*]])57; GFX8-NEXT: ret <2 x i16> [[TMP0]]58;59; GFX9-LABEL: @usub_sat_v2i16(60; GFX9-NEXT: bb:61; GFX9-NEXT: [[TMP0:%.*]] = call <2 x i16> @llvm.usub.sat.v2i16(<2 x i16> [[ARG0:%.*]], <2 x i16> [[ARG1:%.*]])62; GFX9-NEXT: ret <2 x i16> [[TMP0]]63;64bb:65 %arg0.0 = extractelement <2 x i16> %arg0, i64 066 %arg0.1 = extractelement <2 x i16> %arg0, i64 167 %arg1.0 = extractelement <2 x i16> %arg1, i64 068 %arg1.1 = extractelement <2 x i16> %arg1, i64 169 %add.0 = call i16 @llvm.usub.sat.i16(i16 %arg0.0, i16 %arg1.0)70 %add.1 = call i16 @llvm.usub.sat.i16(i16 %arg0.1, i16 %arg1.1)71 %ins.0 = insertelement <2 x i16> undef, i16 %add.0, i64 072 %ins.1 = insertelement <2 x i16> %ins.0, i16 %add.1, i64 173 ret <2 x i16> %ins.174}75 76define <2 x i16> @sadd_sat_v2i16(<2 x i16> %arg0, <2 x i16> %arg1) {77; GFX7-LABEL: @sadd_sat_v2i16(78; GFX7-NEXT: bb:79; GFX7-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i16> [[ARG0:%.*]], i64 080; GFX7-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i16> [[ARG0]], i64 181; GFX7-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i16> [[ARG1:%.*]], i64 082; GFX7-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i16> [[ARG1]], i64 183; GFX7-NEXT: [[ADD_0:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[ARG0_0]], i16 [[ARG1_0]])84; GFX7-NEXT: [[ADD_1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[ARG0_1]], i16 [[ARG1_1]])85; GFX7-NEXT: [[INS_0:%.*]] = insertelement <2 x i16> undef, i16 [[ADD_0]], i64 086; GFX7-NEXT: [[INS_1:%.*]] = insertelement <2 x i16> [[INS_0]], i16 [[ADD_1]], i64 187; GFX7-NEXT: ret <2 x i16> [[INS_1]]88;89; GFX8-LABEL: @sadd_sat_v2i16(90; GFX8-NEXT: bb:91; GFX8-NEXT: [[TMP0:%.*]] = call <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16> [[ARG0:%.*]], <2 x i16> [[ARG1:%.*]])92; GFX8-NEXT: ret <2 x i16> [[TMP0]]93;94; GFX9-LABEL: @sadd_sat_v2i16(95; GFX9-NEXT: bb:96; GFX9-NEXT: [[TMP0:%.*]] = call <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16> [[ARG0:%.*]], <2 x i16> [[ARG1:%.*]])97; GFX9-NEXT: ret <2 x i16> [[TMP0]]98;99bb:100 %arg0.0 = extractelement <2 x i16> %arg0, i64 0101 %arg0.1 = extractelement <2 x i16> %arg0, i64 1102 %arg1.0 = extractelement <2 x i16> %arg1, i64 0103 %arg1.1 = extractelement <2 x i16> %arg1, i64 1104 %add.0 = call i16 @llvm.sadd.sat.i16(i16 %arg0.0, i16 %arg1.0)105 %add.1 = call i16 @llvm.sadd.sat.i16(i16 %arg0.1, i16 %arg1.1)106 %ins.0 = insertelement <2 x i16> undef, i16 %add.0, i64 0107 %ins.1 = insertelement <2 x i16> %ins.0, i16 %add.1, i64 1108 ret <2 x i16> %ins.1109}110 111define <2 x i16> @ssub_sat_v2i16(<2 x i16> %arg0, <2 x i16> %arg1) {112; GFX7-LABEL: @ssub_sat_v2i16(113; GFX7-NEXT: bb:114; GFX7-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i16> [[ARG0:%.*]], i64 0115; GFX7-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i16> [[ARG0]], i64 1116; GFX7-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i16> [[ARG1:%.*]], i64 0117; GFX7-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i16> [[ARG1]], i64 1118; GFX7-NEXT: [[ADD_0:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[ARG0_0]], i16 [[ARG1_0]])119; GFX7-NEXT: [[ADD_1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[ARG0_1]], i16 [[ARG1_1]])120; GFX7-NEXT: [[INS_0:%.*]] = insertelement <2 x i16> undef, i16 [[ADD_0]], i64 0121; GFX7-NEXT: [[INS_1:%.*]] = insertelement <2 x i16> [[INS_0]], i16 [[ADD_1]], i64 1122; GFX7-NEXT: ret <2 x i16> [[INS_1]]123;124; GFX8-LABEL: @ssub_sat_v2i16(125; GFX8-NEXT: bb:126; GFX8-NEXT: [[TMP0:%.*]] = call <2 x i16> @llvm.ssub.sat.v2i16(<2 x i16> [[ARG0:%.*]], <2 x i16> [[ARG1:%.*]])127; GFX8-NEXT: ret <2 x i16> [[TMP0]]128;129; GFX9-LABEL: @ssub_sat_v2i16(130; GFX9-NEXT: bb:131; GFX9-NEXT: [[TMP0:%.*]] = call <2 x i16> @llvm.ssub.sat.v2i16(<2 x i16> [[ARG0:%.*]], <2 x i16> [[ARG1:%.*]])132; GFX9-NEXT: ret <2 x i16> [[TMP0]]133;134bb:135 %arg0.0 = extractelement <2 x i16> %arg0, i64 0136 %arg0.1 = extractelement <2 x i16> %arg0, i64 1137 %arg1.0 = extractelement <2 x i16> %arg1, i64 0138 %arg1.1 = extractelement <2 x i16> %arg1, i64 1139 %add.0 = call i16 @llvm.ssub.sat.i16(i16 %arg0.0, i16 %arg1.0)140 %add.1 = call i16 @llvm.ssub.sat.i16(i16 %arg0.1, i16 %arg1.1)141 %ins.0 = insertelement <2 x i16> undef, i16 %add.0, i64 0142 %ins.1 = insertelement <2 x i16> %ins.0, i16 %add.1, i64 1143 ret <2 x i16> %ins.1144}145 146define <2 x i32> @uadd_sat_v2i32(<2 x i32> %arg0, <2 x i32> %arg1) {147; GCN-LABEL: @uadd_sat_v2i32(148; GCN-NEXT: bb:149; GCN-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i32> [[ARG0:%.*]], i64 0150; GCN-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i32> [[ARG0]], i64 1151; GCN-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i32> [[ARG1:%.*]], i64 0152; GCN-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i32> [[ARG1]], i64 1153; GCN-NEXT: [[ADD_0:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[ARG0_0]], i32 [[ARG1_0]])154; GCN-NEXT: [[ADD_1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[ARG0_1]], i32 [[ARG1_1]])155; GCN-NEXT: [[INS_0:%.*]] = insertelement <2 x i32> undef, i32 [[ADD_0]], i64 0156; GCN-NEXT: [[INS_1:%.*]] = insertelement <2 x i32> [[INS_0]], i32 [[ADD_1]], i64 1157; GCN-NEXT: ret <2 x i32> [[INS_1]]158;159bb:160 %arg0.0 = extractelement <2 x i32> %arg0, i64 0161 %arg0.1 = extractelement <2 x i32> %arg0, i64 1162 %arg1.0 = extractelement <2 x i32> %arg1, i64 0163 %arg1.1 = extractelement <2 x i32> %arg1, i64 1164 %add.0 = call i32 @llvm.uadd.sat.i32(i32 %arg0.0, i32 %arg1.0)165 %add.1 = call i32 @llvm.uadd.sat.i32(i32 %arg0.1, i32 %arg1.1)166 %ins.0 = insertelement <2 x i32> undef, i32 %add.0, i64 0167 %ins.1 = insertelement <2 x i32> %ins.0, i32 %add.1, i64 1168 ret <2 x i32> %ins.1169}170 171define <2 x i32> @usub_sat_v2i32(<2 x i32> %arg0, <2 x i32> %arg1) {172; GCN-LABEL: @usub_sat_v2i32(173; GCN-NEXT: bb:174; GCN-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i32> [[ARG0:%.*]], i64 0175; GCN-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i32> [[ARG0]], i64 1176; GCN-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i32> [[ARG1:%.*]], i64 0177; GCN-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i32> [[ARG1]], i64 1178; GCN-NEXT: [[ADD_0:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[ARG0_0]], i32 [[ARG1_0]])179; GCN-NEXT: [[ADD_1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[ARG0_1]], i32 [[ARG1_1]])180; GCN-NEXT: [[INS_0:%.*]] = insertelement <2 x i32> undef, i32 [[ADD_0]], i64 0181; GCN-NEXT: [[INS_1:%.*]] = insertelement <2 x i32> [[INS_0]], i32 [[ADD_1]], i64 1182; GCN-NEXT: ret <2 x i32> [[INS_1]]183;184bb:185 %arg0.0 = extractelement <2 x i32> %arg0, i64 0186 %arg0.1 = extractelement <2 x i32> %arg0, i64 1187 %arg1.0 = extractelement <2 x i32> %arg1, i64 0188 %arg1.1 = extractelement <2 x i32> %arg1, i64 1189 %add.0 = call i32 @llvm.usub.sat.i32(i32 %arg0.0, i32 %arg1.0)190 %add.1 = call i32 @llvm.usub.sat.i32(i32 %arg0.1, i32 %arg1.1)191 %ins.0 = insertelement <2 x i32> undef, i32 %add.0, i64 0192 %ins.1 = insertelement <2 x i32> %ins.0, i32 %add.1, i64 1193 ret <2 x i32> %ins.1194}195 196define <2 x i32> @sadd_sat_v2i32(<2 x i32> %arg0, <2 x i32> %arg1) {197; GCN-LABEL: @sadd_sat_v2i32(198; GCN-NEXT: bb:199; GCN-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i32> [[ARG0:%.*]], i64 0200; GCN-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i32> [[ARG0]], i64 1201; GCN-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i32> [[ARG1:%.*]], i64 0202; GCN-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i32> [[ARG1]], i64 1203; GCN-NEXT: [[ADD_0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[ARG0_0]], i32 [[ARG1_0]])204; GCN-NEXT: [[ADD_1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[ARG0_1]], i32 [[ARG1_1]])205; GCN-NEXT: [[INS_0:%.*]] = insertelement <2 x i32> undef, i32 [[ADD_0]], i64 0206; GCN-NEXT: [[INS_1:%.*]] = insertelement <2 x i32> [[INS_0]], i32 [[ADD_1]], i64 1207; GCN-NEXT: ret <2 x i32> [[INS_1]]208;209bb:210 %arg0.0 = extractelement <2 x i32> %arg0, i64 0211 %arg0.1 = extractelement <2 x i32> %arg0, i64 1212 %arg1.0 = extractelement <2 x i32> %arg1, i64 0213 %arg1.1 = extractelement <2 x i32> %arg1, i64 1214 %add.0 = call i32 @llvm.sadd.sat.i32(i32 %arg0.0, i32 %arg1.0)215 %add.1 = call i32 @llvm.sadd.sat.i32(i32 %arg0.1, i32 %arg1.1)216 %ins.0 = insertelement <2 x i32> undef, i32 %add.0, i64 0217 %ins.1 = insertelement <2 x i32> %ins.0, i32 %add.1, i64 1218 ret <2 x i32> %ins.1219}220 221define <2 x i32> @ssub_sat_v2i32(<2 x i32> %arg0, <2 x i32> %arg1) {222; GCN-LABEL: @ssub_sat_v2i32(223; GCN-NEXT: bb:224; GCN-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i32> [[ARG0:%.*]], i64 0225; GCN-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i32> [[ARG0]], i64 1226; GCN-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i32> [[ARG1:%.*]], i64 0227; GCN-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i32> [[ARG1]], i64 1228; GCN-NEXT: [[ADD_0:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[ARG0_0]], i32 [[ARG1_0]])229; GCN-NEXT: [[ADD_1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[ARG0_1]], i32 [[ARG1_1]])230; GCN-NEXT: [[INS_0:%.*]] = insertelement <2 x i32> undef, i32 [[ADD_0]], i64 0231; GCN-NEXT: [[INS_1:%.*]] = insertelement <2 x i32> [[INS_0]], i32 [[ADD_1]], i64 1232; GCN-NEXT: ret <2 x i32> [[INS_1]]233;234bb:235 %arg0.0 = extractelement <2 x i32> %arg0, i64 0236 %arg0.1 = extractelement <2 x i32> %arg0, i64 1237 %arg1.0 = extractelement <2 x i32> %arg1, i64 0238 %arg1.1 = extractelement <2 x i32> %arg1, i64 1239 %add.0 = call i32 @llvm.ssub.sat.i32(i32 %arg0.0, i32 %arg1.0)240 %add.1 = call i32 @llvm.ssub.sat.i32(i32 %arg0.1, i32 %arg1.1)241 %ins.0 = insertelement <2 x i32> undef, i32 %add.0, i64 0242 %ins.1 = insertelement <2 x i32> %ins.0, i32 %add.1, i64 1243 ret <2 x i32> %ins.1244}245 246define <3 x i16> @uadd_sat_v3i16(<3 x i16> %arg0, <3 x i16> %arg1) {247; GFX7-LABEL: @uadd_sat_v3i16(248; GFX7-NEXT: bb:249; GFX7-NEXT: [[ARG0_0:%.*]] = extractelement <3 x i16> [[ARG0:%.*]], i64 0250; GFX7-NEXT: [[ARG0_1:%.*]] = extractelement <3 x i16> [[ARG0]], i64 1251; GFX7-NEXT: [[ARG0_2:%.*]] = extractelement <3 x i16> [[ARG0]], i64 2252; GFX7-NEXT: [[ARG1_0:%.*]] = extractelement <3 x i16> [[ARG1:%.*]], i64 0253; GFX7-NEXT: [[ARG1_1:%.*]] = extractelement <3 x i16> [[ARG1]], i64 1254; GFX7-NEXT: [[ARG1_2:%.*]] = extractelement <3 x i16> [[ARG1]], i64 2255; GFX7-NEXT: [[ADD_0:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_0]], i16 [[ARG1_0]])256; GFX7-NEXT: [[ADD_1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_1]], i16 [[ARG1_1]])257; GFX7-NEXT: [[ADD_2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_2]], i16 [[ARG1_2]])258; GFX7-NEXT: [[INS_0:%.*]] = insertelement <3 x i16> undef, i16 [[ADD_0]], i64 0259; GFX7-NEXT: [[INS_1:%.*]] = insertelement <3 x i16> [[INS_0]], i16 [[ADD_1]], i64 1260; GFX7-NEXT: [[INS_2:%.*]] = insertelement <3 x i16> [[INS_1]], i16 [[ADD_2]], i64 2261; GFX7-NEXT: ret <3 x i16> [[INS_2]]262;263; GFX8-LABEL: @uadd_sat_v3i16(264; GFX8-NEXT: bb:265; GFX8-NEXT: [[ARG0_2:%.*]] = extractelement <3 x i16> [[ARG0:%.*]], i64 2266; GFX8-NEXT: [[ARG1_2:%.*]] = extractelement <3 x i16> [[ARG1:%.*]], i64 2267; GFX8-NEXT: [[TMP0:%.*]] = shufflevector <3 x i16> [[ARG0]], <3 x i16> poison, <2 x i32> <i32 0, i32 1>268; GFX8-NEXT: [[TMP1:%.*]] = shufflevector <3 x i16> [[ARG1]], <3 x i16> poison, <2 x i32> <i32 0, i32 1>269; GFX8-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[TMP0]], <2 x i16> [[TMP1]])270; GFX8-NEXT: [[ADD_2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_2]], i16 [[ARG1_2]])271; GFX8-NEXT: [[TMP3:%.*]] = shufflevector <2 x i16> [[TMP2]], <2 x i16> poison, <3 x i32> <i32 0, i32 1, i32 poison>272; GFX8-NEXT: [[INS_2:%.*]] = insertelement <3 x i16> [[TMP3]], i16 [[ADD_2]], i64 2273; GFX8-NEXT: ret <3 x i16> [[INS_2]]274;275; GFX9-LABEL: @uadd_sat_v3i16(276; GFX9-NEXT: bb:277; GFX9-NEXT: [[ARG0_2:%.*]] = extractelement <3 x i16> [[ARG0:%.*]], i64 2278; GFX9-NEXT: [[ARG1_2:%.*]] = extractelement <3 x i16> [[ARG1:%.*]], i64 2279; GFX9-NEXT: [[TMP0:%.*]] = shufflevector <3 x i16> [[ARG0]], <3 x i16> poison, <2 x i32> <i32 0, i32 1>280; GFX9-NEXT: [[TMP1:%.*]] = shufflevector <3 x i16> [[ARG1]], <3 x i16> poison, <2 x i32> <i32 0, i32 1>281; GFX9-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[TMP0]], <2 x i16> [[TMP1]])282; GFX9-NEXT: [[ADD_2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_2]], i16 [[ARG1_2]])283; GFX9-NEXT: [[TMP3:%.*]] = shufflevector <2 x i16> [[TMP2]], <2 x i16> poison, <3 x i32> <i32 0, i32 1, i32 poison>284; GFX9-NEXT: [[INS_2:%.*]] = insertelement <3 x i16> [[TMP3]], i16 [[ADD_2]], i64 2285; GFX9-NEXT: ret <3 x i16> [[INS_2]]286;287bb:288 %arg0.0 = extractelement <3 x i16> %arg0, i64 0289 %arg0.1 = extractelement <3 x i16> %arg0, i64 1290 %arg0.2 = extractelement <3 x i16> %arg0, i64 2291 %arg1.0 = extractelement <3 x i16> %arg1, i64 0292 %arg1.1 = extractelement <3 x i16> %arg1, i64 1293 %arg1.2 = extractelement <3 x i16> %arg1, i64 2294 %add.0 = call i16 @llvm.uadd.sat.i16(i16 %arg0.0, i16 %arg1.0)295 %add.1 = call i16 @llvm.uadd.sat.i16(i16 %arg0.1, i16 %arg1.1)296 %add.2 = call i16 @llvm.uadd.sat.i16(i16 %arg0.2, i16 %arg1.2)297 %ins.0 = insertelement <3 x i16> undef, i16 %add.0, i64 0298 %ins.1 = insertelement <3 x i16> %ins.0, i16 %add.1, i64 1299 %ins.2 = insertelement <3 x i16> %ins.1, i16 %add.2, i64 2300 ret <3 x i16> %ins.2301}302 303define <4 x i16> @uadd_sat_v4i16(<4 x i16> %arg0, <4 x i16> %arg1) {304; GFX7-LABEL: @uadd_sat_v4i16(305; GFX7-NEXT: bb:306; GFX7-NEXT: [[ARG0_0:%.*]] = extractelement <4 x i16> [[ARG0:%.*]], i64 0307; GFX7-NEXT: [[ARG0_1:%.*]] = extractelement <4 x i16> [[ARG0]], i64 1308; GFX7-NEXT: [[ARG0_2:%.*]] = extractelement <4 x i16> [[ARG0]], i64 2309; GFX7-NEXT: [[ARG0_3:%.*]] = extractelement <4 x i16> [[ARG0]], i64 3310; GFX7-NEXT: [[ARG1_0:%.*]] = extractelement <4 x i16> [[ARG1:%.*]], i64 0311; GFX7-NEXT: [[ARG1_1:%.*]] = extractelement <4 x i16> [[ARG1]], i64 1312; GFX7-NEXT: [[ARG1_2:%.*]] = extractelement <4 x i16> [[ARG1]], i64 2313; GFX7-NEXT: [[ARG1_3:%.*]] = extractelement <4 x i16> [[ARG1]], i64 3314; GFX7-NEXT: [[ADD_0:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_0]], i16 [[ARG1_0]])315; GFX7-NEXT: [[ADD_1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_1]], i16 [[ARG1_1]])316; GFX7-NEXT: [[ADD_2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_2]], i16 [[ARG1_2]])317; GFX7-NEXT: [[ADD_3:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG0_3]], i16 [[ARG1_3]])318; GFX7-NEXT: [[INS_0:%.*]] = insertelement <4 x i16> undef, i16 [[ADD_0]], i64 0319; GFX7-NEXT: [[INS_1:%.*]] = insertelement <4 x i16> [[INS_0]], i16 [[ADD_1]], i64 1320; GFX7-NEXT: [[INS_2:%.*]] = insertelement <4 x i16> [[INS_1]], i16 [[ADD_2]], i64 2321; GFX7-NEXT: [[INS_3:%.*]] = insertelement <4 x i16> [[INS_2]], i16 [[ADD_3]], i64 3322; GFX7-NEXT: ret <4 x i16> [[INS_3]]323;324; GFX8-LABEL: @uadd_sat_v4i16(325; GFX8-NEXT: bb:326; GFX8-NEXT: [[TMP6:%.*]] = shufflevector <4 x i16> [[ARG1:%.*]], <4 x i16> poison, <2 x i32> <i32 0, i32 1>327; GFX8-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[ARG2:%.*]], <4 x i16> poison, <2 x i32> <i32 0, i32 1>328; GFX8-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[TMP6]], <2 x i16> [[TMP1]])329; GFX8-NEXT: [[TMP4:%.*]] = shufflevector <4 x i16> [[ARG1]], <4 x i16> poison, <2 x i32> <i32 2, i32 3>330; GFX8-NEXT: [[TMP7:%.*]] = shufflevector <4 x i16> [[ARG2]], <4 x i16> poison, <2 x i32> <i32 2, i32 3>331; GFX8-NEXT: [[TMP5:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[TMP4]], <2 x i16> [[TMP7]])332; GFX8-NEXT: [[TMP0:%.*]] = shufflevector <2 x i16> [[TMP2]], <2 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>333; GFX8-NEXT: [[TMP3:%.*]] = shufflevector <2 x i16> [[TMP5]], <2 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>334; GFX8-NEXT: [[INS_31:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>335; GFX8-NEXT: ret <4 x i16> [[INS_31]]336;337; GFX9-LABEL: @uadd_sat_v4i16(338; GFX9-NEXT: bb:339; GFX9-NEXT: [[TMP6:%.*]] = shufflevector <4 x i16> [[ARG1:%.*]], <4 x i16> poison, <2 x i32> <i32 0, i32 1>340; GFX9-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[ARG2:%.*]], <4 x i16> poison, <2 x i32> <i32 0, i32 1>341; GFX9-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[TMP6]], <2 x i16> [[TMP1]])342; GFX9-NEXT: [[TMP4:%.*]] = shufflevector <4 x i16> [[ARG1]], <4 x i16> poison, <2 x i32> <i32 2, i32 3>343; GFX9-NEXT: [[TMP7:%.*]] = shufflevector <4 x i16> [[ARG2]], <4 x i16> poison, <2 x i32> <i32 2, i32 3>344; GFX9-NEXT: [[TMP5:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[TMP4]], <2 x i16> [[TMP7]])345; GFX9-NEXT: [[TMP0:%.*]] = shufflevector <2 x i16> [[TMP2]], <2 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>346; GFX9-NEXT: [[TMP3:%.*]] = shufflevector <2 x i16> [[TMP5]], <2 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>347; GFX9-NEXT: [[INS_31:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>348; GFX9-NEXT: ret <4 x i16> [[INS_31]]349;350bb:351 %arg0.0 = extractelement <4 x i16> %arg0, i64 0352 %arg0.1 = extractelement <4 x i16> %arg0, i64 1353 %arg0.2 = extractelement <4 x i16> %arg0, i64 2354 %arg0.3 = extractelement <4 x i16> %arg0, i64 3355 %arg1.0 = extractelement <4 x i16> %arg1, i64 0356 %arg1.1 = extractelement <4 x i16> %arg1, i64 1357 %arg1.2 = extractelement <4 x i16> %arg1, i64 2358 %arg1.3 = extractelement <4 x i16> %arg1, i64 3359 %add.0 = call i16 @llvm.uadd.sat.i16(i16 %arg0.0, i16 %arg1.0)360 %add.1 = call i16 @llvm.uadd.sat.i16(i16 %arg0.1, i16 %arg1.1)361 %add.2 = call i16 @llvm.uadd.sat.i16(i16 %arg0.2, i16 %arg1.2)362 %add.3 = call i16 @llvm.uadd.sat.i16(i16 %arg0.3, i16 %arg1.3)363 %ins.0 = insertelement <4 x i16> undef, i16 %add.0, i64 0364 %ins.1 = insertelement <4 x i16> %ins.0, i16 %add.1, i64 1365 %ins.2 = insertelement <4 x i16> %ins.1, i16 %add.2, i64 2366 %ins.3 = insertelement <4 x i16> %ins.2, i16 %add.3, i64 3367 ret <4 x i16> %ins.3368}369 370declare i16 @llvm.uadd.sat.i16(i16, i16) #0371declare i16 @llvm.usub.sat.i16(i16, i16) #0372declare i16 @llvm.sadd.sat.i16(i16, i16) #0373declare i16 @llvm.ssub.sat.i16(i16, i16) #0374 375declare i32 @llvm.uadd.sat.i32(i32, i32) #0376declare i32 @llvm.usub.sat.i32(i32, i32) #0377declare i32 @llvm.sadd.sat.i32(i32, i32) #0378declare i32 @llvm.ssub.sat.i32(i32, i32) #0379 380attributes #0 = { nounwind readnone speculatable willreturn }381