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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -passes=slp-vectorizer -slp-threshold=-18 < %s | FileCheck %s3 4; Make sure there's no SCEV assert when the indexes are for different5; sized address spaces6 7define void @slp_scev_assert(i32 %idx, i64 %tmp3) #0 {8; CHECK-LABEL: @slp_scev_assert(9; CHECK-NEXT: bb:10; CHECK-NEXT: [[TMP:%.*]] = addrspacecast ptr addrspace(5) undef to ptr11; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr addrspace(5) undef, i32 [[IDX:%.*]]12; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, ptr [[TMP]], i64 [[TMP3:%.*]]13; CHECK-NEXT: store i8 0, ptr addrspace(5) [[TMP2]], align 114; CHECK-NEXT: store i8 0, ptr [[TMP4]], align 115; CHECK-NEXT: ret void16;17bb:18 %tmp = addrspacecast ptr addrspace(5) undef to ptr19 %tmp2 = getelementptr inbounds i8, ptr addrspace(5) undef, i32 %idx20 %tmp4 = getelementptr inbounds i8, ptr %tmp, i64 %tmp321 store i8 0, ptr addrspace(5) %tmp222 store i8 0, ptr %tmp423 ret void24}25 26define void @multi_as_reduction_different_sized(ptr addrspace(3) %lds, i32 %idx0, i64 %idx1) #0 {27; CHECK-LABEL: @multi_as_reduction_different_sized(28; CHECK-NEXT: bb:29; CHECK-NEXT: [[FLAT:%.*]] = addrspacecast ptr addrspace(3) [[LDS:%.*]] to ptr30; CHECK-NEXT: [[ADD0:%.*]] = add i32 [[IDX0:%.*]], 231; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[IDX1:%.*]], 132; CHECK-NEXT: [[LDS_1:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[LDS]], i32 [[ADD0]]33; CHECK-NEXT: [[FLAT_1:%.*]] = getelementptr inbounds i32, ptr [[FLAT]], i64 [[ADD1]]34; CHECK-NEXT: [[LOAD_LDS_0:%.*]] = load i32, ptr addrspace(3) [[LDS]], align 435; CHECK-NEXT: [[LOAD_LDS_1:%.*]] = load i32, ptr addrspace(3) [[LDS_1]], align 436; CHECK-NEXT: [[LOAD_FLAT_0:%.*]] = load i32, ptr [[FLAT]], align 437; CHECK-NEXT: [[LOAD_FLAT_1:%.*]] = load i32, ptr [[FLAT_1]], align 438; CHECK-NEXT: [[SUB0:%.*]] = sub i32 [[LOAD_FLAT_0]], [[LOAD_LDS_0]]39; CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[LOAD_FLAT_1]], [[LOAD_LDS_1]]40; CHECK-NEXT: store i32 [[SUB0]], ptr undef, align 441; CHECK-NEXT: store i32 [[SUB1]], ptr undef, align 442; CHECK-NEXT: ret void43;44bb:45 %flat = addrspacecast ptr addrspace(3) %lds to ptr46 %add0 = add i32 %idx0, 247 %add1 = add i64 %idx1, 148 49 %lds.1 = getelementptr inbounds i32, ptr addrspace(3) %lds, i32 %add050 %flat.1 = getelementptr inbounds i32, ptr %flat, i64 %add151 52 %load.lds.0 = load i32, ptr addrspace(3) %lds, align 453 %load.lds.1 = load i32, ptr addrspace(3) %lds.1, align 454 55 %load.flat.0 = load i32, ptr %flat, align 456 %load.flat.1 = load i32, ptr %flat.1, align 457 58 %sub0 = sub i32 %load.flat.0, %load.lds.059 %sub1 = sub i32 %load.flat.1, %load.lds.160 61 store i32 %sub0, ptr undef62 store i32 %sub1, ptr undef63 ret void64}65 66; This should vectorize if using getUnderlyingObject67define void @multi_as_reduction_same_size(ptr addrspace(1) %global, i64 %idx0, i64 %idx1) #0 {68; CHECK-LABEL: @multi_as_reduction_same_size(69; CHECK-NEXT: bb:70; CHECK-NEXT: [[FLAT:%.*]] = addrspacecast ptr addrspace(1) [[GLOBAL:%.*]] to ptr71; CHECK-NEXT: [[ADD0:%.*]] = add i64 [[IDX0:%.*]], 272; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[IDX1:%.*]], 173; CHECK-NEXT: [[GLOBAL_1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[GLOBAL]], i64 [[ADD0]]74; CHECK-NEXT: [[FLAT_1:%.*]] = getelementptr inbounds i32, ptr [[FLAT]], i64 [[ADD1]]75; CHECK-NEXT: [[LOAD_GLOBAL_0:%.*]] = load i32, ptr addrspace(1) [[GLOBAL]], align 476; CHECK-NEXT: [[LOAD_GLOBAL_1:%.*]] = load i32, ptr addrspace(1) [[GLOBAL_1]], align 477; CHECK-NEXT: [[LOAD_FLAT_0:%.*]] = load i32, ptr [[FLAT]], align 478; CHECK-NEXT: [[LOAD_FLAT_1:%.*]] = load i32, ptr [[FLAT_1]], align 479; CHECK-NEXT: [[SUB0:%.*]] = sub i32 [[LOAD_FLAT_0]], [[LOAD_GLOBAL_0]]80; CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[LOAD_FLAT_1]], [[LOAD_GLOBAL_1]]81; CHECK-NEXT: store i32 [[SUB0]], ptr undef, align 482; CHECK-NEXT: store i32 [[SUB1]], ptr undef, align 483; CHECK-NEXT: ret void84;85bb:86 %flat = addrspacecast ptr addrspace(1) %global to ptr87 %add0 = add i64 %idx0, 288 %add1 = add i64 %idx1, 189 90 %global.1 = getelementptr inbounds i32, ptr addrspace(1) %global, i64 %add091 %flat.1 = getelementptr inbounds i32, ptr %flat, i64 %add192 93 %load.global.0 = load i32, ptr addrspace(1) %global, align 494 %load.global.1 = load i32, ptr addrspace(1) %global.1, align 495 96 %load.flat.0 = load i32, ptr %flat, align 497 %load.flat.1 = load i32, ptr %flat.1, align 498 99 %sub0 = sub i32 %load.flat.0, %load.global.0100 %sub1 = sub i32 %load.flat.1, %load.global.1101 102 store i32 %sub0, ptr undef103 store i32 %sub1, ptr undef104 ret void105}106 107; This should vectorize if using getUnderlyingObject108; The add is done in the same width, even though the address space size is smaller109define void @multi_as_reduction_different_sized_noncanon(ptr addrspace(3) %lds, i64 %idx0, i64 %idx1) #0 {110; CHECK-LABEL: @multi_as_reduction_different_sized_noncanon(111; CHECK-NEXT: bb:112; CHECK-NEXT: [[FLAT:%.*]] = addrspacecast ptr addrspace(3) [[LDS:%.*]] to ptr113; CHECK-NEXT: [[ADD0:%.*]] = add i64 [[IDX0:%.*]], 2114; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[IDX1:%.*]], 1115; CHECK-NEXT: [[LDS_1:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[LDS]], i64 [[ADD0]]116; CHECK-NEXT: [[FLAT_1:%.*]] = getelementptr inbounds i32, ptr [[FLAT]], i64 [[ADD1]]117; CHECK-NEXT: [[LOAD_LDS_0:%.*]] = load i32, ptr addrspace(3) [[LDS]], align 4118; CHECK-NEXT: [[LOAD_LDS_1:%.*]] = load i32, ptr addrspace(3) [[LDS_1]], align 4119; CHECK-NEXT: [[LOAD_FLAT_0:%.*]] = load i32, ptr [[FLAT]], align 4120; CHECK-NEXT: [[LOAD_FLAT_1:%.*]] = load i32, ptr [[FLAT_1]], align 4121; CHECK-NEXT: [[SUB0:%.*]] = sub i32 [[LOAD_FLAT_0]], [[LOAD_LDS_0]]122; CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[LOAD_FLAT_1]], [[LOAD_LDS_1]]123; CHECK-NEXT: store i32 [[SUB0]], ptr undef, align 4124; CHECK-NEXT: store i32 [[SUB1]], ptr undef, align 4125; CHECK-NEXT: ret void126;127bb:128 %flat = addrspacecast ptr addrspace(3) %lds to ptr129 %add0 = add i64 %idx0, 2130 %add1 = add i64 %idx1, 1131 132 %lds.1 = getelementptr inbounds i32, ptr addrspace(3) %lds, i64 %add0133 %flat.1 = getelementptr inbounds i32, ptr %flat, i64 %add1134 135 %load.lds.0 = load i32, ptr addrspace(3) %lds, align 4136 %load.lds.1 = load i32, ptr addrspace(3) %lds.1, align 4137 138 %load.flat.0 = load i32, ptr %flat, align 4139 %load.flat.1 = load i32, ptr %flat.1, align 4140 141 %sub0 = sub i32 %load.flat.0, %load.lds.0142 %sub1 = sub i32 %load.flat.1, %load.lds.1143 144 store i32 %sub0, ptr undef145 store i32 %sub1, ptr undef146 ret void147}148 149define void @slp_crash_on_addrspacecast() {150; CHECK-LABEL: @slp_crash_on_addrspacecast(151; CHECK-NEXT: entry:152; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, ptr addrspace(3) undef, i32 undef153; CHECK-NEXT: [[P0:%.*]] = addrspacecast ptr addrspace(3) [[TMP0]] to ptr154; CHECK-NEXT: store i64 undef, ptr [[P0]], align 8155; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i64, ptr addrspace(3) undef, i32 undef156; CHECK-NEXT: [[P1:%.*]] = addrspacecast ptr addrspace(3) [[TMP1]] to ptr157; CHECK-NEXT: store i64 undef, ptr [[P1]], align 8158; CHECK-NEXT: ret void159;160entry:161 %0 = getelementptr inbounds i64, ptr addrspace(3) undef, i32 undef162 %p0 = addrspacecast ptr addrspace(3) %0 to ptr163 store i64 undef, ptr %p0, align 8164 %1 = getelementptr inbounds i64, ptr addrspace(3) undef, i32 undef165 %p1 = addrspacecast ptr addrspace(3) %1 to ptr166 store i64 undef, ptr %p1, align 8167 ret void168}169